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ORCIDBibTeX records: Gabriele Saucier
@inproceedings{DBLP:conf/date/GhanmiGHMSS02,
author = {L. Ghanmi and
A. Ghrab and
M. Hamdoun and
B. Missaoui and
K. Skiba and
Gabriele Saucier},
title = {E-Design Based on the Reuse Paradigm},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {214--220},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998272},
doi = {10.1109/DATE.2002.998272},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GhanmiGHMSS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GerousisLPPRS02,
author = {Vassilios Gerousis and
Oz Levia and
Pierre G. Paulin and
Mark Pinto and
Chris Rowen and
Gabriele Saucier},
title = {Who Owns the Platform?},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {238},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998276},
doi = {10.1109/DATE.2002.998276},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GerousisLPPRS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KrupnovaS00,
author = {Helena Krupnova and
Gabriele Saucier},
editor = {Reiner W. Hartenstein and
Herbert Gr{\"{u}}nbacher},
title = {FPGA-Based Emulation: Industrial and Custom Prototyping Solutions},
booktitle = {Field-Programmable Logic and Applications, The Roadmap to Reconfigurable
Computing, 10th International Workshop, {FPL} 2000, Villach, Austria,
August 27-30, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1896},
pages = {68--77},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44614-1\_8},
doi = {10.1007/3-540-44614-1\_8},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KrupnovaS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KrupnovaS00,
author = {Helena Krupnova and
Gabriele Saucier},
title = {{FPGA} Technology Snapshot: Current Devices and Design Tools},
booktitle = {Proceedings of the 11th {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 2000), Paris, France, June 21-23, 2000},
pages = {200},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/IWRSP.2000.855226},
doi = {10.1109/IWRSP.2000.855226},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KrupnovaS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KrupnovaS99,
author = {Helena Krupnova and
Gabriele Saucier},
title = {Iterative Improvement Based Multi-Way Netlist Partitioning for FPGAs},
booktitle = {1999 Design, Automation and Test in Europe {(DATE} '99), 9-12 March
1999, Munich, Germany},
pages = {587},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1999},
url = {https://doi.org/10.1109/DATE.1999.761187},
doi = {10.1109/DATE.1999.761187},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/KrupnovaS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KrupnovaS99,
author = {Helena Krupnova and
Gabriele Saucier},
editor = {Sinan Kaptanoglu and
Steve Trimberger},
title = {Partitioning Large Designs by Filling {PFGA} Devices with Hierarchy
Blocks},
booktitle = {Proceedings of the 1999 {ACM/SIGDA} Seventh International Symposium
on Field Programmable Gate Arrays, {FPGA} 1999, Monterey, CA, USA,
February 21-23, 1999},
pages = {251},
publisher = {{ACM}},
year = {1999},
url = {https://doi.org/10.1145/296399.296521},
doi = {10.1145/296399.296521},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KrupnovaS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KrupnovaS99,
author = {Helena Krupnova and
Gabriele Saucier},
editor = {Patrick Lysaght and
James Irvine and
Reiner W. Hartenstein},
title = {Hierarchical Interactive Approach to Partition Large Designs into
FPGAs},
booktitle = {Field-Programmable Logic and Applications, 9th International Workshop,
FPL'99, Glasgow, UK, August 30 - September 1, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1673},
pages = {101--110},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/978-3-540-48302-1\_11},
doi = {10.1007/978-3-540-48302-1\_11},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KrupnovaS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KrupnovaRS99,
author = {Helena Krupnova and
Christian Rabedaoro and
Gabriele Saucier},
title = {{FPGA} Partitioning for Rapid Prototyping: {A} 1 Million Gate Design
Case Study},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779042},
doi = {10.1109/IWRSP.1999.779042},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KrupnovaRS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BrasenS98,
author = {Daniel R. Brasen and
Gabriele Saucier},
title = {Using cone structures for circuit partitioning into {FPGA} packages},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {17},
number = {7},
pages = {592--600},
year = {1998},
url = {https://doi.org/10.1109/43.709397},
doi = {10.1109/43.709397},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BrasenS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SenouciAKS98,
author = {S. A. Senouci and
Aadil Amoura and
Helena Krupnova and
Gabriele Saucier},
editor = {Jason Cong and
Sinan Kaptanoglu},
title = {Timing Driven Floorplanning on Programmable Hierarchical Targets},
booktitle = {Proceedings of the 1998 {ACM/SIGDA} Sixth International Symposium
on Field Programmable Gate Arrays, {FPGA} 1998, Monterey, CA, USA,
February 22-24, 1998},
pages = {85--92},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/275107.275123},
doi = {10.1145/275107.275123},
timestamp = {Thu, 06 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpga/SenouciAKS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KrupnovaBS98,
author = {Helena Krupnova and
B. Behnam and
Gabriele Saucier},
editor = {Jason Cong and
Sinan Kaptanoglu},
title = {Block and {IP} Wrapping for Efficient Design on FPGAs (Abstract)},
booktitle = {Proceedings of the 1998 {ACM/SIGDA} Sixth International Symposium
on Field Programmable Gate Arrays, {FPGA} 1998, Monterey, CA, USA,
February 22-24, 1998},
pages = {256},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/275107.275149},
doi = {10.1145/275107.275149},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KrupnovaBS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KrupnovaDS98,
author = {Helena Krupnova and
Vu DucAnh Dinh and
Gabriele Saucier},
editor = {Reiner W. Hartenstein and
Andres Keevallik},
title = {A Knowledge-Based System for Prototyping on FPFAs},
booktitle = {Field-Programmable Logic and Applications, From FPGAs to Computing
Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August
31 - September 3, 1998, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1482},
pages = {89--98},
publisher = {Springer},
year = {1998},
url = {https://doi.org/10.1007/BFb0055236},
doi = {10.1007/BFB0055236},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KrupnovaDS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/KrupnovaVSB98,
author = {Helena Krupnova and
Dinh Duc Anh Vu and
Gabriele Saucier and
Michel Boubal},
title = {Real Time Prototyping Method and a Case Study},
booktitle = {Proceedings of the Ninth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1998), Leuven, Belgium, June 3-5, 1998},
pages = {13--18},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/IWRSP.1998.676662},
doi = {10.1109/IWRSP.1998.676662},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/KrupnovaVSB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LaurentBS98,
author = {Bernard Laurent and
Gilles Bosco and
Gabriele Saucier},
title = {Fast Arithmetic on Xilinx 5200 {FPGA}},
booktitle = {11th International Conference on {VLSI} Design {(VLSI} Design 1991),
4-7 January 1998, Chennai, India},
pages = {322--325},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/ICVD.1998.646626},
doi = {10.1109/ICVD.1998.646626},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LaurentBS98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KrupnovaAS97,
author = {Helena Krupnova and
Ali Abbara and
Gabriele Saucier},
editor = {Ellen J. Yoffa and
Giovanni De Micheli and
Jan M. Rabaey},
title = {A Hierarchy-Driven {FPGA} Partitioning Method},
booktitle = {Proceedings of the 34st Conference on Design Automation, Anaheim,
California, USA, Anaheim Convention Center, June 9-13, 1997},
pages = {522--525},
publisher = {{ACM} Press},
year = {1997},
url = {https://doi.org/10.1145/266021.266271},
doi = {10.1145/266021.266271},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KrupnovaAS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KrupnovaRS97,
author = {Helena Krupnova and
Christian Rabedaoro and
Gabriele Saucier},
editor = {Carl Ebeling},
title = {Synthesis and Floorplanning for Large Hierarchical FPGAs},
booktitle = {Proceedings of the 1997 {ACM/SIGDA} Fifth International Symposium
on Field Programmable Gate Arrays, {FPGA} 1997, Monterey, CA, USA,
February 9-11, 1997},
pages = {105--111},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/258305.258320},
doi = {10.1145/258305.258320},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/KrupnovaRS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LaurentBS97,
author = {Bernard Laurent and
Gilles Bosco and
Gabriele Saucier},
editor = {Wayne Luk and
Peter Y. K. Cheung and
Manfred Glesner},
title = {Structural versus algorithmic approaches for efficient adders on Xilinx
5200 {FPGA}},
booktitle = {Field-Programmable Logic and Applications, 7th International Workshop,
{FPL} '97, London, UK, September 1-3, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1304},
pages = {462--471},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-63465-7\_252},
doi = {10.1007/3-540-63465-7\_252},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LaurentBS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RochetLS95,
author = {Rapha{\"{e}}l Rochet and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
title = {Efficient synthesis of fault-tolerant controllers},
booktitle = {1995 European Design and Test Conference, ED{\&}TC 1995, Paris,
France, March 6-9, 1995},
pages = {593},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/EDTC.1995.470316},
doi = {10.1109/EDTC.1995.470316},
timestamp = {Fri, 20 May 2022 15:41:46 +0200},
biburl = {https://dblp.org/rec/conf/date/RochetLS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/BrahicLS95,
author = {P. Brahic and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
title = {Design of defect-tolerant scan chains for MCMs with an active substrate},
booktitle = {1995 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 1995, Lafayette, LA, USA,
November 13-15, 1995},
pages = {252--260},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/DFTVS.1995.476959},
doi = {10.1109/DFTVS.1995.476959},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/BrahicLS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LeveugleKKSW94,
author = {R{\'{e}}gis Leveugle and
Zahava Koren and
Israel Koren and
Gabriele Saucier and
Norbert Wehn},
title = {The Hyeti Defect Tolerant Microprocessor: {A} Practical Experiment
and its Cost-Effectiveness Analysis},
journal = {{IEEE} Trans. Computers},
volume = {43},
number = {12},
pages = {1398--1406},
year = {1994},
url = {https://doi.org/10.1109/12.338099},
doi = {10.1109/12.338099},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LeveugleKKSW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KnackHJFRTS94,
author = {Kella Knack and
Gordan Hyland and
Jim Jasmin and
John Frediani and
Tom Reiner and
Steven Trimberger and
Gabriele Saucier},
editor = {Michael J. Lorenzetti},
title = {Design Automation Tools for {FPGA} Design (Panel)},
booktitle = {Proceedings of the 31st Conference on Design Automation, San Diego,
California, USA, June 6-10, 1994},
pages = {676},
publisher = {{ACM} Press},
year = {1994},
url = {https://doi.org/10.1145/196244.196611},
doi = {10.1145/196244.196611},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KnackHJFRTS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/LeveugleRS94,
author = {R{\'{e}}gis Leveugle and
Rapha{\"{e}}l Rochet and
Gabriele Saucier},
title = {Alternative Approaches to Fault Detection in FSMs},
booktitle = {The {IEEE} International Workshop on Defect and Fault Tolerance in
{VLSI} Systems, October 17-19, 1994, Montr{\'{e}}al, Quebec,
Canada, Proceedings},
pages = {271--279},
publisher = {{IEEE} Computer Society},
year = {1994},
timestamp = {Fri, 15 Jul 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/LeveugleRS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/MichelLSDC94,
author = {T. Michel and
R{\'{e}}gis Leveugle and
Gabriele Saucier and
R. Doucet and
P. Chapier},
editor = {Robert Werner},
title = {Taking Advantage of ASICs to Improve Dependability with Very Low Overheads},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {14--18},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326905},
doi = {10.1109/EDTC.1994.326905},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/MichelLSDC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/BrasenS94,
author = {Daniel R. Brasen and
Gabriele Saucier},
editor = {Robert Werner},
title = {{FPGA} Partitioning for Critical Paths},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {99--103},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326891},
doi = {10.1109/EDTC.1994.326891},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/BrasenS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/Saucier94,
author = {D. Jacquet and
Gabriele Saucier},
editor = {Robert Werner},
title = {Design of a Digital Neural Chip: Application to Optical Character
Recognition by Neural Network},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {256--260},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326868},
doi = {10.1109/EDTC.1994.326868},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/Saucier94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/SafiniaLS94,
author = {C. Safinia and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
editor = {Robert Werner},
title = {Taking Advantage of High Level Functional Information to Refine Timing
Analysis and Timing Modeling},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {349--353},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326853},
doi = {10.1109/EDTC.1994.326853},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/SafiniaLS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/KaramS93,
author = {Margot Karam and
Gabriele Saucier},
title = {Functional versus random test generation for sequential circuits},
journal = {J. Electron. Test.},
volume = {4},
number = {1},
pages = {33--41},
year = {1993},
url = {https://doi.org/10.1007/BF00971938},
doi = {10.1007/BF00971938},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/KaramS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AbouzeidBPS93,
author = {Pierre Abouzeid and
Belgacem Babba and
Michel Crastes de Paulet and
Gabriele Saucier},
title = {Input-driven partitioning methods and application to synthesis on
table-lookup-based FPGAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {12},
number = {7},
pages = {913--925},
year = {1993},
url = {https://doi.org/10.1109/43.238028},
doi = {10.1109/43.238028},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AbouzeidBPS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SaucierA93,
author = {Gabriele Saucier and
Pierre Abouzeid},
title = {Lexicographical expressions of Boolean functions with application
to multilevel synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {12},
number = {11},
pages = {1642--1654},
year = {1993},
url = {https://doi.org/10.1109/43.248075},
doi = {10.1109/43.248075},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SaucierA93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/RochetLS93,
author = {Rapha{\"{e}}l Rochet and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
editor = {Fabrizio Lombardi and
Mariagiovanna Sami and
Yvon Savaria and
Renato Stefanelli},
title = {Analysis and Comparison of Fault Tolerant {FSM} Architectures Based
on {SEC} Codes},
booktitle = {The {IEEE} International Workshop on Defect and Fault Tolerance in
{VLSI} Systems, October 27-29, 1993, Venice, Italy, Proceedings},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {1993},
timestamp = {Fri, 15 Jul 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dft/RochetLS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/LeveugleRSMP93,
author = {R{\'{e}}gis Leveugle and
Rapha{\"{e}}l Rochet and
Gabriele Saucier and
L. Martinez and
C. Pitot},
title = {A Synthesis Tool for Fault-Tolerant Finite State Machines},
booktitle = {Digest of Papers: FTCS-23, The Twenty-Third Annual International Symposium
on Fault-Tolerant Computing, Toulouse, France, June 22-24, 1993},
pages = {502--511},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/FTCS.1993.627353},
doi = {10.1109/FTCS.1993.627353},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/LeveugleRSMP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/SaucierBH93,
author = {Gabriele Saucier and
Daniel R. Brasen and
J. P. Hiol},
editor = {Michael R. Lightner and
Jochen A. G. Jess},
title = {Partitioning with cone structures},
booktitle = {Proceedings of the 1993 {IEEE/ACM} International Conference on Computer-Aided
Design, 1993, Santa Clara, California, USA, November 7-11, 1993},
pages = {236--239},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1993},
url = {https://doi.org/10.1109/ICCAD.1993.580063},
doi = {10.1109/ICCAD.1993.580063},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/SaucierBH93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LeveugleDS93,
author = {R{\'{e}}gis Leveugle and
X. Delord and
Gabriele Saucier},
title = {Influence of Error Correlations on the Signature Analysis Aliasing},
booktitle = {Proceedings 1993 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '93, Cambridge, MA, USA,
October 3-6, 1993},
pages = {584--587},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICCD.1993.393310},
doi = {10.1109/ICCD.1993.393310},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LeveugleDS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/JacquetS93,
author = {D. Jacquet and
Gabriele Saucier},
editor = {Kakayuki Yanagawa and
Peter A. Ivey},
title = {Design of a dedicated neural network on silicon: application to optical
character recognition},
booktitle = {{VLSI} 93, Proceedings of the {IFIP} {TC10/WG} 10.5 International
Conference on Very Large Scale Integration, Grenoble, France, 7-10
September, 1993},
series = {{IFIP} Transactions},
volume = {{A-42}},
pages = {169--178},
publisher = {North-Holland},
year = {1993},
timestamp = {Thu, 03 Jan 2002 12:11:05 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/JacquetS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/ifip10-2/1992,
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
publisher = {North-Holland},
year = {1993},
isbn = {0-444-81479-5},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/1992.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/BoubekeurPST92,
author = {Ahmed Boubekeur and
Jean{-}Luc Patry and
Gabriele Saucier and
Jacques Trilhe},
title = {Configuring a Wafer-Scale Two-Dimensional Array of Single-Bit Processors},
journal = {Computer},
volume = {25},
number = {4},
pages = {29--39},
year = {1992},
url = {https://doi.org/10.1109/2.129043},
doi = {10.1109/2.129043},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/BoubekeurPST92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/GerbauxS92,
author = {Laurent Gerbaux and
Gabriele Saucier},
title = {Automatic synthesis of large Moore sequencers},
journal = {Integr.},
volume = {13},
number = {3},
pages = {259--281},
year = {1992},
url = {https://doi.org/10.1016/0167-9260(92)90031-S},
doi = {10.1016/0167-9260(92)90031-S},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/GerbauxS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BessonBCFS92,
author = {T. Besson and
H. Bouzouzou and
M. Crastes and
Ion Floricica and
Gabriele Saucier},
title = {Synthesis on Multiplexer-Based {F.P.G.A.} Using Binary Decision Diagrams},
booktitle = {Proceedings 1992 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '92, Cambridge, MA,
USA, October 11-14, 1992},
pages = {163--167},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/ICCD.1992.276241},
doi = {10.1109/ICCD.1992.276241},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BessonBCFS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/GerbauxLS92,
author = {Laurent Gerbaux and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Synthesis of large controllers using {ROM} or {PLA} generators},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {47--59},
publisher = {North-Holland},
year = {1992},
timestamp = {Sat, 28 Sep 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/GerbauxLS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/BelhadjGBS92,
author = {H. Belhadj and
Laurent Gerbaux and
Marie{-}Claude Bertrand and
Gabriele Saucier},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Specification and Synthesis of Communicating Finite State Machines},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {91--102},
publisher = {North-Holland},
year = {1992},
timestamp = {Sat, 28 Sep 2013 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/BelhadjGBS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/MignotteBPRS92,
author = {Anne Mignotte and
Marie{-}Claude Bertrand and
Michel Crastes de Paulet and
J{\'{e}}r{\^{o}}me Rampon and
Gabriele Saucier},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {{ASYL:} {A} Control Driven {RTL} Synthesis System using Library Blocks},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {275--291},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 07 Feb 2002 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ifip10-2/MignotteBPRS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-2/AbouzeidLS92,
author = {Pierre Abouzeid and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
editor = {Gabriele Saucier and
Jacques Trilhe},
title = {Logic Synthesis for Automatic Layout},
booktitle = {Synthesis for Control Dominated Circuits, Selected papers from the
{IFIP} {WG10.2/WG10.5} Workshops, Grenoble, France, April and September,
1992},
series = {{IFIP} Transactions},
volume = {{A-22}},
pages = {335--343},
publisher = {North-Holland},
year = {1992},
timestamp = {Thu, 01 Jun 2006 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-2/AbouzeidLS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/CrastesSS91,
author = {M. Crastes and
K. Sakouti and
Gabriele Saucier},
editor = {A. Richard Newton},
title = {A Technology Mapping Method Based On Perfect And Semi-Perfect Matchings},
booktitle = {Proceedings of the 28th Design Automation Conference, San Francisco,
California, USA, June 17-21, 1991},
pages = {93--98},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/127601.127634},
doi = {10.1145/127601.127634},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/CrastesSS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/MichelLS91,
author = {T. Michel and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
title = {A New Approach to Control Flow Checking Without Program Modification},
booktitle = {Proceedings of the 1991 International Symposium on Fault-Tolerant
Computing, Montreal, Canada},
pages = {334--343},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/FTCS.1991.146682},
doi = {10.1109/FTCS.1991.146682},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/MichelLS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DuffS91,
author = {Christopher Duff and
Gabriele Saucier},
title = {State Assignment Based on the Reduced Dependency Theory and Recent
Experimental Results},
booktitle = {1991 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 1993, Santa Clara, CA, USA, November 11-14, 1991. Digest of
Technical Papers},
pages = {222--225},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICCAD.1991.185237},
doi = {10.1109/ICCAD.1991.185237},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/DuffS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KaramLS91,
author = {Margot Karam and
R{\'{e}}gis Leveugle and
Gabriele Saucier},
title = {Hierarchical Test Generation Based on Delayed Propagation},
booktitle = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
pages = {739--747},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/TEST.1991.519739},
doi = {10.1109/TEST.1991.519739},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/itc/KaramLS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/DelordS91,
author = {X. Delord and
Gabriele Saucier},
title = {Formalizing Signature Analysis for Control Flow Checking of Pipelined
{RISC} Multiprocessors},
booktitle = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
pages = {936--945},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/TEST.1991.519759},
doi = {10.1109/TEST.1991.519759},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/DelordS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/QualiSATM91,
author = {J. Quali and
Gabriele Saucier and
P. Y. Alla and
Jacques Trilhe and
Laurent Masse{-}Navette},
editor = {Arne Halaas and
Peter B. Denyer},
title = {A Customizable Neural Processor for Distributed Neural Network},
booktitle = {{VLSI} 91, Proceedings of the {IFIP} {TC10/WG} 10.5 International
Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22
August, 1991},
series = {{IFIP} Transactions},
volume = {{A-1}},
pages = {167--176},
publisher = {North-Holland},
year = {1991},
timestamp = {Fri, 02 Aug 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/QualiSATM91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/LeveugleS90,
author = {R{\'{e}}gis Leveugle and
Gabriele Saucier},
title = {Optimized Synthesis of Concurrently Checked Controllers},
journal = {{IEEE} Trans. Computers},
volume = {39},
number = {4},
pages = {419--425},
year = {1990},
url = {https://doi.org/10.1109/12.54835},
doi = {10.1109/12.54835},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/LeveugleS90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AbouzeidSSP90,
author = {Pierre Abouzeid and
K. Sakouti and
Gabriele Saucier and
Franck Poirot},
editor = {Richard C. Smith},
title = {Multilevel Synthesis Minimizing the Routing Factor},
booktitle = {Proceedings of the 27th {ACM/IEEE} Design Automation Conference. Orlando,
Florida, USA, June 24-28, 1990},
pages = {365--368},
publisher = {{IEEE} Computer Society Press},
year = {1990},
url = {https://doi.org/10.1145/123186.123307},
doi = {10.1145/123186.123307},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AbouzeidSSP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/SaucierSB90,
author = {Gabriele Saucier and
Pascal Sicard and
Laurent Bouchet},
editor = {Gordon Adshead and
Jochen A. G. Jess},
title = {Multi-level synthesis on PALs},
booktitle = {European Design Automation Conference, {EURO-DAC} 1990, Glasgow, Scotland,
UK, March 12-15, 1990},
pages = {542--546},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/EDAC.1990.136706},
doi = {10.1109/EDAC.1990.136706},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/SaucierSB90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/SaucierDP90,
author = {Gabriele Saucier and
Christopher Duff and
Franck Poirot},
editor = {Gordon Adshead and
Jochen A. G. Jess},
title = {State assignment of controllers for optimal area implementation},
booktitle = {European Design Automation Conference, {EURO-DAC} 1990, Glasgow, Scotland,
UK, March 12-15, 1990},
pages = {547--551},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/EDAC.1990.136707},
doi = {10.1109/EDAC.1990.136707},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/SaucierDP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/LeveugleMS90,
author = {R{\'{e}}gis Leveugle and
T. Michel and
Gabriele Saucier},
title = {Design of microprocessors with built-in on-line test},
booktitle = {Proceedings of the 20th International Symposium on Fault-Tolerant
Computing, {FTCS} 1990, Newcastle Upon Tyne, UK, 26-28 June, 1990},
pages = {450--456},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/FTCS.1990.89381},
doi = {10.1109/FTCS.1990.89381},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/LeveugleMS90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ijcnn/OualiS90,
author = {J. Ouali and
Gabriele Saucier},
title = {Silicon compiler for neuro-ASICs},
booktitle = {{IJCNN} 1990, International Joint Conference on Neural Networks, San
Diego, CA, USA, June 17-21, 1990},
pages = {557--561},
publisher = {{IEEE}},
year = {1990},
url = {https://doi.org/10.1109/IJCNN.1990.137627},
doi = {10.1109/IJCNN.1990.137627},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/ijcnn/OualiS90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/SaucierDP89,
author = {Gabriele Saucier and
Christopher Duff and
Franck Poirot},
editor = {Donald E. Thomas},
title = {State Assignment Using a New Embedding Method Based on an Intersecting
Cube Theory},
booktitle = {Proceedings of the 26th {ACM/IEEE} Design Automation Conference, Las
Vegas, Nevada, USA, June 25-29, 1989},
pages = {321--326},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/74382.74436},
doi = {10.1145/74382.74436},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/SaucierDP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SaucierLA89,
author = {Gabriele Saucier and
R{\'{e}}gis Leveugle and
Pierre Abouzeid},
title = {A channelless layout for multilevel synthesis with compiled cells},
booktitle = {Computer Design: {VLSI} in Computers and Processors, {ICCD} 1989.
Proceedings., 1989 {IEEE} International Conference on, Cambridge,
MA, USA, October 2-4, 1989},
pages = {35--38},
publisher = {{IEEE}},
year = {1989},
url = {https://doi.org/10.1109/ICCD.1989.63323},
doi = {10.1109/ICCD.1989.63323},
timestamp = {Mon, 09 Aug 2021 14:54:02 +0200},
biburl = {https://dblp.org/rec/conf/iccd/SaucierLA89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LeveugleS89,
author = {R{\'{e}}gis Leveugle and
Gabriele Saucier},
title = {Concurrent checking in dedicated controllers},
booktitle = {Computer Design: {VLSI} in Computers and Processors, {ICCD} 1989.
Proceedings., 1989 {IEEE} International Conference on, Cambridge,
MA, USA, October 2-4, 1989},
pages = {124--127},
publisher = {{IEEE}},
year = {1989},
url = {https://doi.org/10.1109/ICCD.1989.63341},
doi = {10.1109/ICCD.1989.63341},
timestamp = {Wed, 28 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/LeveugleS89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/OualiS89,
author = {J. Ouali and
Gabriele Saucier},
title = {A flexible architecture for neural networks},
booktitle = {Computer Design: {VLSI} in Computers and Processors, {ICCD} 1989.
Proceedings., 1989 {IEEE} International Conference on, Cambridge,
MA, USA, October 2-4, 1989},
pages = {483--486},
publisher = {{IEEE}},
year = {1989},
url = {https://doi.org/10.1109/ICCD.1989.63413},
doi = {10.1109/ICCD.1989.63413},
timestamp = {Wed, 28 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/OualiS89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LeveugleS89,
author = {R{\'{e}}gis Leveugle and
Gabriele Saucier},
title = {Optimized Synthesis of Dedicated Controllers with Concurrent Checking
Capabilities},
booktitle = {Proceedings International Test Conference 1989, Washington, D.C.,
USA, August 1989},
pages = {355--363},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/TEST.1989.82319},
doi = {10.1109/TEST.1989.82319},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/LeveugleS89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PauletKS89,
author = {Michel Crastes de Paulet and
Margot Karam and
Gabriele Saucier},
title = {Testability Expertise and Test Planning from High-Level Specifications},
booktitle = {Proceedings International Test Conference 1989, Washington, D.C.,
USA, August 1989},
pages = {692--699},
publisher = {{IEEE} Computer Society},
year = {1989},
url = {https://doi.org/10.1109/TEST.1989.82357},
doi = {10.1109/TEST.1989.82357},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/PauletKS89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ThuauS88,
author = {Ghislaine Thuau and
Gabriele Saucier},
title = {Optimized Layout of {MOS} Cells},
journal = {{IEEE} Trans. Computers},
volume = {37},
number = {1},
pages = {79--87},
year = {1988},
url = {https://doi.org/10.1109/12.75140},
doi = {10.1109/12.75140},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ThuauS88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/gi/GlesnerHIMST88,
author = {Manfred Glesner and
M. Huch and
Peter A. Ivey and
T. Midwinter and
Gabriele Saucier and
Jacques Trilhe},
editor = {R{\"{u}}diger Valk},
title = {Entwurf eines systolischen Arrays in Wafer Scale Technik f{\"{u}}r
die digitale Signalverarbeitung},
booktitle = {{GI} - 18. Jahrestagung II, Vernetzte and komplexe Informatik-Systems,
Hamburg, 17.-19. Oktober 1988, Proceedings},
series = {Informatik-Fachberichte},
volume = {188},
pages = {75--91},
publisher = {Springer},
year = {1988},
url = {https://doi.org/10.1007/978-3-642-74135-7\_5},
doi = {10.1007/978-3-642-74135-7\_5},
timestamp = {Tue, 23 May 2017 01:10:32 +0200},
biburl = {https://dblp.org/rec/conf/gi/GlesnerHIMST88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SaucierPS87,
author = {Gabriele Saucier and
Michel Crastes de Paulet and
Pascal Sicard},
title = {{ASYL:} {A} Rule-Based System for Controller Synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {6},
number = {6},
pages = {1088--1097},
year = {1987},
url = {https://doi.org/10.1109/TCAD.1987.1270349},
doi = {10.1109/TCAD.1987.1270349},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SaucierPS87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KoukaS87,
author = {E. F. M. Kouka and
Gabriele Saucier},
editor = {A. O'Neill and
D. Thomas},
title = {An Application of Exploratory Data Analysis Techniques to Floorplan
Design},
booktitle = {Proceedings of the 24th {ACM/IEEE} Design Automation Conference. Miami
Beach, FL, USA, June 28 - July 1, 1987},
pages = {654--658},
publisher = {{IEEE} Computer Society Press / {ACM}},
year = {1987},
url = {https://doi.org/10.1145/37888.37993},
doi = {10.1145/37888.37993},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KoukaS87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fjcc/DupontIS86,
author = {E. Dupont and
Jeanne Idt and
Gabriele Saucier},
title = {A Rule-Based System for the Optimal State Assignment of Controllers},
booktitle = {Proceedings of the Fall Joint Computer Conference, November 2-6, 1986,
Dallas, Texas, {USA}},
pages = {915--923},
publisher = {{IEEE} Computer Society},
year = {1986},
timestamp = {Fri, 29 Sep 2017 14:35:52 +0200},
biburl = {https://dblp.org/rec/conf/fjcc/DupontIS86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/SaucierT85,
author = {Gabriele Saucier and
Ghislaine Thuau},
editor = {Hillel Ofek and
Lawrence A. O'Neill},
title = {Systematic and optimized layout of {MOS} cells},
booktitle = {Proceedings of the 22nd {ACM/IEEE} conference on Design automation,
{DAC} 1985, Las Vegas, Nevada, USA, 1985},
pages = {53--61},
publisher = {{ACM}},
year = {1985},
url = {https://doi.org/10.1145/317825.317833},
doi = {10.1145/317825.317833},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/SaucierT85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jss/CuykendallDJJKMMSS84,
author = {Robert Cuykendall and
Antun Domic and
William H. Joyner and
Stephen C. Johnson and
Steven H. Kelem and
Dennis McBride and
Jack Mostow and
John E. Savage and
Gabriele Saucier},
title = {Design synthesis in {VLSI} and software engineering},
journal = {J. Syst. Softw.},
volume = {4},
number = {1},
pages = {7--12},
year = {1984},
url = {https://doi.org/10.1016/0164-1212(84)90017-7},
doi = {10.1016/0164-1212(84)90017-7},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jss/CuykendallDJJKMMSS84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/SaucierB84,
author = {Gabriele Saucier and
Catherine Bellon},
editor = {Patricia H. Lambert and
Hillel Ofek and
Lawrence A. O'Neill and
Pat O. Pistilli and
Paul Losleben and
J. Daniel Nash and
Dennis W. Shaklee and
Bryan T. Preas and
Harvey N. Lerman},
title = {{VLSI} test expertise system using a control flow model},
booktitle = {Proceedings of the 21st Design Automation Conference, {DAC} '84, Albuquerque,
New Mexico, June 25-27, 1984},
pages = {497--503},
publisher = {{ACM/IEEE}},
year = {1984},
url = {http://dl.acm.org/citation.cfm?id=800845},
timestamp = {Thu, 12 Aug 2021 08:58:02 +0200},
biburl = {https://dblp.org/rec/conf/dac/SaucierB84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BellonS84,
author = {Catherine Bellon and
Gabriele Saucier},
title = {{CADOC} : {A} System for Computer Aided Functional Test},
booktitle = {Proceedings International Test Conference 1984, Philadelphia, PA,
USA, October 1984},
pages = {680--689},
publisher = {{IEEE} Computer Society},
year = {1984},
timestamp = {Fri, 22 Nov 2002 13:40:15 +0100},
biburl = {https://dblp.org/rec/conf/itc/BellonS84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BellonS82,
author = {Catherine Bellon and
Gabriele Saucier},
title = {Protection Against External Errors in a Dedicated System},
journal = {{IEEE} Trans. Computers},
volume = {31},
number = {4},
pages = {311--317},
year = {1982},
url = {https://doi.org/10.1109/TC.1982.1675997},
doi = {10.1109/TC.1982.1675997},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BellonS82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BellonLSSVGI82,
author = {Catherine Bellon and
A. Liothin and
Sylvain Sadier and
Gabriele Saucier and
Raoul Velazco and
Francois Grillot and
M. Issenman},
editor = {James S. Crabbe and
Charles E. Radke and
Hillel Ofek},
title = {Automatic generation of microprocessor test programs},
booktitle = {Proceedings of the 19th Design Automation Conference, {DAC} '82, Las
Vegas, Nevada, USA, June 14-16, 1982},
pages = {566--573},
publisher = {{ACM/IEEE}},
year = {1982},
url = {https://doi.org/10.1145/800263.809260},
doi = {10.1145/800263.809260},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BellonLSSVGI82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BassetS82,
author = {Philippe Basset and
Gabriele Saucier},
editor = {James S. Crabbe and
Charles E. Radke and
Hillel Ofek},
title = {Top down design and testability of {VLSI} circuits},
booktitle = {Proceedings of the 19th Design Automation Conference, {DAC} '82, Las
Vegas, Nevada, USA, June 14-16, 1982},
pages = {851--857},
publisher = {{ACM/IEEE}},
year = {1982},
url = {https://doi.org/10.1145/800263.809299},
doi = {10.1145/800263.809299},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BassetS82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BellonSG81,
author = {Catherine Bellon and
Gabriele Saucier and
Jos{\'{e}}{-}Maria Gobbi},
editor = {Robert J. Smith},
title = {Hardware description levels and test for complex circuits},
booktitle = {Proceedings of the 18th Design Automation Conference, {DAC} '81, Nashville,
Tennessee, USA, June 29 - July 1, 1981},
pages = {213--219},
publisher = {{ACM/IEEE}},
year = {1981},
url = {http://dl.acm.org/citation.cfm?id=802302},
timestamp = {Wed, 31 Mar 2021 10:47:13 +0200},
biburl = {https://dblp.org/rec/conf/dac/BellonSG81.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RobachS78,
author = {Chantal Robach and
Gabriele Saucier},
title = {Dynamic Testing of Control Units},
journal = {{IEEE} Trans. Computers},
volume = {27},
number = {7},
pages = {617--623},
year = {1978},
url = {https://doi.org/10.1109/TC.1978.1675161},
doi = {10.1109/TC.1978.1675161},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/RobachS78.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RobachSL76,
author = {Chantal Robach and
Gabriele Saucier and
J. Lebrun},
title = {Processor Testability and Design Consequences},
journal = {{IEEE} Trans. Computers},
volume = {25},
number = {6},
pages = {645--652},
year = {1976},
url = {https://doi.org/10.1109/TC.1976.1674666},
doi = {10.1109/TC.1976.1674666},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/RobachSL76.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/MoallaSSZ76,
author = {M. Moalla and
Gabriele Saucier and
Joseph Sifakis and
Marianthi Zachariades},
editor = {Michael J. Flynn and
Oscar N. Garcia and
Daniel P. Siewiorek},
title = {A Design Tool for the Multilevel Description and Simulation of Systems
of Interconnected Modules},
booktitle = {Proceedings of the 3rd Annual Symposium on Computer Architecture,
Clearwater, FL, USA, January 1976},
pages = {20--27},
publisher = {{ACM}},
year = {1976},
url = {https://doi.org/10.1145/800110.803543},
doi = {10.1145/800110.803543},
timestamp = {Mon, 19 Jul 2021 11:32:48 +0200},
biburl = {https://dblp.org/rec/conf/isca/MoallaSSZ76.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RobachS75,
author = {Chantal Robach and
Gabriele Saucier},
title = {Diversified Test Methods for Local Control Units},
journal = {{IEEE} Trans. Computers},
volume = {24},
number = {5},
pages = {562--567},
year = {1975},
url = {https://doi.org/10.1109/T-C.1975.224261},
doi = {10.1109/T-C.1975.224261},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/RobachS75.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/CourtoisS75,
author = {Bernard Courtois and
Gabriele Saucier},
editor = {William P. Lidinsky and
Masahivo Tsuchiya and
Arvind},
title = {On balancing hardware-firmware for designing a fault-tolerant computers'
series},
booktitle = {Proceedings of the 8th annual workshop on Microprogramming, {MICRO}
1975, Chicago, Illinois, USA, September 21-23, 1975},
pages = {1--5},
publisher = {{ACM}},
year = {1975},
url = {https://doi.org/10.1145/800148.804854},
doi = {10.1145/800148.804854},
timestamp = {Wed, 04 Aug 2021 12:34:41 +0200},
biburl = {https://dblp.org/rec/conf/micro/CourtoisS75.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Saucier72,
author = {Gabriele Saucier},
title = {State Assignment of Asynchronous Sequential Machines Using Graph Techniques},
journal = {{IEEE} Trans. Computers},
volume = {21},
number = {3},
pages = {282--288},
year = {1972},
url = {https://doi.org/10.1109/TC.1972.5008950},
doi = {10.1109/TC.1972.5008950},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Saucier72.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Saucier72a,
author = {Gabriele Saucier},
title = {Next-State Equations of Asynchronous Sequential Machines},
journal = {{IEEE} Trans. Computers},
volume = {21},
number = {4},
pages = {397--399},
year = {1972},
url = {https://doi.org/10.1109/TC.1972.5008984},
doi = {10.1109/TC.1972.5008984},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Saucier72a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/SaucierSchnebelen70,
author = {Gabri{\`{e}}le Saucier},
title = {Codage des automates asynchrones},
school = {Joseph Fourier University, Grenoble, France},
year = {1970},
url = {https://tel.archives-ouvertes.fr/tel-00008418},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/SaucierSchnebelen70.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Saucier67,
author = {Gabri{\`{e}}le Saucier},
title = {Encoding of Asynchronous Sequential Networks},
journal = {{IEEE} Trans. Electron. Comput.},
volume = {16},
number = {3},
pages = {365--369},
year = {1967},
url = {https://doi.org/10.1109/PGEC.1967.264698},
doi = {10.1109/PGEC.1967.264698},
timestamp = {Wed, 20 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Saucier67.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/hal/Saucier64,
author = {Gabri{\`{e}}le Saucier},
title = {Codage des tableaux d'{\'{e}}tats des syst{\`{e}}mes s{\'{e}}quentiels
asynchrones},
school = {Joseph Fourier University, Grenoble, France},
year = {1964},
url = {https://tel.archives-ouvertes.fr/tel-00008414},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/phd/hal/Saucier64.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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