Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Edwin Rijpkema
@article{DBLP:journals/tcad/RadulescuDPGRWG05,
author = {Andrei Radulescu and
John Dielissen and
Santiago Gonz{\'{a}}lez Pestana and
Om Prakash Gangwal and
Edwin Rijpkema and
Paul Wielage and
Kees Goossens},
title = {An efficient on-chip {NI} offering guaranteed services, shared-memory
abstraction, and flexible network configuration},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {24},
number = {1},
pages = {4--17},
year = {2005},
url = {https://doi.org/10.1109/TCAD.2004.839493},
doi = {10.1109/TCAD.2004.839493},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RadulescuDPGRWG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/GebremichaelVZGRR05,
author = {Biniam Gebremichael and
Frits W. Vaandrager and
Miaomiao Zhang and
Kees Goossens and
Edwin Rijpkema and
Andrei Radulescu},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Deadlock Prevention in the {\AE}thereal Protocol},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {345--348},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_28},
doi = {10.1007/11560548\_28},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/charme/GebremichaelVZGRR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GoossensDGPRR05,
author = {Kees Goossens and
John Dielissen and
Om Prakash Gangwal and
Santiago Gonz{\'{a}}lez Pestana and
Andrei Radulescu and
Edwin Rijpkema},
title = {A Design Flow for Application-Specific Networks on Chip with Guaranteed
Performance to Accelerate {SOC} Design and Verification},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {1182--1187},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.11},
doi = {10.1109/DATE.2005.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/GoossensDGPRR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PestanaRRGG04,
author = {Santiago Gonz{\'{a}}lez Pestana and
Edwin Rijpkema and
Andrei Radulescu and
Kees Goossens and
Om Prakash Gangwal},
title = {Cost-Performance Trade-Offs in Networks on Chip: {A} Simulation-Based
Approach},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {764--769},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1268972},
doi = {10.1109/DATE.2004.1268972},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PestanaRRGG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RadulescuDGRW04,
author = {Andrei Radulescu and
John Dielissen and
Kees Goossens and
Edwin Rijpkema and
Paul Wielage},
title = {An Efficient On-Chip Network Interface Offering Guaranteed Services,
Shared-Memory Abstraction, and Flexible Network Configuration},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {878--883},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1268998},
doi = {10.1109/DATE.2004.1268998},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/RadulescuDGRW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RijpkemaGRDMWW03,
author = {Edwin Rijpkema and
Kees G. W. Goossens and
Andrei Radulescu and
John Dielissen and
Jef L. van Meerbergen and
Paul Wielage and
Erwin Waterlander},
title = {Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort
Services for Networks on Chip},
booktitle = {2003 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2003), 3-7 March 2003, Munich, Germany},
pages = {10350--10355},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/DATE.2003.10100},
doi = {10.1109/DATE.2003.10100},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/RijpkemaGRDMWW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/03/GoossensDMPRRWW03,
author = {Kees Goossens and
John Dielissen and
Jef L. van Meerbergen and
Peter Poplavko and
Andrei Radulescu and
Edwin Rijpkema and
Erwin Waterlander and
Paul Wielage},
editor = {Axel Jantsch and
Hannu Tenhunen},
title = {Guaranteeing the Quality of Services in Networks on Chip},
booktitle = {Networks on Chip},
pages = {61--82},
publisher = {Kluwer / Springer},
year = {2003},
url = {https://doi.org/10.1007/0-306-48727-6\_4},
doi = {10.1007/0-306-48727-6\_4},
timestamp = {Thu, 18 Jul 2019 19:46:19 +0200},
biburl = {https://dblp.org/rec/books/sp/03/GoossensDMPRRWW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/DeprettereRK02,
author = {Ed F. Deprettere and
Edwin Rijpkema and
Bart Kienhuis},
editor = {Ed F. Deprettere and
J{\"{u}}rgen Teich and
Stamatis Vassiliadis},
title = {Translating Imperative Affine Nested Loop Programs into Process Networks},
booktitle = {Embedded Processor Design Challenges: Systems, Architectures, Modeling,
and Simulation - {SAMOS}},
series = {Lecture Notes in Computer Science},
volume = {2268},
pages = {89--111},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-45874-3\_6},
doi = {10.1007/3-540-45874-3\_6},
timestamp = {Tue, 14 May 2019 10:00:45 +0200},
biburl = {https://dblp.org/rec/conf/samos/DeprettereRK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ppl/RijpkemaDK00,
author = {Edwin Rijpkema and
Ed F. Deprettere and
Bart Kienhuis},
title = {Deriving Process Networks from Nested Loop Algorithms},
journal = {Parallel Process. Lett.},
volume = {10},
number = {2/3},
pages = {165--176},
year = {2000},
url = {https://doi.org/10.1142/S0129626400000172},
doi = {10.1142/S0129626400000172},
timestamp = {Tue, 24 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ppl/RijpkemaDK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DeprettereRLK00,
author = {Ed F. Deprettere and
Edwin Rijpkema and
Paul Lieverse and
Bart Kienhuis},
title = {High Level Modeling for Parallel Executions of Nested Loop Algorithms},
booktitle = {12th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2000), 10-12 July 2000, Boston,
MA, {USA}},
pages = {79--91},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.org/10.1109/ASAP.2000.862380},
doi = {10.1109/ASAP.2000.862380},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DeprettereRLK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/KienhuisRD00,
author = {Bart Kienhuis and
Edwin Rijpkema and
Ed F. Deprettere},
editor = {Frank Vahid and
Jan Madsen},
title = {Compaan: deriving process networks from Matlab for embedded signal
processing architectures},
booktitle = {Proceedings of the Eighth International Workshop on Hardware/Software
Codesign, {CODES} 2000, San Diego, California, USA, 2000},
pages = {13--17},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/334012.334015},
doi = {10.1145/334012.334015},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/codes/KienhuisRD00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RijpkemaHDM97,
author = {Edwin Rijpkema and
Gerben J. Hekstra and
Ed F. Deprettere and
Jun Ma},
title = {A strategy for determining a Jacobi specific dataflow processor},
booktitle = {1997 International Conference on Application-Specific Systems, Architectures,
and Processors {(ASAP} '97), 14-16 July 1997, Zurich, Switzerland},
pages = {53},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ASAP.1997.606812},
doi = {10.1109/ASAP.1997.606812},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RijpkemaHDM97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-25 01:59 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
