BibTeX records: Ilan Pragaspathi

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@inproceedings{DBLP:conf/isscc/MillerBKKMSKVYLHSKPHCYXMCSABVTLKFJ12,
  author       = {Brian Miller and
                  Derek Brasili and
                  Tim Kiszely and
                  Rob Kuhn and
                  Rahul Mehrotra and
                  Manan Salvi and
                  Mandar Kulkarni and
                  Anand Varadharajan and
                  Shi{-}Huang Yin and
                  William Lin and
                  Adam Hughes and
                  Bill Stysiack and
                  Vasu Kandadi and
                  Ilan Pragaspathi and
                  Dan Hartman and
                  David Carlson and
                  Vishnu Yalala and
                  Thucydides Xanthopoulos and
                  Scott E. Meninger and
                  Ethan Crain and
                  Mark Spaeth and
                  Akin Aina and
                  Suresh Balasubramanian and
                  Joe Vulih and
                  Pragati Tiwary and
                  David Lin and
                  Richard Kessler and
                  Bruce Fishbein and
                  Anil Jain},
  title        = {A 32-core {RISC} microprocessor with network accelerators, power management
                  and testability features},
  booktitle    = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2012, San Francisco, CA, USA, February 19-23, 2012},
  pages        = {58--60},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSCC.2012.6176877},
  doi          = {10.1109/ISSCC.2012.6176877},
  timestamp    = {Fri, 15 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/MillerBKKMSKVYLHSKPHCYXMCSABVTLKFJ12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}