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ORCIDBibTeX records: Dhiraj K. Pradhan
@article{DBLP:journals/dt/GaurSMFP21,
author = {Hari Mohan Gaur and
Ashutosh Kumar Singh and
Anand Mohan and
Masahiro Fujita and
Dhiraj K. Pradhan},
title = {Design of Single-Bit Fault-Tolerant Reversible Circuits},
journal = {{IEEE} Des. Test},
volume = {38},
number = {2},
pages = {89--96},
year = {2021},
url = {https://doi.org/10.1109/MDAT.2020.3006808},
doi = {10.1109/MDAT.2020.3006808},
timestamp = {Thu, 14 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/GaurSMFP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/MathewRPP17,
author = {Jimson Mathew and
Hafizur Rahaman and
Priyadarsan Patra and
Dhiraj K. Pradhan},
title = {Selected Articles from the {IEEE} {ISED} 2016 Conference},
journal = {J. Low Power Electron.},
volume = {13},
number = {4},
pages = {605--606},
year = {2017},
url = {https://doi.org/10.1166/jolpe.2017.1526},
doi = {10.1166/JOLPE.2017.1526},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/MathewRPP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MathewCP17,
author = {Jimson Mathew and
Rajat Subhra Chakraborty and
Dhiraj K. Pradhan},
title = {Guest Editorial: Special Issue on "Secure and Fault-Tolerant
Embedded Computing"},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {4},
pages = {92:1--92:2},
year = {2017},
url = {https://doi.org/10.1145/3075563},
doi = {10.1145/3075563},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MathewCP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tr/BandanPMP17,
author = {Mohamad Imran Bin Bandan and
Samuel Nascimento Pagliarini and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Improved Multiple Faults-Aware Placement Strategy: Reducing the Overheads
and Error Rates in Digital Circuits},
journal = {{IEEE} Trans. Reliab.},
volume = {66},
number = {1},
pages = {233--244},
year = {2017},
url = {https://doi.org/10.1109/TR.2016.2643010},
doi = {10.1109/TR.2016.2643010},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tr/BandanPMP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChatterjeeCMP16,
author = {Urbi Chatterjee and
Rajat Subhra Chakraborty and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Memristor Based Arbiter {PUF:} Cryptanalysis Threat and Its Mitigation},
booktitle = {29th International Conference on {VLSI} Design and 15th International
Conference on Embedded Systems, {VLSID} 2016, Kolkata, India, January
4-8, 2016},
pages = {535--540},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/VLSID.2016.57},
doi = {10.1109/VLSID.2016.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChatterjeeCMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/MathewCSYP15,
author = {Jimson Mathew and
Rajat Subhra Chakraborty and
Durga Prasad Sahoo and
Yuanfan Yang and
Dhiraj K. Pradhan},
title = {A novel memristor based physically unclonable function},
journal = {Integr.},
volume = {51},
pages = {37--45},
year = {2015},
url = {https://doi.org/10.1016/j.vlsi.2015.05.005},
doi = {10.1016/J.VLSI.2015.05.005},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/MathewCSYP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/MathewRPP15,
author = {Jimson Mathew and
Hafizur Rahaman and
Priyadarsan Patra and
Dhiraj K. Pradhan},
title = {Selected Articles from the {IEEE} {ISED} 2014 Conference},
journal = {J. Low Power Electron.},
volume = {11},
number = {3},
pages = {373--374},
year = {2015},
url = {https://doi.org/10.1166/jolpe.2015.1405},
doi = {10.1166/JOLPE.2015.1405},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/MathewRPP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/MathewCSYP15,
author = {Jimson Mathew and
Rajat Subhra Chakraborty and
Durga Prasad Sahoo and
Yuanfan Yang and
Dhiraj K. Pradhan},
title = {A Novel Memristor-Based Hardware Security Primitive},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {14},
number = {3},
pages = {60:1--60:20},
year = {2015},
url = {https://doi.org/10.1145/2736285},
doi = {10.1145/2736285},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/MathewCSYP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tr/ShafikMP15,
author = {Rishad A. Shafik and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {A Low-Cost Unified Design Methodology for Secure Test and Intellectual
Property Core Protection},
journal = {{IEEE} Trans. Reliab.},
volume = {64},
number = {4},
pages = {1243--1253},
year = {2015},
url = {https://doi.org/10.1109/TR.2015.2464011},
doi = {10.1109/TR.2015.2464011},
timestamp = {Thu, 09 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tr/ShafikMP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/Poolakkaparambil15,
author = {Mahesh Poolakkaparambil and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {A Low-Complexity Multiple Error Correcting Architecture Using Novel
Cross Parity Codes Over GF(2\({}^{\mbox{m}}\))},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {23},
number = {8},
pages = {1448--1458},
year = {2015},
url = {https://doi.org/10.1109/TVLSI.2014.2341631},
doi = {10.1109/TVLSI.2014.2341631},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/Poolakkaparambil15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MathewYOBZCJP15,
author = {Jimson Mathew and
Yuamfam Yang and
M. Ottavia and
T. Browna and
A. Zampettia and
A. Di Carloa and
A. M. Jabirb and
Dhiraj K. Pradhan},
title = {Fault detection and repair of {DSC} arrays through memristor sensing},
booktitle = {2015 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2015, Amherst, MA, USA,
October 12-14, 2015},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DFT.2015.7315127},
doi = {10.1109/DFT.2015.7315127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MathewYOBZCJP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/AdeyemoMJP15,
author = {Adedotun A. Adeyemo and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {Exploring error-tolerant low-power multiple-output read scheme for
memristor-based memory arrays},
booktitle = {2015 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2015, Amherst, MA, USA,
October 12-14, 2015},
pages = {17--20},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/DFT.2015.7315129},
doi = {10.1109/DFT.2015.7315129},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/AdeyemoMJP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dtis/YangMOPP15,
author = {Yuanfan Yang and
Jimson Mathew and
Marco Ottavi and
Salvatore Pontarelli and
Dhiraj K. Pradhan},
title = {2T2M memristor based {TCAM} cell for low power applications},
booktitle = {10th International Conference on Design {\&} Technology of Integrated
Systems in Nanoscale Era, {DTIS} 2015, Napoli, Italy, April 21-23,
2015},
pages = {1--6},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/DTIS.2015.7127379},
doi = {10.1109/DTIS.2015.7127379},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/dtis/YangMOPP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/esl/YangMSP14,
author = {Yuanfan Yang and
Jimson Mathew and
Rishad A. Shafik and
Dhiraj K. Pradhan},
title = {Verilog-A Based Effective Complementary Resistive Switch Model for
Simulations and Analysis},
journal = {{IEEE} Embed. Syst. Lett.},
volume = {6},
number = {1},
pages = {12--15},
year = {2014},
url = {https://doi.org/10.1109/LES.2013.2278740},
doi = {10.1109/LES.2013.2278740},
timestamp = {Thu, 10 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/esl/YangMSP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BandanBPM14,
author = {Mohamad Imran Bin Bandan and
Subhasis Bhattacharjee and
Dhiraj K. Pradhan and
Jimson Mathew},
title = {Energy Efficient Lifetime Reliability-Aware Checkpointing for Real-Time
System},
journal = {J. Low Power Electron.},
volume = {10},
number = {3},
pages = {401--416},
year = {2014},
url = {https://doi.org/10.1166/jolpe.2014.1343},
doi = {10.1166/JOLPE.2014.1343},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/BandanBPM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/SunMPPS14,
author = {Luo Sun and
Jimson Mathew and
Samuel N. Pagliarini and
Dhiraj K. Pradhan and
Ioannis Sourdis},
title = {Design and Analysis of Binary Tree Static Random Access Memory for
Low Power Embedded Systems},
journal = {J. Low Power Electron.},
volume = {10},
number = {3},
pages = {467--478},
year = {2014},
url = {https://doi.org/10.1166/jolpe.2014.1336},
doi = {10.1166/JOLPE.2014.1336},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/SunMPPS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/SourdisSABFGIMMPPPRSSSTTV14,
author = {Ioannis Sourdis and
Christos Strydis and
Antonino Armato and
Christos{-}Savvas Bouganis and
Babak Falsafi and
Georgi Nedeltchev Gaydadjiev and
Sebasti{\'{a}}n Isaza and
Alirad Malek and
R. Mariani and
Samuel N. Pagliarini and
Dionisios N. Pnevmatikatos and
Dhiraj K. Pradhan and
Gerard K. Rauwerda and
Robert M. Seepers and
Rishad Ahmed Shafik and
Georgios Smaragdos and
Dimitris Theodoropoulos and
Stavros Tzilis and
Michalis Vavouras},
editor = {Diana Goehringer and
Marco Domenico Santambrogio and
Jo{\~{a}}o M. P. Cardoso and
Koen Bertels},
title = {DeSyRe: On-Demand Adaptive and Reconfigurable Fault-Tolerant SoCs},
booktitle = {Reconfigurable Computing: Architectures, Tools, and Applications -
10th International Symposium, {ARC} 2014, Vilamoura, Portugal, April
14-16, 2014. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8405},
pages = {312--317},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-05960-0\_34},
doi = {10.1007/978-3-319-05960-0\_34},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/SourdisSABFGIMMPPPRSSSTTV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SunMSPL14,
author = {Luo Sun and
Jimson Mathew and
Rishad A. Shafik and
Dhiraj K. Pradhan and
Zhen Li},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {A low power and robust carbon nanotube 6T {SRAM} design with metallic
tolerance},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--4},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.125},
doi = {10.7873/DATE.2014.125},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/SunMSPL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/YangMPOP14,
author = {Yuanfan Yang and
Jimson Mathew and
Dhiraj K. Pradhan and
Marco Ottavi and
Salvatore Pontarelli},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Complementary resistive switch based stateful logic operations using
material implication},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--4},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.198},
doi = {10.7873/DATE.2014.198},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/YangMPOP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MathewOYP14,
author = {Jimson Mathew and
Marco Ottavi and
Yunfan Yang and
Dhiraj K. Pradhan},
title = {Using memristor state change behavior to identify faults in photovoltaic
arrays},
booktitle = {2014 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFT} 2014, Amsterdam, The Netherlands,
October 1-3, 2014},
pages = {86--91},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/DFT.2014.6962094},
doi = {10.1109/DFT.2014.6962094},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MathewOYP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/PagliariniP14,
author = {Samuel N. Pagliarini and
Dhiraj K. Pradhan},
title = {A placement strategy for reducing the effects of multiple faults in
digital circuits},
booktitle = {2014 {IEEE} 20th International On-Line Testing Symposium, {IOLTS}
2014, Platja d'Aro, Girona, Spain, July 7-9, 2014},
pages = {69--74},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/IOLTS.2014.6873674},
doi = {10.1109/IOLTS.2014.6873674},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/PagliariniP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/PagliariniNNP14,
author = {Samuel N. Pagliarini and
Lirida A. B. Naviner and
Jean{-}Fran{\c{c}}ois Naviner and
Dhiraj K. Pradhan},
title = {A hybrid reliability assessment method and its support of sequential
logic modelling},
booktitle = {2014 {IEEE} 20th International On-Line Testing Symposium, {IOLTS}
2014, Platja d'Aro, Girona, Spain, July 7-9, 2014},
pages = {182--183},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/IOLTS.2014.6873690},
doi = {10.1109/IOLTS.2014.6873690},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/PagliariniNNP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/AdeyemoMJP14,
author = {Adedotun Adeyemo and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {Write scheme for multiple Complementary Resistive Switch {(CRS)} cells},
booktitle = {24th International Workshop on Power and Timing Modeling, Optimization
and Simulation, PATMOS), Palma de Mallorca, Spain, September 29 -
Oct. 1, 2014},
pages = {1--5},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/PATMOS.2014.6951897},
doi = {10.1109/PATMOS.2014.6951897},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/patmos/AdeyemoMJP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cee/MathewMBPJ13,
author = {Jimson Mathew and
Saraju P. Mohanty and
Shibaji Banerjee and
Dhiraj K. Pradhan and
Abusaleh M. Jabir},
title = {Attack tolerant cryptographic hardware design by combining error correction
and uniform switching activity},
journal = {Comput. Electr. Eng.},
volume = {39},
number = {4},
pages = {1077--1087},
year = {2013},
url = {https://doi.org/10.1016/j.compeleceng.2013.01.001},
doi = {10.1016/J.COMPELECENG.2013.01.001},
timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cee/MathewMBPJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/SourdisSABFGIMMPPRSSSTTV13,
author = {Ioannis Sourdis and
Christos Strydis and
Antonino Armato and
Christos{-}Savvas Bouganis and
Babak Falsafi and
Georgi Nedeltchev Gaydadjiev and
Sebasti{\'{a}}n Isaza and
Alirad Malek and
R. Mariani and
Dionisios N. Pnevmatikatos and
Dhiraj K. Pradhan and
Gerard K. Rauwerda and
Robert M. Seepers and
Rishad A. Shafik and
Kim Sunesen and
Dimitris Theodoropoulos and
Stavros Tzilis and
Michalis Vavouras},
title = {DeSyRe: On-demand system reliability},
journal = {Microprocess. Microsystems},
volume = {37},
number = {8-C},
pages = {981--1001},
year = {2013},
url = {https://doi.org/10.1016/j.micpro.2013.08.008},
doi = {10.1016/J.MICPRO.2013.08.008},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/SourdisSABFGIMMPPRSSSTTV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HuangMSBP13,
author = {Xiaoyu Huang and
Jimson Mathew and
Rishad A. Shafik and
Subhasis Bhattacharjee and
Dhiraj K. Pradhan},
editor = {Enrico Macii},
title = {A fast and Effective {DFT} for test and diagnosis of power switches
in SoCs},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1089--1092},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.229},
doi = {10.7873/DATE.2013.229},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/HuangMSBP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/ShafikRPSPMS13,
author = {Rishad A. Shafik and
Gerard K. Rauwerda and
Jordy Potman and
Kim Sunesen and
Dhiraj K. Pradhan and
Jimson Mathew and
Ioannis Sourdis},
title = {Software Modification Aided Transient Error Tolerance for Embedded
Systems},
booktitle = {2013 Euromicro Conference on Digital System Design, {DSD} 2013, Los
Alamitos, CA, USA, September 4-6, 2013},
pages = {219--226},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DSD.2013.32},
doi = {10.1109/DSD.2013.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/ShafikRPSPMS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/GangGMP13,
author = {Li Gang and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Multinomial Memristor Model for Simulations and Analysis},
booktitle = {2013 International Symposium on Electronic System Design, Singapore,
December 10-12, 2013},
pages = {57--61},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ISED.2013.18},
doi = {10.1109/ISED.2013.18},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/ised/GangGMP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/SunMSP13,
author = {Luo Sun and
Jimson Mathew and
Rishad A. Shafik and
Dhiraj K. Pradhan},
title = {Low Power and Robust Binary Tree {SRAM} Design for Embedded Systems},
booktitle = {2013 International Symposium on Electronic System Design, Singapore,
December 10-12, 2013},
pages = {87--92},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ISED.2013.24},
doi = {10.1109/ISED.2013.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ised/SunMSP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/BandanBSPM13,
author = {Mohamad Imran Bin Bandan and
Subhasis Bhattacharjee and
Rishad A. Shafik and
Dhiraj K. Pradhan and
Jimson Mathew},
title = {Lifetime Reliability-Aware Checkpointing Mechanism: Modelling and
Analysis},
booktitle = {2013 International Symposium on Electronic System Design, Singapore,
December 10-12, 2013},
pages = {128--132},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ISED.2013.32},
doi = {10.1109/ISED.2013.32},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ised/BandanBSPM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/integration/MohantySKP12,
author = {Saraju P. Mohanty and
Jawar Singh and
Elias Kougianos and
Dhiraj K. Pradhan},
title = {Statistical {DOE-ILP} based power-performance-process {(P3)} optimization
of nano-CMOS {SRAM}},
journal = {Integr.},
volume = {45},
number = {1},
pages = {33--45},
year = {2012},
url = {https://doi.org/10.1016/j.vlsi.2011.07.001},
doi = {10.1016/J.VLSI.2011.07.001},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/integration/MohantySKP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/SunMPM12,
author = {Luo Sun and
Jimson Mathew and
Dhiraj K. Pradhan and
Saraju P. Mohanty},
title = {Enhanced Statistical Blockade Approaches for Fast Robustness Estimation
and Compensation of Nano-CMOS Circuits},
journal = {J. Low Power Electron.},
volume = {8},
number = {3},
pages = {270--282},
year = {2012},
url = {https://doi.org/10.1166/jolpe.2012.1191},
doi = {10.1166/JOLPE.2012.1191},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/SunMPM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SourdisSBFGMMPPRST12,
author = {Ioannis Sourdis and
Christos Strydis and
Christos{-}Savvas Bouganis and
Babak Falsafi and
Georgi Nedeltchev Gaydadjiev and
Alirad Malek and
R. Mariani and
Dionisios N. Pnevmatikatos and
Dhiraj K. Pradhan and
Gerard K. Rauwerda and
Kim Sunesen and
Stavros Tzilis},
title = {The DeSyRe Project: On-Demand System Reliability},
booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
Izmir, Turkey, September 5-8, 2012},
pages = {335--342},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/DSD.2012.127},
doi = {10.1109/DSD.2012.127},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dsd/SourdisSBFGMMPPRST12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YeolekarSMPM12,
author = {Pranav Yeolekar and
Rishad A. Shafik and
Jimson Mathew and
Dhiraj K. Pradhan and
Saraju P. Mohanty},
editor = {Erik Brunvard and
Ken Stevens and
Joseph R. Cavallaro and
Tong Zhang},
title = {{STEP:} a unified design methodology for secure test and {IP} core
protection},
booktitle = {Great Lakes Symposium on {VLSI} 2012, GLSVLSI'12, Salt Lake City,
UT, USA, May 3-4, 2012},
pages = {333--338},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2206781.2206862},
doi = {10.1145/2206781.2206862},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YeolekarSMPM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/GaladanciSMAP12,
author = {Jamil Galadanci and
Rishad A. Shafik and
Jimson Mathew and
Amit Acharyya and
Dhiraj K. Pradhan},
title = {A Closed-Loop Control Strategy for Glucose Control in Artificial Pancreas
Systems},
booktitle = {International Symposium on Electronic System Design, ISEDs 2012, Kolkata,
India, December 19-22, 2012},
pages = {295--299},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISED.2012.76},
doi = {10.1109/ISED.2012.76},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ised/GaladanciSMAP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ShafikAMPM12,
author = {Rishad A. Shafik and
Bashir M. Al{-}Hashimi and
Jimson Mathew and
Dhiraj K. Pradhan and
Saraju P. Mohanty},
title = {{RAEF:} {A} Power Normalized System-Level Reliability Analysis and
Estimation Framework},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2012, Amherst,
MA, USA, August 19-21, 2012},
pages = {189--194},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISVLSI.2012.42},
doi = {10.1109/ISVLSI.2012.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ShafikAMPM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vdat/RahamanMJP12,
author = {Hafizur Rahaman and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
editor = {Hafizur Rahaman and
Sanatan Chattopadhyay and
Santanu Chattopadhyay},
title = {{VLSI} Architecture for Bit Parallel Systolic Multipliers for Special
Class of {GF(2} m )Using Dual Bases},
booktitle = {Progress in {VLSI} Design and Test - 16th International Symposium,
{VDAT} 2012, Shibpur, India, July 1-4, 2012. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {7373},
pages = {258--269},
publisher = {Springer},
year = {2012},
url = {https://doi.org/10.1007/978-3-642-31494-0\_30},
doi = {10.1007/978-3-642-31494-0\_30},
timestamp = {Tue, 22 Oct 2019 15:21:19 +0200},
biburl = {https://dblp.org/rec/conf/vdat/RahamanMJP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/MathewMJRP11,
author = {Jimson Mathew and
Koushik Maharatna and
Babita R. Jose and
Hafizur Rahaman and
Dhiraj K. Pradhan},
title = {Pseudo-Parallel Datapath Structure for Power Optimal Implementation
of 128-pt {FFT/IFFT} for {WPAN}},
journal = {Circuits Syst. Signal Process.},
volume = {30},
number = {4},
pages = {871--882},
year = {2011},
url = {https://doi.org/10.1007/s00034-011-9308-7},
doi = {10.1007/S00034-011-9308-7},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cssp/MathewMJRP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/MaestroRAP11,
author = {Juan Antonio Maestro and
Pedro Reviriego and
Costas Argyrides and
Dhiraj K. Pradhan},
title = {Fault Tolerant Single Error Correction Encoders},
journal = {J. Electron. Test.},
volume = {27},
number = {2},
pages = {215--218},
year = {2011},
url = {https://doi.org/10.1007/s10836-011-5208-9},
doi = {10.1007/S10836-011-5208-9},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/MaestroRAP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijsnet/MishraMP11,
author = {Vishram Mishra and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Fault-tolerant de-Bruijn graph based multipurpose architecture and
routing protocol for wireless sensor networks},
journal = {Int. J. Sens. Networks},
volume = {10},
number = {3},
pages = {160--175},
year = {2011},
url = {https://doi.org/10.1504/IJSNET.2011.042199},
doi = {10.1504/IJSNET.2011.042199},
timestamp = {Thu, 06 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijsnet/MishraMP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/BanerjeeMMPC11,
author = {Shibaji Banerjee and
Jimson Mathew and
Saraju P. Mohanty and
Dhiraj K. Pradhan and
Maciej J. Ciesielski},
title = {A Variation-Aware Taylor Expansion Diagram-Based Approach for Nano-CMOS
Register-Transfer Level Leakage Optimization},
journal = {J. Low Power Electron.},
volume = {7},
number = {4},
pages = {471--481},
year = {2011},
url = {https://doi.org/10.1166/jolpe.2011.1160},
doi = {10.1166/JOLPE.2011.1160},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/BanerjeeMMPC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tr/ArgyridesCVP11,
author = {Costas Argyrides and
Raul Chipana and
Fabian Vargas and
Dhiraj K. Pradhan},
title = {Reliability Analysis of H-Tree Random Access Memories Implemented
With Built in Current Sensors and Parity Codes for Multiple Bit Upset
Correction},
journal = {{IEEE} Trans. Reliab.},
volume = {60},
number = {3},
pages = {528--537},
year = {2011},
url = {https://doi.org/10.1109/TR.2011.2161131},
doi = {10.1109/TR.2011.2161131},
timestamp = {Fri, 03 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tr/ArgyridesCVP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ArgyridesPK11,
author = {Costas Argyrides and
Dhiraj K. Pradhan and
Taskin Ko{\c{c}}ak},
title = {Matrix Codes for Reliable and Cost Efficient Memory Chips},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {3},
pages = {420--428},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2009.2036362},
doi = {10.1109/TVLSI.2009.2036362},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ArgyridesPK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/HosseinabadyKMP11,
author = {Mohammad Hosseinabady and
Mohammad Reza Kakoee and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Low Latency and Energy Efficient Scalable Architecture for Massive
NoCs Using Generalized de Bruijn Graph},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {8},
pages = {1469--1480},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2050914},
doi = {10.1109/TVLSI.2010.2050914},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/HosseinabadyKMP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BanerjeeMPBM11,
author = {Shibaji Banerjee and
Jimson Mathew and
Dhiraj K. Pradhan and
Bhargab B. Bhattacharya and
Saraju P. Mohanty},
title = {A Routing-Aware {ILS} Design Technique},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {12},
pages = {2335--2338},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2078526},
doi = {10.1109/TVLSI.2010.2078526},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/BanerjeeMPBM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecctd/PoolakkaparambilMJP11,
author = {Mahesh Poolakkaparambil and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {A dynamically error correctable bit parallel Montgomery multiplier
over binary extension fields},
booktitle = {20th European Conference on Circuit Theory and Design, {ECCTD} 2011,
Linkoping, Sweden, Aug. 29-31, 2011},
pages = {600--603},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ECCTD.2011.6043614},
doi = {10.1109/ECCTD.2011.6043614},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/ecctd/PoolakkaparambilMJP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/HosseinabadyLMM11,
author = {Mohammad Hosseinabady and
Pejman Lotfi{-}Kamran and
Jimson Mathew and
Saraju P. Mohanty and
Dhiraj K. Pradhan},
title = {Single-Event Transient Analysis in High Speed Circuits},
booktitle = {International Symposium on Electronic System Design, {ISED} 2011,
Kochi, Kerala, India, December 19-21, 2011},
pages = {112--117},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISED.2011.73},
doi = {10.1109/ISED.2011.73},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ised/HosseinabadyLMM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ised/SunMPM11,
author = {Luo Sun and
Jimson Mathew and
Dhiraj K. Pradhan and
Saraju P. Mohanty},
title = {Statistical Blockade Method for Fast Robustness Estimation and Compensation
of Nano-CMOS Arithmetic Circuits},
booktitle = {International Symposium on Electronic System Design, {ISED} 2011,
Kochi, Kerala, India, December 19-21, 2011},
pages = {194--199},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ISED.2011.64},
doi = {10.1109/ISED.2011.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ised/SunMPM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/PoolakkaparambilMJPM11,
author = {Mahesh Poolakkaparambil and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan and
Saraju P. Mohanty},
title = {{BCH} code based multiple bit error correction in finite field multiplier
circuits},
booktitle = {Proceedings of the 12th International Symposium on Quality Electronic
Design, {ISQED} 2011, Santa Clara, California, USA, 14-16 March 2011},
pages = {615--620},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISQED.2011.5770792},
doi = {10.1109/ISQED.2011.5770792},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/PoolakkaparambilMJPM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BanerjeeMPMC11,
author = {Shibaji Banerjee and
Jimson Mathew and
Dhiraj K. Pradhan and
Saraju P. Mohanty and
Maciej J. Ciesielski},
title = {Variation-Aware TED-Based Approach for Nano-CMOS {RTL} Leakage Optimization},
booktitle = {{VLSI} Design 2011: 24th International Conference on {VLSI} Design,
{IIT} Madras, Chennai, India, 2-7 January 2011},
pages = {304--309},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VLSID.2011.40},
doi = {10.1109/VLSID.2011.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BanerjeeMPMC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cj/RahamanMP10,
author = {Hafizur Rahaman and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Secure Testable S-box Architecture for Cryptographic Hardware Implementation},
journal = {Comput. J.},
volume = {53},
number = {5},
pages = {581--591},
year = {2010},
url = {https://doi.org/10.1093/comjnl/bxp048},
doi = {10.1093/COMJNL/BXP048},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cj/RahamanMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/MathewJSRP10,
author = {Jimson Mathew and
Abusaleh M. Jabir and
Ashutosh Kumar Singh and
Hafizur Rahaman and
Dhiraj K. Pradhan},
title = {A Galois field-based logic synthesis with testability},
journal = {{IET} Comput. Digit. Tech.},
volume = {4},
number = {4},
pages = {263--273},
year = {2010},
url = {https://doi.org/10.1049/iet-cdt.2009.0055},
doi = {10.1049/IET-CDT.2009.0055},
timestamp = {Thu, 14 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/MathewJSRP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/RahamanMJP10,
author = {Hafizur Rahaman and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {Simplified bit parallel systolic multipliers for special class of
galois field (2\({}^{\mbox{m}}\)) with testability},
journal = {{IET} Comput. Digit. Tech.},
volume = {4},
number = {5},
pages = {428--437},
year = {2010},
url = {https://doi.org/10.1049/iet-cdt.2009.0068},
doi = {10.1049/IET-CDT.2009.0068},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/RahamanMJP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/KocakP10,
author = {Taskin Ko{\c{c}}ak and
Dhiraj K. Pradhan},
title = {Introduction to design techniques for energy harvesting},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {6},
number = {2},
pages = {4:1--4:2},
year = {2010},
url = {https://doi.org/10.1145/1773814.1773815},
doi = {10.1145/1773814.1773815},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/KocakP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/MohantyP10,
author = {Saraju P. Mohanty and
Dhiraj K. Pradhan},
title = {{ULS:} {A} dual-\emph{V\({}_{\mbox{th}}\)}/high-kappa nano-CMOS universal
level shifter for system-level power management},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {6},
number = {2},
pages = {8:1--8:26},
year = {2010},
url = {https://doi.org/10.1145/1773814.1773819},
doi = {10.1145/1773814.1773819},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/MohantyP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/ThakralMPK10,
author = {Garima Thakral and
Saraju P. Mohanty and
Dhiraj K. Pradhan and
Elias Kougianos},
title = {{DOE-ILP} Based Simultaneous Power and Read Stability Optimization
in Nano-CMOS {SRAM}},
journal = {J. Low Power Electron.},
volume = {6},
number = {3},
pages = {390--400},
year = {2010},
url = {https://doi.org/10.1166/jolpe.2010.1093},
doi = {10.1166/JOLPE.2010.1093},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/ThakralMPK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RahamanMP10,
author = {Hafizur Rahaman and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Test Generation in Systolic Architecture for Multiplication Over {GF(2}
\({}^{\mbox{m}}\))},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {9},
pages = {1366--1371},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2023381},
doi = {10.1109/TVLSI.2009.2023381},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/RahamanMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SinghRMDVP10,
author = {Jawar Singh and
Krishnan Ramakrishnan and
Saurabh Mookerjea and
Suman Datta and
Narayanan Vijaykrishnan and
Dhiraj K. Pradhan},
title = {A novel si-tunnel {FET} based {SRAM} design for ultra low-power 0.3V
V\({}_{\mbox{\emph{DD}}}\) applications},
booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
pages = {181--186},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ASPDAC.2010.5419897},
doi = {10.1109/ASPDAC.2010.5419897},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SinghRMDVP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RickettsSRVP10,
author = {Andrew J. Ricketts and
Jawar Singh and
Krishnan Ramakrishnan and
Narayanan Vijaykrishnan and
Dhiraj K. Pradhan},
editor = {Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller and
Enrico Macii},
title = {Investigating the impact of {NBTI} on different power saving cache
strategies},
booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany,
March 8-12, 2010},
pages = {592--597},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DATE.2010.5457137},
doi = {10.1109/DATE.2010.5457137},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/RickettsSRVP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ewdts/MavrogiannakisAP10,
author = {Nikolaos Mavrogiannakis and
Costas Argyrides and
Dhiraj K. Pradhan},
title = {Improving reliability for bit parallel finite field multipliers using
Decimal Hamming},
booktitle = {2010 East-West Design {\&} Test Symposium, {EWDTS} 2010, St. Petersburg,
Russia, September 17-20, 2010},
pages = {69--72},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/EWDTS.2010.5742055},
doi = {10.1109/EWDTS.2010.5742055},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ewdts/MavrogiannakisAP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ThakralMGP10,
author = {Garima Thakral and
Saraju P. Mohanty and
Dhruva Ghai and
Dhiraj K. Pradhan},
editor = {R. Iris Bahar and
Fabrizio Lombardi and
David Atienza and
Erik Brunvand},
title = {A {DOE-ILP} assisted conjugate-gradient based power and stability
optimization in High-K Nano-CMOS {SRAM}},
booktitle = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
Providence, Rhode Island, USA, May 16-18 2010},
pages = {323--328},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1785481.1785556},
doi = {10.1145/1785481.1785556},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ThakralMGP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SinghAMP10,
author = {Jawar Singh and
Dilip S. Aswar and
Saraju P. Mohanty and
Dhiraj K. Pradhan},
title = {A 2-port 6T {SRAM} bitcell design with multi-port capabilities at
reduced area overhead},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {131--138},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450397},
doi = {10.1109/ISQED.2010.5450397},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SinghAMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ThakralMGP10,
author = {Garima Thakral and
Saraju P. Mohanty and
Dhruva Ghai and
Dhiraj K. Pradhan},
title = {{P3} (power-performance-process) optimization of nano-CMOS SRAMusing
statistical {DOE-ILP}},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {176--183},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450470},
doi = {10.1109/ISQED.2010.5450470},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/ThakralMGP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/MathewRJMP10,
author = {Jimson Mathew and
Hafizur Rahaman and
Abusaleh M. Jabir and
Saraju P. Mohanty and
Dhiraj K. Pradhan},
title = {On the design of different concurrent {EDC} schemes for S-Box and
GF(p)},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {211--218},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450467},
doi = {10.1109/ISQED.2010.5450467},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/MathewRJMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BanerjeeMPM10,
author = {Savita Banerjee and
Jimson Mathew and
Dhiraj K. Pradhan and
Saraju P. Mohanty},
title = {Layout-aware Illinois Scan design for high fault coverage coverage},
booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED}
2010), 22-24 March 2010, San Jose, CA, {USA}},
pages = {683--688},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISQED.2010.5450501},
doi = {10.1109/ISQED.2010.5450501},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/BanerjeeMPM10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ArgyridesMP10,
author = {Costas Argyrides and
Nikolaos Mavrogiannakis and
Dhiraj K. Pradhan},
title = {Improved Yield in Nanotechnology Circuits Using Non-square Meshes},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2010, 5-7
July 2010, Lixouri Kefalonia, Greece},
pages = {410--415},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISVLSI.2010.113},
doi = {10.1109/ISVLSI.2010.113},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ArgyridesMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/TarrilloLCAP10,
author = {Jimmy Tarrillo and
Carlos Arthur Lang Lisb{\^{o}}a and
Luigi Carro and
Costas Argyrides and
Dhiraj K. Pradhan},
title = {Evaluation of a new low cost software level fault tolerance technique
to cope with soft errors},
booktitle = {11th Latin American Test Workshop, {LATW} 2010, Punta del Este, Uruguay,
March 28-30, 2010},
pages = {1--3},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/LATW.2010.5550371},
doi = {10.1109/LATW.2010.5550371},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/TarrilloLCAP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/percom/TalebMP10,
author = {Anas Abu Taleb and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Fault diagnosis in multi layered De Bruijn based architectures for
sensor networks},
booktitle = {Eigth Annual {IEEE} International Conference on Pervasive Computing
and Communications, PerCom 2010, March 29 - April 2, 2010, Mannheim,
Germany, Workshop Proceedings},
pages = {456--461},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/PERCOMW.2010.5470627},
doi = {10.1109/PERCOMW.2010.5470627},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/percom/TalebMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MathewBRPMJ10,
author = {Jimson Mathew and
Savita Banerjee and
Hafizur Rahaman and
Dhiraj K. Pradhan and
Saraju P. Mohanty and
Abusaleh M. Jabir},
title = {On the synthesis of attack tolerant cryptographic hardware},
booktitle = {18th {IEEE/IFIP} VLSI-SoC 2010, {IEEE/IFIP} {WG} 10.5 International
Conference on Very Large Scale Integration of System-on-Chip, Madrid,
Spain, 27-29 September 2010},
pages = {286--291},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/VLSISOC.2010.5642675},
doi = {10.1109/VLSISOC.2010.5642675},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/MathewBRPMJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ThakralMGP10,
author = {Garima Thakral and
Saraju P. Mohanty and
Dhruva Ghai and
Dhiraj K. Pradhan},
title = {A Combined {DOE-ILP} Based Power and Read Stability Optimization in
Nano-CMOS {SRAM}},
booktitle = {{VLSI} Design 2010: 23rd International Conference on {VLSI} Design,
9th International Conference on Embedded Systems, Bangalore, India,
3-7 January 2010},
pages = {45--50},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/VLSI.Design.2010.14},
doi = {10.1109/VLSI.DESIGN.2010.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ThakralMGP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/wimo/TalebMP10,
author = {Anas Abu Taleb and
Jimson Mathew and
Dhiraj K. Pradhan},
editor = {Abdulkadir {\"{O}}zcan and
Nabendu Chaki and
Dhinaharan Nagamalai},
title = {Clustered De Bruijn Based Multi Layered Architectures for Sensor Networks},
booktitle = {Recent Trends in Wireless and Mobile Networks - Second International
Conference, WiMo 2010, Ankara, Turkey, June 26-28, 2010. Proceedings},
series = {Communications in Computer and Information Science},
volume = {84},
pages = {123--136},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-14171-3\_11},
doi = {10.1007/978-3-642-14171-3\_11},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/wimo/TalebMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/MathewJRP09,
author = {Jimson Mathew and
Abusaleh M. Jabir and
Hafizur Rahaman and
Dhiraj K. Pradhan},
title = {Single error correctable bit parallel multipliers over GF(2\({}^{\mbox{m}}\))},
journal = {{IET} Comput. Digit. Tech.},
volume = {3},
number = {3},
pages = {281--288},
year = {2009},
url = {https://doi.org/10.1049/iet-cdt.2008.0015},
doi = {10.1049/IET-CDT.2008.0015},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/MathewJRP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/qic/MaslovMCP09,
author = {Dmitri Maslov and
Jimson Mathew and
Donny Cheung and
Dhiraj K. Pradhan},
title = {An O(m\({}^{\mbox{2}}\))-depth quantum algorithm for the elliptic
curve discrete logarithm problem over GF(2\({}^{\mbox{m}}\))\({}^{\mbox{a}}\)},
journal = {Quantum Inf. Comput.},
volume = {9},
number = {7{\&}8},
pages = {610--621},
year = {2009},
url = {https://doi.org/10.26421/QIC9.7-8-4},
doi = {10.26421/QIC9.7-8-4},
timestamp = {Thu, 29 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/qic/MaslovMCP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SinghPHMM09,
author = {Jawar Singh and
Dhiraj K. Pradhan and
Simon Hollis and
Saraju P. Mohanty and
Jimson Mathew},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Single ended 6T {SRAM} with isolated read-port for low-power embedded
systems},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {917--922},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090796},
doi = {10.1109/DATE.2009.5090796},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/SinghPHMM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ArgyridesLPC09,
author = {Costas Argyrides and
Carlos Arthur Lang Lisb{\^{o}}a and
Dhiraj K. Pradhan and
Luigi Carro},
title = {A fast error correction technique for matrix multiplication algorithms},
booktitle = {15th {IEEE} International On-Line Testing Symposium {(IOLTS} 2009),
24-26 June 2009, Sesimbra-Lisbon, Portugal},
pages = {133--137},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IOLTS.2009.5195995},
doi = {10.1109/IOLTS.2009.5195995},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/ArgyridesLPC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/RahamanMJP09,
author = {Hafizur Rahaman and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {C-testable S-box implementation for secure advanced encryption standard},
booktitle = {15th {IEEE} International On-Line Testing Symposium {(IOLTS} 2009),
24-26 June 2009, Sesimbra-Lisbon, Portugal},
pages = {210--211},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IOLTS.2009.5196017},
doi = {10.1109/IOLTS.2009.5196017},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/RahamanMJP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ArgyridesALCP09,
author = {Costas Argyrides and
Ahmad A. Al{-}Yamani and
Carlos Arthur Lang Lisb{\^{o}}a and
Luigi Carro and
Dhiraj K. Pradhan},
title = {Increasing memory yield in future technologies through innovative
design},
booktitle = {10th International Symposium on Quality of Electronic Design {(ISQED}
2009), 16-18 March 2009, San Jose, CA, {USA}},
pages = {622--626},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISQED.2009.4810366},
doi = {10.1109/ISQED.2009.4810366},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ArgyridesALCP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/ArgyridesLPC09,
author = {Costas Argyrides and
Carlos Arthur Lang Lisb{\^{o}}a and
Dhiraj K. Pradhan and
Luigi Carro},
title = {Single element correction in sorting algorithms with minimum delay
overhead},
booktitle = {10th Latin American Test Workshop, {LATW} 2009, Rio de Janeiro, Brazil,
March 2-5, 2009},
pages = {1--6},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/LATW.2009.4813812},
doi = {10.1109/LATW.2009.4813812},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/ArgyridesLPC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/ArgyridesDPLC09,
author = {Costas Argyrides and
Giorgos Dimosthenous and
Dhiraj K. Pradhan and
Carlos Arthur Lang Lisb{\^{o}}a and
Luigi Carro},
editor = {Ivan Saraiva Silva and
Renato P. Ribas and
Calvin Plett},
title = {Reliability aware yield improvement technique for nanotechnology based
circuits},
booktitle = {Proceedings of the 22st Annual Symposium on Integrated Circuits and
Systems Design: Chip on the Dunes, {SBCCI} 2009, Natal, Brazil, August
31 - September 3, 2009},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1601896.1601958},
doi = {10.1145/1601896.1601958},
timestamp = {Mon, 19 Nov 2018 09:09:09 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/ArgyridesDPLC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SinghMMP09,
author = {Jawar Singh and
Jimson Mathew and
Saraju P. Mohanty and
Dhiraj K. Pradhan},
title = {Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded
Systems},
booktitle = {{VLSI} Design 2009: Improving Productivity through Higher Abstraction,
The 22nd International Conference on {VLSI} Design, New Delhi, India,
5-9 January 2009},
pages = {307--312},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/VLSI.Design.2009.38},
doi = {10.1109/VLSI.DESIGN.2009.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SinghMMP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/SinghPHM08,
author = {Jawar Singh and
Dhiraj K. Pradhan and
Simon Hollis and
Saraju P. Mohanty},
title = {A single ended 6T {SRAM} cell design for ultra-low-voltage applications},
journal = {{IEICE} Electron. Express},
volume = {5},
number = {18},
pages = {750--755},
year = {2008},
url = {https://doi.org/10.1587/elex.5.750},
doi = {10.1587/ELEX.5.750},
timestamp = {Fri, 12 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/ieiceee/SinghPHM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/ZhuLBP08,
author = {Hongwei Zhu and
Ilie I. Luican and
Florin Balasa and
Dhiraj K. Pradhan},
title = {Formal Model for the Reduction of the Dynamic Energy Consumption in
Multi-Layer Memory Subsystems},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {91-A},
number = {12},
pages = {3559--3567},
year = {2008},
url = {https://doi.org/10.1093/ietfec/e91-a.12.3559},
doi = {10.1093/IETFEC/E91-A.12.3559},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/ZhuLBP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cdt/MohantyKP08,
author = {Saraju P. Mohanty and
Elias Kougianos and
Dhiraj K. Pradhan},
title = {Simultaneous scheduling and binding for low gate leakage nano-complementary
metaloxide-semiconductor data path circuit behavioural synthesis},
journal = {{IET} Comput. Digit. Tech.},
volume = {2},
number = {2},
pages = {118--131},
year = {2008},
url = {https://doi.org/10.1049/iet-cdt:20070108},
doi = {10.1049/IET-CDT:20070108},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cdt/MohantyKP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/RahamanMPJ08,
author = {Hafizur Rahaman and
Jimson Mathew and
Dhiraj K. Pradhan and
Abusaleh M. Jabir},
title = {Derivation of Reduced Test Vectors for Bit-Parallel Multipliers over
GF(2{\^{}}m)},
journal = {{IEEE} Trans. Computers},
volume = {57},
number = {9},
pages = {1289--1294},
year = {2008},
url = {https://doi.org/10.1109/TC.2008.63},
doi = {10.1109/TC.2008.63},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/RahamanMPJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JabirPM08,
author = {Abusaleh M. Jabir and
Dhiraj K. Pradhan and
Jimson Mathew},
title = {GfXpress: {A} Technique for Synthesis and Optimization of GF(2\({}^{\mbox{m}}\))
Polynomials},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {27},
number = {4},
pages = {698--711},
year = {2008},
url = {https://doi.org/10.1109/TCAD.2008.917586},
doi = {10.1109/TCAD.2008.917586},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JabirPM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KakadeKP08,
author = {Jayawant Kakade and
Dimitrios Kagaris and
Dhiraj K. Pradhan},
title = {Evaluation of Generalized LFSRs as Test Pattern Generators in Two-Dimensional
Scan Designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {27},
number = {9},
pages = {1689--1692},
year = {2008},
url = {https://doi.org/10.1109/TCAD.2008.927763},
doi = {10.1109/TCAD.2008.927763},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KakadeKP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/RahamanMPJ08,
author = {Hafizur Rahaman and
Jimson Mathew and
Dhiraj K. Pradhan and
Abusaleh M. Jabir},
title = {C-testable bit parallel multipliers over \emph{GF}(2\({}^{\mbox{\emph{m}}}\))},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {1},
pages = {5:1--5:18},
year = {2008},
url = {https://doi.org/10.1145/1297666.1297671},
doi = {10.1145/1297666.1297671},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/RahamanMPJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/ArgyridesHP08,
author = {Costas Argyrides and
Stephania Loizidou Himona and
Dhiraj K. Pradhan},
editor = {Alex Ram{\'{\i}}rez and
Gianfranco Bilardi and
Michael Gschwind},
title = {Yield improvement and power aware low cost memory chips},
booktitle = {Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia,
Italy, May 5-7, 2008},
pages = {353--358},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1366224.1366229},
doi = {10.1145/1366224.1366229},
timestamp = {Tue, 08 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/ArgyridesHP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HosseinabadyKMP08,
author = {Mohammad Hosseinabady and
Mohammad Reza Kakoee and
Jimson Mathew and
Dhiraj K. Pradhan},
editor = {Donatella Sciuto},
title = {De Bruijn Graph as a Low Latency Scalable Architecture for Energy
Efficient Massive NoCs},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {1370--1373},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484930},
doi = {10.1109/DATE.2008.4484930},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HosseinabadyKMP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iciis/Pradhan08,
author = {Dhiraj K. Pradhan},
title = {Application of Galois Fields to Logic Synthesis},
booktitle = {{IEEE} Reglon 10 Colloquium and Third International Conference on
Industrial and Information Systems, {ICIIS} 2008, Kharagpur, India,
December 8-10, 2008},
pages = {1},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ICIINFS.2008.4798327},
doi = {10.1109/ICIINFS.2008.4798327},
timestamp = {Fri, 13 Aug 2021 09:26:01 +0200},
biburl = {https://dblp.org/rec/conf/iciis/Pradhan08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MathewJP08,
author = {Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line
Single Error Correction and Double Error Detection},
booktitle = {14th {IEEE} International On-Line Testing Symposium {(IOLTS} 2008),
7-9 July 2008, Rhodes, Greece},
pages = {16--21},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/IOLTS.2008.34},
doi = {10.1109/IOLTS.2008.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/MathewJP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ArgyridesVMP08,
author = {Costas Argyrides and
Fabian Vargas and
Marlon Moraes and
Dhiraj K. Pradhan},
title = {Embedding Current Monitoring in H-Tree {RAM} Architecture for Multiple
{SEU} Tolerance and Reliability Improvement},
booktitle = {14th {IEEE} International On-Line Testing Symposium {(IOLTS} 2008),
7-9 July 2008, Rhodes, Greece},
pages = {155--160},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/IOLTS.2008.36},
doi = {10.1109/IOLTS.2008.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/ArgyridesVMP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MathewSTP08,
author = {Jimson Mathew and
Jawar Singh and
Anas Abu Taleb and
Dhiraj K. Pradhan},
title = {Fault Tolerant Reversible Finite Field Arithmetic Circuits},
booktitle = {14th {IEEE} International On-Line Testing Symposium {(IOLTS} 2008),
7-9 July 2008, Rhodes, Greece},
pages = {188--189},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/IOLTS.2008.35},
doi = {10.1109/IOLTS.2008.35},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/MathewSTP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MathewSJHP08,
author = {Jimson Mathew and
Jawar Singh and
Abusaleh M. Jabir and
Mohammad Hosseinabady and
Dhiraj K. Pradhan},
title = {Fault tolerant bit parallel finite field multipliers using {LDPC}
codes},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
pages = {1684--1687},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISCAS.2008.4541760},
doi = {10.1109/ISCAS.2008.4541760},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/MathewSJHP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SinghMMP08,
author = {Jawar Singh and
Jimson Mathew and
Saraju P. Mohanty and
Dhiraj K. Pradhan},
title = {A nano-CMOS process variation induced read failure tolerant {SRAM}
cell},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
pages = {3334--3337},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ISCAS.2008.4542172},
doi = {10.1109/ISCAS.2008.4542172},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/SinghMMP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/ArgyridesLP08,
author = {Costas Argyrides and
Stephania Loizidou and
Dhiraj K. Pradhan},
editor = {Mladen Berekovic and
Nikitas J. Dimopoulos and
Stephan Wong},
title = {Area Reliability Trade-Off in Improved Reed Muller Coding},
booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
8th International Workshop, {SAMOS} 2008, Samos, Greece, July 21-24,
2008. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5114},
pages = {116--125},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-70550-5\_13},
doi = {10.1007/978-3-540-70550-5\_13},
timestamp = {Tue, 14 May 2019 10:00:45 +0200},
biburl = {https://dblp.org/rec/conf/samos/ArgyridesLP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/SuMSP08,
author = {Yi Xin Su and
Jimson Mathew and
Jawar Singh and
Dhiraj K. Pradhan},
title = {Pseudo parallel architecture for {AES} with error correction},
booktitle = {21st Annual {IEEE} International SoC Conference, SoCC 2008, September
17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings},
pages = {187--190},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SOCC.2008.4641508},
doi = {10.1109/SOCC.2008.4641508},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/SuMSP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/SinghMPM08,
author = {Jawar Singh and
Jimson Mathew and
Dhiraj K. Pradhan and
Saraju P. Mohanty},
title = {A subthreshold single ended {I/O} {SRAM} cell design for nanometer
{CMOS} technologies},
booktitle = {21st Annual {IEEE} International SoC Conference, SoCC 2008, September
17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings},
pages = {243--246},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SOCC.2008.4641520},
doi = {10.1109/SOCC.2008.4641520},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/socc/SinghMPM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/SinghMPM08a,
author = {Jawar Singh and
Jimson Mathew and
Dhiraj K. Pradhan and
Saraju P. Mohanty},
title = {Failure analysis for ultra low power nano-CMOS {SRAM} under process
variations},
booktitle = {21st Annual {IEEE} International SoC Conference, SoCC 2008, September
17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings},
pages = {251--254},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/SOCC.2008.4641522},
doi = {10.1109/SOCC.2008.4641522},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/socc/SinghMPM08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/tqc/CheungMMP08,
author = {Donny Cheung and
Dmitri Maslov and
Jimson Mathew and
Dhiraj K. Pradhan},
editor = {Yasuhito Kawano and
Michele Mosca},
title = {On the Design and Optimization of a Quantum Polynomial-Time Attack
on Elliptic Curve Cryptography},
booktitle = {Theory of Quantum Computation, Communication, and Cryptography, Third
Workshop, {TQC} 2008, Tokyo, Japan, January 30 - February 1, 2008.
Revised Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {5106},
pages = {96--104},
publisher = {Springer},
year = {2008},
url = {https://doi.org/10.1007/978-3-540-89304-2\_9},
doi = {10.1007/978-3-540-89304-2\_9},
timestamp = {Tue, 14 May 2019 10:00:55 +0200},
biburl = {https://dblp.org/rec/conf/tqc/CheungMMP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MathewCJRP08,
author = {Jimson Mathew and
Costas Argyrides and
Abusaleh M. Jabir and
Hafizur Rahaman and
Dhiraj K. Pradhan},
title = {Single Error Correcting Finite Field Multipliers Over GF(2m)},
booktitle = {21st International Conference on {VLSI} Design {(VLSI} Design 2008),
4-8 January 2008, Hyderabad, India},
pages = {33--38},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VLSI.2008.105},
doi = {10.1109/VLSI.2008.105},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MathewCJRP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MathewRJP08,
author = {Jimson Mathew and
Hafizur Rahaman and
Babita R. Jose and
Dhiraj K. Pradhan},
title = {Design of Reversible Finite Field Arithmetic Circuits with Error Detection},
booktitle = {21st International Conference on {VLSI} Design {(VLSI} Design 2008),
4-8 January 2008, Hyderabad, India},
pages = {453--459},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VLSI.2008.96},
doi = {10.1109/VLSI.2008.96},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MathewRJP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MathewRSJP08,
author = {Jimson Mathew and
Hafizur Rahaman and
Ashutosh Kumar Singh and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {A Galois Field Based Logic Synthesis Approach with Testability},
booktitle = {21st International Conference on {VLSI} Design {(VLSI} Design 2008),
4-8 January 2008, Hyderabad, India},
pages = {629--634},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VLSI.2008.88},
doi = {10.1109/VLSI.2008.88},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MathewRSJP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LisboaAPC08,
author = {Carlos Arthur Lang Lisb{\^{o}}a and
Costas Argyrides and
Dhiraj K. Pradhan and
Luigi Carro},
title = {Algorithm Level Fault Tolerance: {A} Technique to Cope with Long Duration
Transient Faults in Matrix Multiplication Algorithms},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {363--370},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.29},
doi = {10.1109/VTS.2008.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LisboaAPC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/wiley/JoshiPS08,
author = {Bharat Joshi and
Dhiraj K. Pradhan and
Jack J. Stiffler},
editor = {Benjamin W. Wah},
title = {Fault-Tolerant Computing},
booktitle = {Wiley Encyclopedia of Computer Science and Engineering},
publisher = {John Wiley {\&} Sons, Inc.},
year = {2008},
url = {https://doi.org/10.1002/9780470050118.ecse151},
doi = {10.1002/9780470050118.ECSE151},
timestamp = {Tue, 16 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/wiley/JoshiPS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dagstuhl/ArgyridesP08,
author = {Costas Argyrides and
Dhiraj K. Pradhan},
editor = {Bernadette Charron{-}Bost and
Shlomi Dolev and
Jo C. Ebergen and
Ulrich Schmid},
title = {Multiple Event Upsets Aware FPGAs Using Protected Schemes},
booktitle = {Fault-Tolerant Distributed Algorithms on {VLSI} Chips, 07.09. - 10.09.2008},
series = {Dagstuhl Seminar Proceedings},
volume = {08371},
publisher = {Schloss Dagstuhl - Leibniz-Zentrum f{\"{u}}r Informatik, Germany},
year = {2008},
url = {http://drops.dagstuhl.de/opus/volltexte/2009/1926/},
timestamp = {Thu, 10 Jun 2021 13:02:08 +0200},
biburl = {https://dblp.org/rec/conf/dagstuhl/ArgyridesP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/JabirP07,
author = {Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {A Graph-Based Unified Technique for Computing and Representing Coefficients
over Finite Fields},
journal = {{IEEE} Trans. Computers},
volume = {56},
number = {8},
pages = {1119--1132},
year = {2007},
url = {https://doi.org/10.1109/TC.2007.1060},
doi = {10.1109/TC.2007.1060},
timestamp = {Mon, 13 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/JabirP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/JabirPRS07,
author = {Abusaleh M. Jabir and
Dhiraj K. Pradhan and
T. L. Rajaprabhu and
Ashutosh Kumar Singh},
title = {A Technique for Representing Multiple Output Binary Functions with
Applications to Verification and Simulation},
journal = {{IEEE} Trans. Computers},
volume = {56},
number = {8},
pages = {1133--1145},
year = {2007},
url = {https://doi.org/10.1109/TC.2007.1056},
doi = {10.1109/TC.2007.1056},
timestamp = {Thu, 14 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/JabirPRS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/Al-YamaniRP07,
author = {Ahmad A. Al{-}Yamani and
S. Ramsundar and
Dhiraj K. Pradhan},
title = {A Defect Tolerance Scheme for Nanotechnology Circuits},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {54-I},
number = {11},
pages = {2402--2409},
year = {2007},
url = {https://doi.org/10.1109/TCSI.2007.907875},
doi = {10.1109/TCSI.2007.907875},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/Al-YamaniRP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cit/SinghMHP07,
author = {Jawar Singh and
Jimson Mathew and
Mohammad Hosseinabady and
Dhiraj K. Pradhan},
title = {Single Event Upset Detection and Correction},
booktitle = {10th International Conference on Information Technology, {ICIT} 2007,
Roukela, India, 17-20 December 2007},
pages = {13--18},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICIT.2007.60},
doi = {10.1109/ICIT.2007.60},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cit/SinghMHP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/ArgyridesZP07,
author = {Costas Argyrides and
Hamid R. Zarandi and
Dhiraj K. Pradhan},
editor = {Cristiana Bolchini and
Yong{-}Bin Kim and
Adelio Salsano and
Nur A. Touba},
title = {Matrix Codes: Multiple Bit Upsets Tolerant Method for {SRAM} Memories},
booktitle = {22nd {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2007), 26-28 September 2007, Rome, Italy},
pages = {340--348},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DFT.2007.29},
doi = {10.1109/DFT.2007.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/ArgyridesZP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/HosseinabadyKMP07,
author = {Mohammad Hosseinabady and
Mohammad Reza Kakoee and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Reliable network-on-chip based on generalized de Bruijn graph},
booktitle = {{IEEE} International High Level Design Validation and Test Workshop,
{HLDVT} 2007, Irvine, CA, USA, November 7-9, 2007},
pages = {3--10},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/HLDVT.2007.4392777},
doi = {10.1109/HLDVT.2007.4392777},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/HosseinabadyKMP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ArgyridesP07,
author = {Costas Argyrides and
Dhiraj K. Pradhan},
title = {Highly Reliable Power Aware Memory Design},
booktitle = {13th {IEEE} International On-Line Testing Symposium {(IOLTS} 2007),
8-11 July 2007, Heraklion, Crete, Greece},
pages = {189--190},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/IOLTS.2007.37},
doi = {10.1109/IOLTS.2007.37},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/ArgyridesP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MathewRP07,
author = {Jimson Mathew and
Hafizur Rahaman and
Dhiraj K. Pradhan},
title = {Efficient Testable Bit Parallel Multipliers over GF(2{\^{}}m) with
Constant Test set},
booktitle = {13th {IEEE} International On-Line Testing Symposium {(IOLTS} 2007),
8-11 July 2007, Heraklion, Crete, Greece},
pages = {207--208},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/IOLTS.2007.28},
doi = {10.1109/IOLTS.2007.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/MathewRP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/ZarandiMAP07,
author = {Hamid R. Zarandi and
Seyed Ghassem Miremadi and
Costas Argyrides and
Dhiraj K. Pradhan},
title = {Fast {SEU} Detection and Correction in {LUT} Configuration Bits of
SRAM-based FPGAs},
booktitle = {21th International Parallel and Distributed Processing Symposium {(IPDPS}
2007), Proceedings, 26-30 March 2007, Long Beach, California, {USA}},
pages = {1--6},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/IPDPS.2007.370378},
doi = {10.1109/IPDPS.2007.370378},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/ZarandiMAP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZarandiMPM07,
author = {Hamid R. Zarandi and
Seyed Ghassem Miremadi and
Dhiraj K. Pradhan and
Jimson Mathew},
title = {Soft Error Mitigation in Switch Modules of SRAM-based FPGAs},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
May 2007, New Orleans, Louisiana, {USA}},
pages = {141--144},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISCAS.2007.378241},
doi = {10.1109/ISCAS.2007.378241},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZarandiMPM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ArgyridesZP07,
author = {Costas Argyrides and
Hamid R. Zarandi and
Dhiraj K. Pradhan},
title = {Multiple Upsets Tolerance in {SRAM} Memory},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
May 2007, New Orleans, Louisiana, {USA}},
pages = {365--368},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISCAS.2007.378465},
doi = {10.1109/ISCAS.2007.378465},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ArgyridesZP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/StapenhurstMMNP07,
author = {R. Stapenhurst and
Koushik Maharatna and
Jimson Mathew and
Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez and
Dhiraj K. Pradhan},
title = {On the Hardware Reduction of z-Datapath of Vectoring {CORDIC}},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
May 2007, New Orleans, Louisiana, {USA}},
pages = {3002--3005},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISCAS.2007.377978},
doi = {10.1109/ISCAS.2007.377978},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/StapenhurstMMNP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZarandiMPM07a,
author = {Hamid R. Zarandi and
Seyed Ghassem Miremadi and
Dhiraj K. Pradhan and
Jimson Mathew},
title = {CAD-Directed {SEU} Susceptibility Reduction in {FPGA} Circuits Designs},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
May 2007, New Orleans, Louisiana, {USA}},
pages = {3675--3678},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISCAS.2007.378640},
doi = {10.1109/ISCAS.2007.378640},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZarandiMPM07a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZarandiMAP07,
author = {Hamid R. Zarandi and
Seyed Ghassem Miremadi and
Costas Argyrides and
Dhiraj K. Pradhan},
title = {CLB-based Detection and Correction of Bit-flip faults in SRAM-based
FPGAs},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
May 2007, New Orleans, Louisiana, {USA}},
pages = {3696--3699},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ISCAS.2007.378645},
doi = {10.1109/ISCAS.2007.378645},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZarandiMAP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ZarandiMPM07,
author = {Hamid R. Zarandi and
Seyed Ghassem Miremadi and
Dhiraj K. Pradhan and
Jimson Mathew},
title = {SEU-Mitigation Placement and Routing Algorithms and Their Impact in
SRAM-Based FPGAs},
booktitle = {8th International Symposium on Quality of Electronic Design {(ISQED}
2007), 26-28 March 2007, San Jose, CA, {USA}},
pages = {380--385},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISQED.2007.143},
doi = {10.1109/ISQED.2007.143},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ZarandiMPM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/RamsundarAP07,
author = {S. Ramsundar and
Ahmad A. Al{-}Yamani and
Dhiraj K. Pradhan},
title = {Defect Tolerance in Nanotechnology Switches Using a Greedy Reconfiguration
Algorithm},
booktitle = {8th International Symposium on Quality of Electronic Design {(ISQED}
2007), 26-28 March 2007, San Jose, CA, {USA}},
pages = {807--813},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISQED.2007.55},
doi = {10.1109/ISQED.2007.55},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/RamsundarAP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/ArgyridesLCP07,
author = {Costas Argyrides and
Carlos Arthur Lang Lisb{\^{o}}a and
Luigi Carro and
Dhiraj K. Pradhan},
editor = {Antonio Petraglia and
Volnei A. Pedroni and
Gert Cauwenberghs},
title = {A soft error robust and power aware memory design},
booktitle = {Proceedings of the 20th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2007, Copacabana, Rio de Janeiro, Brazil,
September 3-6, 2007},
pages = {300--305},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1284480.1284560},
doi = {10.1145/1284480.1284560},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/ArgyridesLCP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/ArgyridesP07,
author = {Costas Argyrides and
Dhiraj K. Pradhan},
title = {Improved decoding algorithm for high reliable reed muller coding},
booktitle = {2007 {IEEE} International {SOC} Conference, Tampere, Finland, November
19-21, 2007},
pages = {95--98},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/SOCC.2007.4545435},
doi = {10.1109/SOCC.2007.4545435},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/ArgyridesP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/ArgyridesAP07,
author = {Costas Argyrides and
Ahmad A. Al{-}Yamani and
Dhiraj K. Pradhan},
title = {High defect tolerant low cost memory chips},
booktitle = {2007 {IEEE} International {SOC} Conference, Tampere, Finland, November
19-21, 2007},
pages = {119--122},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/SOCC.2007.4545440},
doi = {10.1109/SOCC.2007.4545440},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/socc/ArgyridesAP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/JoseMMP07,
author = {Babita R. Jose and
Jimson Mathew and
P. Mythili and
Dhiraj K. Pradhan},
title = {A triple-mode feed-forward sigma-delta modulator design for {GSM}
/ {WCDMA} / {WLAN} applications},
booktitle = {2007 {IEEE} International {SOC} Conference, Tampere, Finland, November
19-21, 2007},
pages = {309--312},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/SOCC.2007.4545481},
doi = {10.1109/SOCC.2007.4545481},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/socc/JoseMMP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RahamanMP07,
author = {Hafizur Rahaman and
Jimson Mathew and
Dhiraj K. Pradhan},
title = {Constant Function Independent Test Set for Fault Detection in Bit
Parallel Multipliers in GF(2{\^{}}m)},
booktitle = {20th International Conference on {VLSI} Design {(VLSI} Design 2007),
Sixth International Conference on Embedded Systems {(ICES} 2007),
6-10 January 2007, Bangalore, India},
pages = {479--484},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VLSID.2007.53},
doi = {10.1109/VLSID.2007.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RahamanMP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RahamanMSP07,
author = {Hafizur Rahaman and
Jimson Mathew and
Biplab K. Sikdar and
Dhiraj K. Pradhan},
title = {Transition Fault Testability in Bit Parallel Multipliers over GF(2{\^{}}\{m\})},
booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
California, {USA}},
pages = {422--430},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VTS.2007.83},
doi = {10.1109/VTS.2007.83},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/RahamanMSP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LiuLP06,
author = {Chunsheng Liu and
Zach Link and
Dhiraj K. Pradhan},
editor = {Georges G. E. Gielen},
title = {Reuse-based test access and integrated test scheduling for network-on-chip},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {303--308},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.244143},
doi = {10.1109/DATE.2006.244143},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/LiuLP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/RahamanMJP06,
author = {Hafizur Rahaman and
Jimson Mathew and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {Easily Testable Implementation for Bit Parallel Multipliers in {GF}
(2m)},
booktitle = {Eleventh Annual {IEEE} International High-Level Design Validation
and Test Workshop 2006, Monterey, CA, USA, Nov 9-10, 2006},
pages = {48--54},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/HLDVT.2006.320004},
doi = {10.1109/HLDVT.2006.320004},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/RahamanMJP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/JabirPM06,
author = {Abusaleh M. Jabir and
Dhiraj K. Pradhan and
Jimson Mathew},
editor = {Soha Hassoun},
title = {An efficient technique for synthesis and optimization of polynomials
in GF(2\({}^{\mbox{\emph{m}}}\))},
booktitle = {2006 International Conference on Computer-Aided Design, {ICCAD} 2006,
San Jose, CA, USA, November 5-9, 2006},
pages = {151--157},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1233501.1233532},
doi = {10.1145/1233501.1233532},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/JabirPM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LiuIP06,
author = {Chunsheng Liu and
Vikram Iyengar and
Dhiraj K. Pradhan},
title = {Thermal-Aware Testing of Network-on-Chip Using Multiple-Frequency
Clocking},
booktitle = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
Berkeley, California, {USA}},
pages = {46--51},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VTS.2006.88},
doi = {10.1109/VTS.2006.88},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LiuIP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PradhanL05,
author = {Dhiraj K. Pradhan and
Chunsheng Liu},
title = {{EBIST:} a novel test generator with built-in fault detection capability},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {24},
number = {9},
pages = {1457--1466},
year = {2005},
url = {https://doi.org/10.1109/TCAD.2005.850815},
doi = {10.1109/TCAD.2005.850815},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PradhanL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/PradhanSRJ05,
author = {Dhiraj K. Pradhan and
Ashutosh Kumar Singh and
T. L. Rajaprabhu and
Abusaleh M. Jabir},
title = {{GASIM:} a fast Galois field based simulator for functional model},
booktitle = {Tenth {IEEE} International High-Level Design Validation and Test Workshop
2005, Napa Valley, CA, USA, November 30 - December 2, 2005},
pages = {135--142},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HLDVT.2005.1568827},
doi = {10.1109/HLDVT.2005.1568827},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/PradhanSRJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/PradhanKG05,
author = {Dhiraj K. Pradhan and
Dimitri Kagaris and
Rohit Gambhir},
title = {A Hamming Distance Based Test Pattern Generator with Improved Fault
Coverage},
booktitle = {11th {IEEE} International On-Line Testing Symposium {(IOLTS} 2005),
6-8 July 2005, Saint Raphael, France},
pages = {221--226},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/IOLTS.2005.6},
doi = {10.1109/IOLTS.2005.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/PradhanKG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChidambaramKP05,
author = {S. Chidambaram and
Dimitrios Kagaris and
Dhiraj K. Pradhan},
title = {Comparative study of {CA} with phase shifters and GLFSRs},
booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005,
Austin, TX, USA, November 8-10, 2005},
pages = {10},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/TEST.2005.1584058},
doi = {10.1109/TEST.2005.1584058},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/ChidambaramKP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PradhanAV05,
author = {Dhiraj K. Pradhan and
Magdy S. Abadir and
Mauricio Varea},
title = {Recent Advances in Verification, Equivalence Checking and SAT-Solvers},
booktitle = {18th International Conference on {VLSI} Design {(VLSI} Design 2005),
with the 4th International Conference on Embedded Systems Design,
3-7 January 2005, Kolkata, India},
pages = {14},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ICVD.2005.146},
doi = {10.1109/ICVD.2005.146},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PradhanAV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BhattacharjeeP04,
author = {Subhasis Bhattacharjee and
Dhiraj K. Pradhan},
title = {{LPRAM:} a novel low-power high-performance {RAM} design with testability
and scalability},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {23},
number = {5},
pages = {637--651},
year = {2004},
url = {https://doi.org/10.1109/TCAD.2004.826581},
doi = {10.1109/TCAD.2004.826581},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BhattacharjeeP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BhattacharjeeP04,
author = {Subhasis Bhattacharjee and
Dhiraj K. Pradhan},
editor = {Masaharu Imai},
title = {{LPRAM:} a low power {DRAM} with testability},
booktitle = {Proceedings of the 2004 Conference on Asia South Pacific Design Automation:
Electronic Design and Solution Fair 2004, Yokohama, Japan, January
27-30, 2004},
pages = {390--393},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASPDAC.2004.131},
doi = {10.1109/ASPDAC.2004.131},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/BhattacharjeeP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/JabirP04,
author = {Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {{MODD:} {A} New Decision Diagram and Representation for Multiple Output
Binary Functions},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {1388--1389},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1269101},
doi = {10.1109/DATE.2004.1269101},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/JabirP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/RajaprabhuSJP04,
author = {T. L. Rajaprabhu and
Ashutosh Kumar Singh and
Abusaleh M. Jabir and
Dhiraj K. Pradhan},
title = {{MODD} for {CF:} a representation for fast evaluation of multiple-output
functions},
booktitle = {Ninth {IEEE} International High-Level Design Validation and Test Workshop
2004, Sonoma Valley, CA, USA, November 10-12, 2004},
pages = {61--66},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/HLDVT.2004.1431237},
doi = {10.1109/HLDVT.2004.1431237},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/RajaprabhuSJP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/LiuSCP04,
author = {Chunsheng Liu and
Hamid Sharif and
{\'{E}}rika F. Cota and
Dhiraj K. Pradhan},
title = {Test Scheduling for Network-on-Chip with {BIST} and Precedence Constraints},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {1369--1378},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387412},
doi = {10.1109/TEST.2004.1387412},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/LiuSCP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sat/SubbarayanP04,
author = {Sathiamoorthy Subbarayan and
Dhiraj K. Pradhan},
title = {NiVER: Non Increasing Variable Elimination Resolution for Preprocessing
{SAT} instances},
booktitle = {{SAT} 2004 - The Seventh International Conference on Theory and Applications
of Satisfiability Testing, 10-13 May 2004, Vancouver, BC, Canada,
Online Proceedings},
year = {2004},
url = {http://www.satisfiability.org/SAT04/programme/118.pdf},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sat/SubbarayanP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sat/SubbarayanP04a,
author = {Sathiamoorthy Subbarayan and
Dhiraj K. Pradhan},
editor = {Holger H. Hoos and
David G. Mitchell},
title = {NiVER: Non-increasing Variable Elimination Resolution for Preprocessing
{SAT} Instances},
booktitle = {Theory and Applications of Satisfiability Testing, 7th International
Conference, {SAT} 2004, Vancouver, BC, Canada, May 10-13, 2004, Revised
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {3542},
pages = {276--291},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/11527695\_22},
doi = {10.1007/11527695\_22},
timestamp = {Tue, 14 May 2019 10:00:41 +0200},
biburl = {https://dblp.org/rec/conf/sat/SubbarayanP04a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChatterjeeP03,
author = {Mitrajit Chatterjee and
Dhiraj K. Pradhan},
title = {A {BIST} Pattern Generator Design for Near-Perfect Fault Coverage},
journal = {{IEEE} Trans. Computers},
volume = {52},
number = {12},
pages = {1543--1558},
year = {2003},
url = {https://doi.org/10.1109/TC.2003.1252851},
doi = {10.1109/TC.2003.1252851},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChatterjeeP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PradhanLC03,
author = {Dhiraj K. Pradhan and
Chunsheng Liu and
Krishnendu Chakrabarty},
title = {{EBIST:} {A} Novel Test Generator with Built-In Fault Detection Capability},
booktitle = {2003 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2003), 3-7 March 2003, Munich, Germany},
pages = {10224--10229},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DATE.2003.1186390},
doi = {10.1109/DATE.2003.1186390},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PradhanLC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/Pradhan03,
author = {Dhiraj K. Pradhan},
title = {Logic transformation and coding theory-based frameworks for Boolean
satisfiability},
booktitle = {Eighth {IEEE} International High-Level Design Validation and Test
Workshop 2003, San Francisco, CA, USA, November 12-14, 2003},
pages = {57--62},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/HLDVT.2003.1252475},
doi = {10.1109/HLDVT.2003.1252475},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/Pradhan03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hldvt/PradhanAC03,
author = {Dhiraj K. Pradhan and
Serkan Askar and
Maciej J. Ciesielski},
title = {Mathematical framework for representing discrete functions as word-level
polynomials},
booktitle = {Eighth {IEEE} International High-Level Design Validation and Test
Workshop 2003, San Francisco, CA, USA, November 12-14, 2003},
pages = {135--139},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/HLDVT.2003.1252487},
doi = {10.1109/HLDVT.2003.1252487},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hldvt/PradhanAC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GanesanP03,
author = {Elango Ganesan and
Dhiraj K. Pradhan},
title = {Wormhole routing in de Bruijn networks and hyper-de Bruijn networks},
booktitle = {Proceedings of the 2003 International Symposium on Circuits and Systems,
{ISCAS} 2003, Bangkok, Thailand, May 25-28, 2003},
pages = {870--873},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/ISCAS.2003.1205158},
doi = {10.1109/ISCAS.2003.1205158},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GanesanP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Pradhan01,
author = {Dhiraj K. Pradhan},
title = {Logic Insertion to Speed-Up Logic Verification: {A} Recent Development},
booktitle = {7th {IEEE} International On-Line Testing Workshop {(IOLTW} 2001),
9-11 July 2001, Taormina, Italy},
pages = {61--64},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/OLT.2001.937820},
doi = {10.1109/OLT.2001.937820},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Pradhan01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AbadirDNPV01,
author = {Magdy S. Abadir and
Scott Davidson and
Vijay Nagasamy and
Dhiraj K. Pradhan and
Prab Varma},
title = {{ATPG} for Design Errors-Is It Possible?},
booktitle = {19th {IEEE} {VLSI} Test Symposium {(VTS} 2001), Test and Diagnosis
in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA,
{USA}},
pages = {283--285},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.ieeecomputersociety.org/10.1109/VTS.2001.10019},
doi = {10.1109/VTS.2001.10019},
timestamp = {Tue, 23 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AbadirDNPV01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/ChatterjeeBP00,
author = {Mitrajit Chatterjee and
Savita Banerjee and
Dhiraj K. Pradhan},
title = {Buffer Assignment Algorithms on Data Driven ASICs},
journal = {{IEEE} Trans. Computers},
volume = {49},
number = {1},
pages = {16--32},
year = {2000},
url = {https://doi.org/10.1109/12.822561},
doi = {10.1109/12.822561},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/ChatterjeeBP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PaulCP00,
author = {Debjyoti Paul and
Mitrajit Chatterjee and
Dhiraj K. Pradhan},
title = {{VERILAT:} verification using logic augmentation and transformations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {19},
number = {9},
pages = {1041--1051},
year = {2000},
url = {https://doi.org/10.1109/43.863644},
doi = {10.1109/43.863644},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PaulCP00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PradhanC99,
author = {Dhiraj K. Pradhan and
Mitrajit Chatterjee},
title = {GLFSR-a new test pattern generator for built-in-self-test},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {18},
number = {2},
pages = {238--247},
year = {1999},
url = {https://doi.org/10.1109/43.743744},
doi = {10.1109/43.743744},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PradhanC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChatterjeePK98,
author = {Mitrajit Chatterjee and
Dhiraj K. Pradhan and
Wolfgang Kunz},
title = {{LOT:} Logic Optimization with Testability. New transformations for
logic synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {17},
number = {5},
pages = {386--399},
year = {1998},
url = {https://doi.org/10.1109/43.703921},
doi = {10.1109/43.703921},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChatterjeePK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/SharmaP98,
author = {Debendra Das Sharma and
Dhiraj K. Pradhan},
title = {Job Scheduling in Mesh Multicomputers},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {9},
number = {1},
pages = {57--70},
year = {1998},
url = {https://doi.org/10.1109/71.655244},
doi = {10.1109/71.655244},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/SharmaP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ccr/KrishnaVCP97,
author = {P. Krishna and
Nitin H. Vaidya and
Mainak Chatterjee and
Dhiraj K. Pradhan},
title = {A cluster-based approach for routing in dynamic networks},
journal = {Comput. Commun. Rev.},
volume = {27},
number = {2},
pages = {49--64},
year = {1997},
url = {https://doi.org/10.1145/263876.263885},
doi = {10.1145/263876.263885},
timestamp = {Sun, 06 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ccr/KrishnaVCP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanV97,
author = {Dhiraj K. Pradhan and
Nitin H. Vaidya},
title = {Roll-Forward and Rollback Recovery: Performance-Reliability Trade-Off},
journal = {{IEEE} Trans. Computers},
volume = {46},
number = {3},
pages = {372--378},
year = {1997},
url = {https://doi.org/10.1109/12.580435},
doi = {10.1109/12.580435},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icdcs/BakshiKVP97,
author = {Bikram S. Bakshi and
P. Krishna and
Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {Improving Performance of {TCP} over Wireless Networks},
booktitle = {Proceedings of the 17th International Conference on Distributed Computing
Systems, Baltimore, MD, USA, May 27-30, 1997},
pages = {365--373},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICDCS.1997.598070},
doi = {10.1109/ICDCS.1997.598070},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icdcs/BakshiKVP97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/comcom/KrishnaVP96,
author = {P. Krishna and
Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {Static and adaptive location management in mobile wireless networks},
journal = {Comput. Commun.},
volume = {19},
number = {4},
pages = {321--334},
year = {1996},
url = {https://doi.org/10.1016/0140-3664(96)01070-5},
doi = {10.1016/0140-3664(96)01070-5},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/comcom/KrishnaVP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/comcom/DolevPW96,
author = {Shlomi Dolev and
Dhiraj K. Pradhan and
Jennifer L. Welch},
title = {Modified tree structure for location management in mobile environments},
journal = {Comput. Commun.},
volume = {19},
number = {4},
pages = {335--345},
year = {1996},
url = {https://doi.org/10.1016/0140-3664(96)01071-7},
doi = {10.1016/0140-3664(96)01071-7},
timestamp = {Thu, 20 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/comcom/DolevPW96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/SharmaP96,
author = {Debendra Das Sharma and
Dhiraj K. Pradhan},
title = {Submesh Allocation in Mesh Multicomputers Using Busy-List: {A} BestFit
Approach with Complete Recognition Capability},
journal = {J. Parallel Distributed Comput.},
volume = {36},
number = {2},
pages = {106--118},
year = {1996},
url = {https://doi.org/10.1006/jpdc.1996.0093},
doi = {10.1006/JPDC.1996.0093},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/SharmaP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/GuptaP96,
author = {Sandeep K. Gupta and
Dhiraj K. Pradhan},
title = {Utilization of On-Line (Concurrent) Checkers During Built-In-Self-Test
and Vice Versa},
journal = {{IEEE} Trans. Computers},
volume = {45},
number = {1},
pages = {63--73},
year = {1996},
url = {https://doi.org/10.1109/12.481487},
doi = {10.1109/12.481487},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/GuptaP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BowenP96,
author = {Nicholas S. Bowen and
Dhiraj K. Pradhan},
title = {The Effect of Program Behavior on Fault Observability},
journal = {{IEEE} Trans. Computers},
volume = {45},
number = {8},
pages = {868--880},
year = {1996},
url = {https://doi.org/10.1109/12.536230},
doi = {10.1109/12.536230},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BowenP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KunzPR96,
author = {Wolfgang Kunz and
Dhiraj K. Pradhan and
Sudhakar M. Reddy},
title = {A novel framework for logic verification in a synthesis environment},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {15},
number = {1},
pages = {20--32},
year = {1996},
url = {https://doi.org/10.1109/43.486269},
doi = {10.1109/43.486269},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KunzPR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ChakradharBRP96,
author = {Srimat T. Chakradhar and
Savita Banerjee and
Rabindra K. Roy and
Dhiraj K. Pradhan},
title = {Synthesis of initializable asynchronous circuits},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {4},
number = {2},
pages = {254--263},
year = {1996},
url = {https://doi.org/10.1109/92.502197},
doi = {10.1109/92.502197},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ChakradharBRP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eusipco/KarCP96,
author = {Barun K. Kar and
Mitrajit Chatterjee and
Dhiraj K. Pradhan},
title = {BIT-based weighted mean filter},
booktitle = {8th European Signal Processing Conference, {EUSIPCO} 1996, Trieste,
Italy, 10-13 September, 1996},
pages = {1--4},
publisher = {{IEEE}},
year = {1996},
url = {https://ieeexplore.ieee.org/document/7082958/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/eusipco/KarCP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/PradhanKV96,
author = {Dhiraj K. Pradhan and
P. Krishna and
Nitin H. Vaidya},
title = {Recoverable Mobile Environment: Design and Trade-Off Analysis},
booktitle = {Digest of Papers: FTCS-26, The Twenty-Sixth Annual International Symposium
on Fault-Tolerant Computing, Sendai, Japan, June 25-27, 1996},
pages = {16--25},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/FTCS.1996.534590},
doi = {10.1109/FTCS.1996.534590},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ftcs/PradhanKV96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/CaoP96,
author = {Wanlin Cao and
Dhiraj K. Pradhan},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {Sequential redundancy identification using recursive learning},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {56--62},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.568940},
doi = {10.1109/ICCAD.1996.568940},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/CaoP96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/PradhanPC96,
author = {Dhiraj K. Pradhan and
Debjyoti Paul and
Mitrajit Chatterjee},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {{VERILAT:} verification using logic augmentation and transformations},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {88--95},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.569111},
doi = {10.1109/ICCAD.1996.569111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/PradhanPC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/PradhanCSK96,
author = {Dhiraj K. Pradhan and
Mitrajit Chatterjee and
Madhu V. Swarna and
Wolfgang Kunz},
editor = {Mark Horowitz and
Jan M. Rabaey and
Brock Barton and
Massoud Pedram},
title = {Gate-level synthesis for low-power using new transformations},
booktitle = {Proceedings of the 1996 International Symposium on Low Power Electronics
and Design, 1996, Monterey, California, USA, August 12-14, 1996},
pages = {297--300},
publisher = {{IEEE}},
year = {1996},
url = {https://doi.org/10.1109/LPE.1996.547527},
doi = {10.1109/LPE.1996.547527},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/islped/PradhanCSK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lcn/BakshiKPV96,
author = {Bikram S. Bakshi and
P. Krishna and
Dhiraj K. Pradhan and
Nitin H. Vaidya},
title = {Providing Seamless Communication in Mobile Wireless Networks},
booktitle = {Proceedings 21st Conference on Local Computer Networks, Minneapolis,
Minnesota, USA, October 13-16, 1996},
pages = {535--543},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/LCN.1996.558184},
doi = {10.1109/LCN.1996.558184},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/lcn/BakshiKPV96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/ClarkP95,
author = {Jeffrey A. Clark and
Dhiraj K. Pradhan},
title = {Fault Injection: {A} Method for Validating Computer-System Dependability},
journal = {Computer},
volume = {28},
number = {6},
pages = {47--56},
year = {1995},
url = {https://doi.org/10.1109/2.386985},
doi = {10.1109/2.386985},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/ClarkP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BowenP95,
author = {Nicholas S. Bowen and
Dhiraj K. Pradhan},
title = {A Fault Tolerant Hybrid Memory Structure and Memory Management Algorithms},
journal = {{IEEE} Trans. Computers},
volume = {44},
number = {3},
pages = {408--418},
year = {1995},
url = {https://doi.org/10.1109/12.372033},
doi = {10.1109/12.372033},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BowenP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PradhanS95,
author = {Dhiraj K. Pradhan and
Jayashree Saxena},
title = {A novel scheme to reduce test application time in circuits with full
scan},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {14},
number = {12},
pages = {1577--1586},
year = {1995},
url = {https://doi.org/10.1109/43.476587},
doi = {10.1109/43.476587},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PradhanS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/SharmaP95,
author = {Debendra Das Sharma and
Dhiraj K. Pradhan},
title = {Processor Allocation in Hypercube Multicomputers: Fast and Efficient
Strategies for Cubic and Noncubic Allocation},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {6},
number = {10},
pages = {1108--1122},
year = {1995},
url = {https://doi.org/10.1109/71.473519},
doi = {10.1109/71.473519},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/SharmaP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/ReddyKP95,
author = {Subodh M. Reddy and
Wolfgang Kunz and
Dhiraj K. Pradhan},
editor = {Bryan Preas},
title = {Novel Verification Framework Combining Structural and {OBDD} Methods
in a Synthesis Environment},
booktitle = {Proceedings of the 32st Conference on Design Automation, San Francisco,
California, USA, Moscone Center, June 12-16, 1995},
pages = {414--419},
publisher = {{ACM} Press},
year = {1995},
timestamp = {Thu, 16 Mar 2017 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/ReddyKP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/ChatterjeePK95,
author = {Mitrajit Chatterjee and
Dhiraj K. Pradhan and
Wolfgang Kunz},
editor = {Richard L. Rudell},
title = {{LOT:} logic optimization with testability-new transformations using
recursive learning},
booktitle = {Proceedings of the 1995 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1995, San Jose, California, USA, November 5-9, 1995},
pages = {318--325},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1995},
url = {https://doi.org/10.1109/ICCAD.1995.480135},
doi = {10.1109/ICCAD.1995.480135},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/ChatterjeePK95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/infocom/DolevPW95,
author = {Shlomi Dolev and
Dhiraj K. Pradhan and
Jennifer L. Welch},
title = {Modified Tree Structure for Location Management in Mobile Environments},
booktitle = {Proceedings {IEEE} {INFOCOM} '95, The Conference on Computer Communications,
Fourteenth Annual Joint Conference of the {IEEE} Computer and Communications
Societies, Bringing Information to People, Boston, Massachusetts,
USA, April 2-6, 1995},
pages = {530--537},
publisher = {{IEEE} Computer Society},
year = {1995},
timestamp = {Wed, 16 Oct 2019 14:14:51 +0200},
biburl = {https://dblp.org/rec/conf/infocom/DolevPW95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mlics/KrishnaCVP95,
author = {P. Krishna and
Mainak Chatterjee and
Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {A Cluster-based Approach for Routing in Ad-Hoc Networks},
booktitle = {Proceedings of the 2nd Symposium on Mobile and Location-Independent
Computing (MLICS'95), Ann Arbor, MI, USA, 10-11 April 1995},
pages = {1--10},
publisher = {{USENIX}},
year = {1995},
url = {http://www.usenix.org/publications/library/proceedings/mob95/krishna.html},
timestamp = {Tue, 02 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mlics/KrishnaCVP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChatterjeeP95,
author = {Mitrajit Chatterjee and
Dhiraj K. Pradhan},
title = {A novel pattern generator for near-perfect fault-coverage},
booktitle = {13th {IEEE} {VLSI} Test Symposium (VTS'95), April 30 - May 3, 1995,
Princeton, New Jersey, {USA}},
pages = {417--425},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/VTEST.1995.512669},
doi = {10.1109/VTEST.1995.512669},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ChatterjeeP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/VaidyaP94,
author = {Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {Safe System Level Diagnosis},
journal = {{IEEE} Trans. Computers},
volume = {43},
number = {3},
pages = {367--370},
year = {1994},
url = {https://doi.org/10.1109/12.272443},
doi = {10.1109/12.272443},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/VaidyaP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanV94,
author = {Dhiraj K. Pradhan and
Nitin H. Vaidya},
title = {Roll-Forward Checkpointing Scheme: {A} Novel Fault-Tolerant Architecture},
journal = {{IEEE} Trans. Computers},
volume = {43},
number = {10},
pages = {1163--1174},
year = {1994},
url = {https://doi.org/10.1109/12.324542},
doi = {10.1109/12.324542},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanV94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KunzP94,
author = {Wolfgang Kunz and
Dhiraj K. Pradhan},
title = {Recursive learning: a new implication technique for efficient solutions
to {CAD} problems-test, verification, and optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {13},
number = {9},
pages = {1143--1158},
year = {1994},
url = {https://doi.org/10.1109/43.310903},
doi = {10.1109/43.310903},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KunzP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/BanerjeeRCP94,
author = {Savita Banerjee and
Rabindra K. Roy and
Srimat T. Chakradhar and
Dhiraj K. Pradhan},
editor = {Robert Werner},
title = {Signal Transition Graph Transformations for Initializability},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {670},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326794},
doi = {10.1109/EDTC.1994.326794},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/eurodac/BanerjeeRCP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/PradhanV94,
author = {Dhiraj K. Pradhan and
Nitin H. Vaidya},
title = {Roll-Forward and Rollback Recovery: Performance-Reliability Trade-Off},
booktitle = {Digest of Papers: FTCS/24, The Twenty-Fourth Annual International
Symposium on Fault-Tolerant Computing, Austin, Texas, USA, June 15-17,
1994},
pages = {186--195},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/FTCS.1994.315642},
doi = {10.1109/FTCS.1994.315642},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/PradhanV94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BanerjeeRCP94,
author = {Savita Banerjee and
Rabindra K. Roy and
Srimat T. Chakradhar and
Dhiraj K. Pradhan},
title = {Initialization Isuues in the Synthesis of Asynchronous Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {447--452},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331947},
doi = {10.1109/ICCD.1994.331947},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BanerjeeRCP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/SharmaHP94,
author = {Debendra Das Sharma and
G. D. Holland and
Dhiraj K. Pradhan},
editor = {K. C. Tai},
title = {Subcube Level Time-Sharing in Hypercube Multicomputers},
booktitle = {Proceedings of the 1994 International Conference on Parallel Processing,
North Carolina State University, NC, USA, August 15-19, 1994. Volume
{II:} Software},
pages = {134--142},
publisher = {{CRC} Press},
year = {1994},
url = {https://doi.org/10.1109/ICPP.1994.189},
doi = {10.1109/ICPP.1994.189},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/SharmaHP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/KrishnaVP94,
author = {P. Krishna and
Nitin H. Vaidya and
Dhiraj K. Pradhan},
editor = {K. C. Tai},
title = {Recovery in Multicomputers with Finite Error Detection Latency},
booktitle = {Proceedings of the 1994 International Conference on Parallel Processing,
North Carolina State University, NC, USA, August 15-19, 1994. Volume
{II:} Software},
pages = {206--210},
publisher = {{CRC} Press},
year = {1994},
url = {https://doi.org/10.1109/ICPP.1994.174},
doi = {10.1109/ICPP.1994.174},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/KrishnaVP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/SharmaP94,
author = {Debendra Das Sharma and
Dhiraj K. Pradhan},
editor = {K. C. Tai},
title = {Job Scheduling in Mesh Multicomputers},
booktitle = {Proceedings of the 1994 International Conference on Parallel Processing,
North Carolina State University, NC, USA, August 15-19, 1994. Volume
{II:} Software},
pages = {251--258},
publisher = {{CRC} Press},
year = {1994},
url = {https://doi.org/10.1109/ICPP.1994.119},
doi = {10.1109/ICPP.1994.119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/SharmaP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/KarYP94,
author = {Barun K. Kar and
Khadem M. Yusuf and
Dhiraj K. Pradhan},
title = {Bit-Serial Generalized Median Filters},
booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
1994, London, England, UK, May 30 - June 2, 1994},
pages = {85--88},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ISCAS.1994.409109},
doi = {10.1109/ISCAS.1994.409109},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/KarYP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PradhanC94,
author = {Dhiraj K. Pradhan and
Mitrajit Chatterjee},
title = {{GLFSR} - {A} New Test Pattern Generator for Built-In Self-Test},
booktitle = {Proceedings {IEEE} International Test Conference 1994, {TEST:} The
Next 25 Years, Washington, DC, USA, October 2-6, 1994},
pages = {481--490},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/TEST.1994.527990},
doi = {10.1109/TEST.1994.527990},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/PradhanC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdis/KrishnaVP94,
author = {P. Krishna and
Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {Location Management in Distributed Mobile Environments},
booktitle = {Proceedings of the Third International Conference on Parallel and
Distributed Information Systems {(PDIS} 94), Austin, Texas, USA, September
28-30, 1994},
pages = {81--88},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/PDIS.1994.331729},
doi = {10.1109/PDIS.1994.331729},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pdis/KrishnaVP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChakradharBRP94,
author = {Srimat T. Chakradhar and
Savita Banerjee and
Rabindra K. Roy and
Dhiraj K. Pradhan},
title = {Synthesis of Initializable Asynchronous Circuits},
booktitle = {Proceedings of the Seventh International Conference on {VLSI} Design,
{VLSI} Design 1994, Calcutta, India, January 5-8, 1994},
pages = {383--388},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICVD.1994.282724},
doi = {10.1109/ICVD.1994.282724},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChakradharBRP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MukherjeeJP94,
author = {Rajarshi Mukherjee and
Jawahar Jain and
Dhiraj K. Pradhan},
title = {Functional learning: a new approach to learning in digital circuits},
booktitle = {12th {IEEE} {VLSI} Test Symposium (VTS'94), April 25-28, 1994, Cherry
Hill, New Jersey, {USA}},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/VTEST.1994.292324},
doi = {10.1109/VTEST.1994.292324},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MukherjeeJP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/BowenP93,
author = {Nicholas S. Bowen and
Dhiraj K. Pradhan},
title = {Processor- and Memory-Based Checkpoint and Rollback Recovery},
journal = {Computer},
volume = {26},
number = {2},
pages = {22--31},
year = {1993},
url = {https://doi.org/10.1109/2.191981},
doi = {10.1109/2.191981},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/BowenP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/networks/PradhanM93,
author = {Dhiraj K. Pradhan and
Fred J. Meyer},
title = {Communication structures in fault-tolerant distributed systems},
journal = {Networks},
volume = {23},
number = {4},
pages = {379--389},
year = {1993},
url = {https://doi.org/10.1002/net.3230230419},
doi = {10.1002/NET.3230230419},
timestamp = {Sun, 28 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/networks/PradhanM93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MendelsonTP93,
author = {Abraham Mendelson and
Dominique Thi{\'{e}}baut and
Dhiraj K. Pradhan},
title = {Modeling Live and Dead Lines in Cache Memory Systems},
journal = {{IEEE} Trans. Computers},
volume = {42},
number = {1},
pages = {1--14},
year = {1993},
url = {https://doi.org/10.1109/12.192209},
doi = {10.1109/12.192209},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MendelsonTP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/VaidyaP93,
author = {Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {Fault-Tolerant Design Strategies for High Reliability and Safety},
journal = {{IEEE} Trans. Computers},
volume = {42},
number = {10},
pages = {1195--1206},
year = {1993},
url = {https://doi.org/10.1109/12.257706},
doi = {10.1109/12.257706},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/VaidyaP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KunzP93,
author = {Wolfgang Kunz and
Dhiraj K. Pradhan},
title = {Accelerated dynamic learning for test pattern generation in combinational
circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {12},
number = {5},
pages = {684--694},
year = {1993},
url = {https://doi.org/10.1109/43.277613},
doi = {10.1109/43.277613},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KunzP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/GanesanP93,
author = {Elango Ganesan and
Dhiraj K. Pradhan},
title = {The Hyper-deBruijn Networks: Scalable Versatile Architecture},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {4},
number = {9},
pages = {962--978},
year = {1993},
url = {https://doi.org/10.1109/71.243525},
doi = {10.1109/71.243525},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/GanesanP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tsp/KarP93,
author = {Barun K. Kar and
Dhiraj K. Pradhan},
title = {A new algorithm for order statistic and sorting},
journal = {{IEEE} Trans. Signal Process.},
volume = {41},
number = {8},
pages = {2688--2694},
year = {1993},
url = {https://doi.org/10.1109/78.229899},
doi = {10.1109/78.229899},
timestamp = {Tue, 10 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tsp/KarP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SharmaMP93,
author = {D. D. Sharma and
Fred J. Meyer and
Dhiraj K. Pradhan},
title = {Yield optimization of modular and redundant multimegabit RAMs: a study
of effectiveness of coding versus static redundancy using the center-satellite
model},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {1},
number = {4},
pages = {546--558},
year = {1993},
url = {https://doi.org/10.1109/92.250202},
doi = {10.1109/92.250202},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SharmaMP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KarKP93,
author = {Barun K. Kar and
R. C. K. Kumar and
Dhiraj K. Pradhan},
title = {An application specific processor for implementing stack filters},
booktitle = {International Conference on Application-Specific Array Processors,
{ASAP} 1993, Proceedings, Venice, Italy, 25-27 October, 1993},
pages = {196--199},
publisher = {{IEEE}},
year = {1993},
url = {https://doi.org/10.1109/ASAP.1993.397144},
doi = {10.1109/ASAP.1993.397144},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/asap/KarKP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hsaft/PradhanSV93,
author = {Dhiraj K. Pradhan and
Debendra Das Sharma and
Nitin H. Vaidya},
editor = {Michel Ban{\^{a}}tre and
Peter A. Lee},
title = {Roll-Forward Checkpointing Schemes},
booktitle = {Hardware and Software Architectures for Fault Tolerance, Experiences
and Perspecives [revised papers from a workshop at Le Mont Saint Michel,
France, June 1993]},
series = {Lecture Notes in Computer Science},
volume = {774},
pages = {95--116},
publisher = {Springer},
year = {1993},
url = {https://doi.org/10.1007/BFb0020026},
doi = {10.1007/BFB0020026},
timestamp = {Tue, 14 May 2019 10:00:47 +0200},
biburl = {https://dblp.org/rec/conf/hsaft/PradhanSV93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/PradhanCB93,
author = {Dhiraj K. Pradhan and
Mitrajit Chatterjee and
Savita Banerjee},
editor = {Michael R. Lightner and
Jochen A. G. Jess},
title = {Buffer assignment for data driven architectures},
booktitle = {Proceedings of the 1993 {IEEE/ACM} International Conference on Computer-Aided
Design, 1993, Santa Clara, California, USA, November 7-11, 1993},
pages = {665--668},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1993},
url = {https://doi.org/10.1109/ICCAD.1993.580158},
doi = {10.1109/ICCAD.1993.580158},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/PradhanCB93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SaxenaP93,
author = {Jayashree Saxena and
Dhiraj K. Pradhan},
title = {Desgin for Testability of Asynchronous Sequential Circuits},
booktitle = {Proceedings 1993 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '93, Cambridge, MA, USA,
October 3-6, 1993},
pages = {518--522},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICCD.1993.393323},
doi = {10.1109/ICCD.1993.393323},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SaxenaP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icdcs/VaidyaP93,
author = {Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {Degradable Agreement in the Presence of Byzantine Faults},
booktitle = {Proceedings of the 13th International Conference on Distributed Computing
Systems, Pittsburgh, Pennsylvania, USA, May 25-28, 1993},
pages = {237--244},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/ICDCS.1993.287703},
doi = {10.1109/ICDCS.1993.287703},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icdcs/VaidyaP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/SharmaP93,
author = {Debendra Das Sharma and
Dhiraj K. Pradhan},
editor = {C. Y. Roger Chen and
P. Bruce Berra},
title = {Fast and Efficient Strategies for Cubic and Non-Cubic Allocation in
Hypercube Multiprocessors},
booktitle = {Proceedings of the 1993 International Conference on Parallel Processing,
Syracuse University, NY, USA, August 16-20, 1993. Volume {I:} Architecture},
pages = {118--127},
publisher = {{CRC} Press},
year = {1993},
url = {https://doi.org/10.1109/ICPP.1993.86},
doi = {10.1109/ICPP.1993.86},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/SharmaP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/GanesanP93,
author = {Elango Ganesan and
Dhiraj K. Pradhan},
title = {Optimal Broadcasting in Binary de Bruijn Networks and Hyper-de Bruijn
Networks},
booktitle = {The Seventh International Parallel Processing Symposium, Proceedings,
Newport Beach, California, USA, April 13-16, 1993},
pages = {655--660},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/IPPS.1993.262803},
doi = {10.1109/IPPS.1993.262803},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/GanesanP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SaxenaP93,
author = {Jayashree Saxena and
Dhiraj K. Pradhan},
title = {A Method to Derive Compact Test Sets for Path Delay Faults in Combinational
Circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1993, Designing,
Testing, and Diagnostics - Join Them, Baltimore, Maryland, USA, October
17-21, 1993},
pages = {724--733},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/TEST.1993.470630},
doi = {10.1109/TEST.1993.470630},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SaxenaP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/SharmaP93,
author = {Debendra Das Sharma and
Dhiraj K. Pradhan},
title = {A Fast and Efficient Strategy for Submesh Allocation in Mesh-Connected
Parallel Computers},
booktitle = {Proceedings of the Fifth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1993, Dallas, Texas, USA, December 2-5, 1993},
pages = {682--689},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/SPDP.1993.395466},
doi = {10.1109/SPDP.1993.395466},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/SharmaP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/KarP93,
author = {Barun K. Kar and
Dhiraj K. Pradhan},
title = {Scalability of Binary deBruijn Networks},
booktitle = {Proceedings of the Fifth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1993, Dallas, Texas, USA, December 2-5, 1993},
pages = {796--799},
publisher = {{IEEE} Computer Society},
year = {1993},
url = {https://doi.org/10.1109/SPDP.1993.395451},
doi = {10.1109/SPDP.1993.395451},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/KarP93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BowenP92,
author = {Nicholas S. Bowen and
Dhiraj K. Pradhan},
title = {Virtual Checkpoints: Architecture and Performance},
journal = {{IEEE} Trans. Computers},
volume = {41},
number = {5},
pages = {516--525},
year = {1992},
url = {https://doi.org/10.1109/12.142677},
doi = {10.1109/12.142677},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BowenP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tit/VaidyaP92,
author = {Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {A new class of bit- and byte-error control codes},
journal = {{IEEE} Trans. Inf. Theory},
volume = {38},
number = {5},
pages = {1617--1623},
year = {1992},
url = {https://doi.org/10.1109/18.149518},
doi = {10.1109/18.149518},
timestamp = {Tue, 10 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tit/VaidyaP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/MaaPT92,
author = {Yeong{-}Chang Maa and
Dhiraj K. Pradhan and
Dominique Thi{\'{e}}baut},
editor = {Viktor K. Prasanna and
Larry H. Canter},
title = {A Hierarchical Directory Scheme for Large-Scale Cache-Coherent Multipmcessors},
booktitle = {Proceedings of the 6th International Parallel Processing Symposium,
Beverly Hills, CA, USA, March 1992},
pages = {43--46},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/IPPS.1992.223074},
doi = {10.1109/IPPS.1992.223074},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/MaaPT92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GuptaP92,
author = {Sandeep K. Gupta and
Dhiraj K. Pradhan},
title = {Can Concurrent Checkers Help BIST?},
booktitle = {Proceedings {IEEE} International Test Conference 1992, Discover the
New World of Test and Design, Baltimore, Maryland, USA, September
20-24, 1992},
pages = {140--150},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/TEST.1992.527814},
doi = {10.1109/TEST.1992.527814},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/GuptaP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KunzP92,
author = {Wolfgang Kunz and
Dhiraj K. Pradhan},
title = {Recursive Learning: An Attractive Alternative to the Decision Tree
for Test Genration in Digital Circuits},
booktitle = {Proceedings {IEEE} International Test Conference 1992, Discover the
New World of Test and Design, Baltimore, Maryland, USA, September
20-24, 1992},
pages = {816--825},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/TEST.1992.527905},
doi = {10.1109/TEST.1992.527905},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/KunzP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/SharmaP92,
author = {Debendra Das Sharma and
Dhiraj K. Pradhan},
title = {A Novel Approach for Subcube Allocation in Hypercube Multiprocessors},
booktitle = {Proceedings of the Fourth {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1992, Arlington, Texas, USA, December 1-4, 1992},
pages = {336--345},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/SPDP.1992.242726},
doi = {10.1109/SPDP.1992.242726},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/SharmaP92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PradhanS92,
author = {Dhiraj K. Pradhan and
Jayashree Saxena},
title = {A design for testability scheme to reduce test application time in
full scan},
booktitle = {10th {IEEE} {VLSI} Test Symposium (VTS'92), 7-9 Apr 1992, Atlantic
City, NJ, {USA}},
pages = {55--60},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/VTEST.1992.232724},
doi = {10.1109/VTEST.1992.232724},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/PradhanS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/MaaPT91,
author = {Yeong{-}Chang Maa and
Dhiraj K. Pradhan and
Dominique Thi{\'{e}}baut},
title = {Two economical directory schemes for large-scale cache coherent multiprocessors},
journal = {{SIGARCH} Comput. Archit. News},
volume = {19},
number = {5},
pages = {10},
year = {1991},
url = {https://doi.org/10.1145/379189.379198},
doi = {10.1145/379189.379198},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/MaaPT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanG91,
author = {Dhiraj K. Pradhan and
Sandeep K. Gupta},
title = {A New Framework for Designing and Analyzing {BIST} Techniques and
Zero Aliasing Compression},
journal = {{IEEE} Trans. Computers},
volume = {40},
number = {6},
pages = {743--763},
year = {1991},
url = {https://doi.org/10.1109/12.90252},
doi = {10.1109/12.90252},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanG91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tpds/MeyerP91,
author = {Fred J. Meyer and
Dhiraj K. Pradhan},
title = {Consensus With Dual Failure Modes},
journal = {{IEEE} Trans. Parallel Distributed Syst.},
volume = {2},
number = {2},
pages = {214--222},
year = {1991},
url = {https://doi.org/10.1109/71.89066},
doi = {10.1109/71.89066},
timestamp = {Fri, 02 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tpds/MeyerP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/BowenP91,
author = {Nicholas S. Bowen and
Dhiraj K. Pradhan},
title = {Program Fault Tolerance Based on Memory Access Behavior},
booktitle = {Proceedings of the 1991 International Symposium on Fault-Tolerant
Computing, Montreal, Canada},
pages = {426--435},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/FTCS.1991.146696},
doi = {10.1109/FTCS.1991.146696},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/BowenP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/VaidyaP91,
author = {Nitin H. Vaidya and
Dhiraj K. Pradhan},
title = {System Level Diagnosis: Combining Detection and Location},
booktitle = {Proceedings of the 1991 International Symposium on Fault-Tolerant
Computing, Montreal, Canada},
pages = {488--495},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/FTCS.1991.146706},
doi = {10.1109/FTCS.1991.146706},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/VaidyaP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icdcs/GanesanP91,
author = {Elango Ganesan and
Dhiraj K. Pradhan},
title = {The hyper-deBruijn multiprocessor networks},
booktitle = {10th International Conference on Distributed Computing Systems {(ICDCS}
1991), May 20-24, 1991, Arlington, Texas, {USA}},
pages = {492--499},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/ICDCS.1991.148716},
doi = {10.1109/ICDCS.1991.148716},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icdcs/GanesanP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KarpovskyGP91,
author = {Mark G. Karpovsky and
Sandeep K. Gupta and
Dhiraj K. Pradhan},
title = {Aliasing and Diagnosis Probability in {MISR} and {STUMPS} Using a
General Error Model},
booktitle = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
pages = {828--839},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/TEST.1991.519748},
doi = {10.1109/TEST.1991.519748},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/KarpovskyGP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/BowenP91,
author = {Nicholas S. Bowen and
Dhiraj K. Pradhan},
editor = {Joanne L. Martin},
title = {A virtual memory translation mechanism to support checkpoint and rollback
recovery},
booktitle = {Proceedings Supercomputing '91, Albuquerque, NM, USA, November 18-22,
1991},
pages = {890--899},
publisher = {{ACM}},
year = {1991},
url = {https://doi.org/10.1145/125826.126719},
doi = {10.1145/125826.126719},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/sc/BowenP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spdp/SuriMP91,
author = {Neeraj Suri and
Avi Mendelson and
Dhiraj K. Pradhan},
title = {BDG-torus union graph-an efficient algorithmically specializedparallel
interconnect},
booktitle = {Proceedings of the Third {IEEE} Symposium on Parallel and Distributed
Processing, {SPDP} 1991, 2-5 December 1991, Dallas, Texas, {USA}},
pages = {407--414},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/SPDP.1991.218212},
doi = {10.1109/SPDP.1991.218212},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spdp/SuriMP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/FujiwaraP90,
author = {Eiji Fujiwara and
Dhiraj K. Pradhan},
title = {Error-Control Coding in Computers},
journal = {Computer},
volume = {23},
number = {7},
pages = {63--72},
year = {1990},
url = {https://doi.org/10.1109/2.56853},
doi = {10.1109/2.56853},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/FujiwaraP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/CheungSSP90,
author = {Kifung C. Cheung and
Gurindar S. Sohi and
Kewal K. Saluja and
Dhiraj K. Pradhan},
title = {Design and Analysis of a Gracefully Degrading Interleaved Memory System},
journal = {{IEEE} Trans. Computers},
volume = {39},
number = {1},
pages = {63--71},
year = {1990},
url = {https://doi.org/10.1109/12.46281},
doi = {10.1109/12.46281},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/CheungSSP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanGK90,
author = {Dhiraj K. Pradhan and
Sandeep K. Gupta and
Mark G. Karpovsky},
title = {Aliasing Probability for Multiple Input Signature Analyzer},
journal = {{IEEE} Trans. Computers},
volume = {39},
number = {4},
pages = {586--591},
year = {1990},
url = {https://doi.org/10.1109/12.54855},
doi = {10.1109/12.54855},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanGK90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Pradhan90,
author = {Dhiraj K. Pradhan},
title = {Application specific {VLSI} architectures based on De Bruijn graphs},
booktitle = {Application Specific Array Processors, {ASAP} 1990. Proceedings of
the International Conference on, Princeton, NJ, USA, 5-7 Sept., 1990},
pages = {628--640},
publisher = {{IEEE}},
year = {1990},
url = {https://doi.org/10.1109/ASAP.1990.145498},
doi = {10.1109/ASAP.1990.145498},
timestamp = {Sun, 08 Aug 2021 01:40:48 +0200},
biburl = {https://dblp.org/rec/conf/asap/Pradhan90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ftcs/GuptaPR90,
author = {Sandeep K. Gupta and
Dhiraj K. Pradhan and
Sudhakar M. Reddy},
title = {Zero aliasing compression},
booktitle = {Proceedings of the 20th International Symposium on Fault-Tolerant
Computing, {FTCS} 1990, Newcastle Upon Tyne, UK, 26-28 June, 1990},
pages = {254--263},
publisher = {{IEEE} Computer Society},
year = {1990},
url = {https://doi.org/10.1109/FTCS.1990.89373},
doi = {10.1109/FTCS.1990.89373},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ftcs/GuptaPR90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/MendelsonTP90,
author = {Abraham Mendelson and
Dominique Thi{\'{e}}baut and
Dhiraj K. Pradhan},
editor = {Benjamin W. Wah},
title = {Modeling of Live Lines and True Sharing in Multi-Cache Memory Systems},
booktitle = {Proceedings of the 1990 International Conference on Parallel Processing,
Urbana-Champaign, IL, USA, August 1990. Volume 1: Architecture},
pages = {326--330},
publisher = {Pennsylvania State University Press},
year = {1990},
timestamp = {Mon, 28 Jul 2014 17:06:01 +0200},
biburl = {https://dblp.org/rec/conf/icpp/MendelsonTP90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/MendelsonPS89,
author = {Abraham Mendelson and
Dhiraj K. Pradhan and
Adit D. Singh},
title = {A single cached copy data coherence scheme for multiprocessor systems},
journal = {{SIGARCH} Comput. Archit. News},
volume = {17},
number = {6},
pages = {36--49},
year = {1989},
url = {https://doi.org/10.1145/77254.77257},
doi = {10.1145/77254.77257},
timestamp = {Thu, 08 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/MendelsonPS89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MeyerP89,
author = {Fred J. Meyer and
Dhiraj K. Pradhan},
title = {Dynamic Testing Strategy for Distributed Systems},
journal = {{IEEE} Trans. Computers},
volume = {38},
number = {3},
pages = {356--365},
year = {1989},
url = {https://doi.org/10.1109/12.21122},
doi = {10.1109/12.21122},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MeyerP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MeyerP89a,
author = {Fred J. Meyer and
Dhiraj K. Pradhan},
title = {Modeling Defect Spatial Distribution},
journal = {{IEEE} Trans. Computers},
volume = {38},
number = {4},
pages = {538--546},
year = {1989},
url = {https://doi.org/10.1109/12.21146},
doi = {10.1109/12.21146},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MeyerP89a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/SamathamP89,
author = {Maheswara R. Samatham and
Dhiraj K. Pradhan},
title = {The De Bruijn Multiprocessor Network: {A} Versatile Parallel Processing
and Sorting Network for {VLSI}},
journal = {{IEEE} Trans. Computers},
volume = {38},
number = {4},
pages = {567--581},
year = {1989},
url = {https://doi.org/10.1109/12.21149},
doi = {10.1109/12.21149},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/SamathamP89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dimacs/Pradhan89,
author = {Dhiraj K. Pradhan},
editor = {Fred Roberts and
Frank Hwang and
Clyde L. Monma},
title = {Fault-Tolerant {VLSI} Architectures Based on de Bruijn Graphs (Galileo
in the Mid Nineties)},
booktitle = {Reliability Of Computer And Communication Networks, Proceedings of
a {DIMACS} Workshop, New Brunswick, New Jersey, USA, December 2-4,
1989},
series = {{DIMACS} Series in Discrete Mathematics and Theoretical Computer Science},
volume = {5},
pages = {183--196},
publisher = {{DIMACS/AMS}},
year = {1989},
url = {https://doi.org/10.1090/dimacs/005/12},
doi = {10.1090/DIMACS/005/12},
timestamp = {Mon, 22 May 2023 16:07:35 +0200},
biburl = {https://dblp.org/rec/conf/dimacs/Pradhan89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MeyerP88,
author = {Fred J. Meyer and
Dhiraj K. Pradhan},
title = {Flip-Trees: Fault-Tolerant Graphs with Wide Containers},
journal = {{IEEE} Trans. Computers},
volume = {37},
number = {4},
pages = {472--478},
year = {1988},
url = {https://doi.org/10.1109/12.2194},
doi = {10.1109/12.2194},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MeyerP88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/JarwalaP88,
author = {Najmi T. Jarwala and
Dhiraj K. Pradhan},
title = {{TRAM:} {A} Design Methodology for High-Performance, Easily Testable,
Multimegabit RAM's},
journal = {{IEEE} Trans. Computers},
volume = {37},
number = {10},
pages = {1235--1250},
year = {1988},
url = {https://doi.org/10.1109/12.5985},
doi = {10.1109/12.5985},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/JarwalaP88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/PradhanK88,
author = {Dhiraj K. Pradhan and
Nirmala R. Kamath},
title = {{RTRAM:} Reconfigurable and Testable Multi-Bit {RAM} Design},
booktitle = {Proceedings International Test Conference 1988, Washington, D.C.,
USA, September 1988},
pages = {263--278},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/TEST.1988.207811},
doi = {10.1109/TEST.1988.207811},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/itc/PradhanK88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/GuptaP88,
author = {Sandeep K. Gupta and
Dhiraj K. Pradhan},
title = {A New Framework for Designing and Analyzing {BIST} Techniques: Computation
of Exact Aliasing Probability},
booktitle = {Proceedings International Test Conference 1988, Washington, D.C.,
USA, September 1988},
pages = {329--342},
publisher = {{IEEE} Computer Society},
year = {1988},
url = {https://doi.org/10.1109/TEST.1988.207819},
doi = {10.1109/TEST.1988.207819},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/GuptaP88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/KorenP87,
author = {Israel Koren and
Dhiraj K. Pradhan},
title = {Modeling the Effect of Redundancy on Yield and Performance of {VLSI}
Systems},
journal = {{IEEE} Trans. Computers},
volume = {36},
number = {3},
pages = {344--355},
year = {1987},
url = {https://doi.org/10.1109/TC.1987.1676906},
doi = {10.1109/TC.1987.1676906},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/KorenP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/CheungSSP87,
author = {Kifung C. Cheung and
Gurindar S. Sohi and
Kewal K. Saluja and
Dhiraj K. Pradhan},
editor = {Daniel C. St. Clair},
title = {Organization and Analysis of a Gracefully-Degrading Interleaved Memory
System},
booktitle = {Proceedings of the 14th Annual International Symposium on Computer
Architecture. Pittsburgh, PA, USA, June 1987},
pages = {224--231},
year = {1987},
url = {https://doi.org/10.1145/30350.30376},
doi = {10.1145/30350.30376},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/CheungSSP87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/KorenP86,
author = {Israel Koren and
Dhiraj K. Pradhan},
title = {Yield and performance enhancement through redundancy in {VLSI} and
{WSI} multiprocessor systems},
journal = {Proc. {IEEE}},
volume = {74},
number = {5},
pages = {699--711},
year = {1986},
url = {https://doi.org/10.1109/PROC.1986.13532},
doi = {10.1109/PROC.1986.13532},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/pieee/KorenP86.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Paradhan85,
author = {Dhiraj K. Pradhan},
title = {Fault-Tolerant Multiprocessor Link and Bus Network Architectures},
journal = {{IEEE} Trans. Computers},
volume = {34},
number = {1},
pages = {33--45},
year = {1985},
url = {https://doi.org/10.1109/TC.1985.1676513},
doi = {10.1109/TC.1985.1676513},
timestamp = {Tue, 28 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Paradhan85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Pradhan85,
author = {Dhiraj K. Pradhan},
title = {Dynamically Restructurable Fault-Tolerant Processor Network Architectures},
journal = {{IEEE} Trans. Computers},
volume = {34},
number = {5},
pages = {434--447},
year = {1985},
url = {https://doi.org/10.1109/TC.1985.1676583},
doi = {10.1109/TC.1985.1676583},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Pradhan85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/SamathamP85,
author = {Maheswara R. Samatham and
Dhiraj K. Pradhan},
editor = {Thomas F. Gannon and
Tilak Agerwala and
Charles V. Freiman},
title = {The de Bruijn Multiprocessor Network: {A} Versatile Sorting Network},
booktitle = {Proceedings of the 12th Annual Symposium on Computer Architecture,
Boston, MA, USA, June 1985},
pages = {360--367},
publisher = {{IEEE} Computer Society},
year = {1985},
url = {https://doi.org/10.1145/327070.327369},
doi = {10.1145/327070.327369},
timestamp = {Tue, 31 Aug 2021 17:59:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/SamathamP85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Samatham84,
author = {Maheswara R. Samatham and
Dhiraj K. Pradhan},
editor = {Dharma P. Agrawal},
title = {A Multiprocessor Network Suitable for Single-Chip {VLSI} Implementation},
booktitle = {Proceedings of the 11th Annual Symposium on Computer Architecture,
Ann Arbor, USA, June 1984},
pages = {328--337},
publisher = {{ACM}},
year = {1984},
url = {https://doi.org/10.1145/800015.808202},
doi = {10.1145/800015.808202},
timestamp = {Tue, 13 Jul 2021 10:01:21 +0200},
biburl = {https://dblp.org/rec/conf/isca/Samatham84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Pradhan83,
author = {Dhiraj K. Pradhan},
title = {Sequential Network Design Using Extra Inputs for Fault Detection},
journal = {{IEEE} Trans. Computers},
volume = {32},
number = {3},
pages = {319--323},
year = {1983},
url = {https://doi.org/10.1109/TC.1983.1676225},
doi = {10.1109/TC.1983.1676225},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Pradhan83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/BoseP82,
author = {Bella Bose and
Dhiraj K. Pradhan},
title = {Optimal Unidirectional Error Detecting/Correcting Codes},
journal = {{IEEE} Trans. Computers},
volume = {31},
number = {6},
pages = {564--568},
year = {1982},
url = {https://doi.org/10.1109/TC.1982.1676043},
doi = {10.1109/TC.1982.1676043},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/BoseP82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanR82,
author = {Dhiraj K. Pradhan and
Sudhakar M. Reddy},
title = {A Fault-Tolerant Communication Architecture for Distributed Systems},
journal = {{IEEE} Trans. Computers},
volume = {31},
number = {9},
pages = {863--870},
year = {1982},
url = {https://doi.org/10.1109/TC.1982.1676101},
doi = {10.1109/TC.1982.1676101},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanR82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icdcs/Pradhan82,
author = {Dhiraj K. Pradhan},
title = {On a Class of Fault-Tolerant Multiprocessor Network Architectures},
booktitle = {Proceedings of the 3rd International Conference on Distributed Computing
Systems, Miami/Ft. Lauderdale, Florida, USA, October 18-22, 1982},
pages = {302--311},
publisher = {{IEEE} Computer Society},
year = {1982},
timestamp = {Wed, 21 Sep 2005 15:11:36 +0200},
biburl = {https://dblp.org/rec/conf/icdcs/Pradhan82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SonP81,
author = {Kyushik Son and
Dhiraj K. Pradhan},
title = {Completely Self-Checking Checkers in PLAs},
booktitle = {Proceedings International Test Conference 1981, Philadelphia, PA,
USA, October 1981},
pages = {231--240},
publisher = {{IEEE} Computer Society},
year = {1981},
timestamp = {Tue, 22 Oct 2002 12:22:34 +0200},
biburl = {https://dblp.org/rec/conf/itc/SonP81.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/Pradhan80,
author = {Dhiraj K. Pradhan},
title = {Fault-Tolerant Computing},
journal = {Computer},
volume = {13},
number = {3},
pages = {6--7},
year = {1980},
url = {https://doi.org/10.1109/MC.1980.1653522},
doi = {10.1109/MC.1980.1653522},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/Pradhan80.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/PradhanS80,
author = {Dhiraj K. Pradhan and
Jack J. Stiffler},
title = {Error-Correcting Codes and Self-Checking Circuits},
journal = {Computer},
volume = {13},
number = {3},
pages = {27--37},
year = {1980},
url = {https://doi.org/10.1109/MC.1980.1653527},
doi = {10.1109/MC.1980.1653527},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/PradhanS80.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/KodandapaniP80,
author = {Kolar L. Kodandapani and
Dhiraj K. Pradhan},
title = {Undetectability of Bridging Faults and Validity of Stuck-At Fault
Test Sets},
journal = {{IEEE} Trans. Computers},
volume = {29},
number = {1},
pages = {55--59},
year = {1980},
url = {https://doi.org/10.1109/TC.1980.1675457},
doi = {10.1109/TC.1980.1675457},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/KodandapaniP80.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Pradhan80,
author = {Dhiraj K. Pradhan},
title = {A New Class of Error-Correcting/Detecting Codes for Fault-Tolerant
Computer Applications},
journal = {{IEEE} Trans. Computers},
volume = {29},
number = {6},
pages = {471--481},
year = {1980},
url = {https://doi.org/10.1109/TC.1980.1675606},
doi = {10.1109/TC.1980.1675606},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Pradhan80.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanK80,
author = {Dhiraj K. Pradhan and
Kolar L. Kodandapani},
title = {A Uniform Representation of Single- and Multistage Interconnection
Networks Used in {SIMD} Machines},
journal = {{IEEE} Trans. Computers},
volume = {29},
number = {9},
pages = {777--791},
year = {1980},
url = {https://doi.org/10.1109/TC.1980.1675677},
doi = {10.1109/TC.1980.1675677},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanK80.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Pradhan78a,
author = {Dhiraj K. Pradhan},
title = {Universal Test Sets for Multiple Fault Detection in {AND-EXOR} Arrays},
journal = {{IEEE} Trans. Computers},
volume = {27},
number = {2},
pages = {181--187},
year = {1978},
url = {https://doi.org/10.1109/TC.1978.1675057},
doi = {10.1109/TC.1978.1675057},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Pradhan78a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Pradhan78b,
author = {Dhiraj K. Pradhan},
title = {A Theory of Galois Switching Functions},
journal = {{IEEE} Trans. Computers},
volume = {27},
number = {3},
pages = {239--248},
year = {1978},
url = {https://doi.org/10.1109/TC.1978.1675077},
doi = {10.1109/TC.1978.1675077},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Pradhan78b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Pradhan78c,
author = {Dhiraj K. Pradhan},
title = {Asynchronous State Assignments with Unateness Properties and Fault-Secure
Design},
journal = {{IEEE} Trans. Computers},
volume = {27},
number = {5},
pages = {396--404},
year = {1978},
url = {https://doi.org/10.1109/TC.1978.1675118},
doi = {10.1109/TC.1978.1675118},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Pradhan78c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Pradhan78,
author = {Dhiraj K. Pradhan},
title = {Fault-Tolerant Asynchronous Networks Using Read-Only Memories},
journal = {{IEEE} Trans. Computers},
volume = {27},
number = {7},
pages = {674--679},
year = {1978},
url = {https://doi.org/10.1109/TC.1978.1675168},
doi = {10.1109/TC.1978.1675168},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Pradhan78.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/isci/ChangP77,
author = {L. C. Chang and
Dhiraj K. Pradhan},
title = {A graph-structural approach for the generalization of data management
systems},
journal = {Inf. Sci.},
volume = {12},
number = {1},
pages = {1--18},
year = {1977},
url = {https://doi.org/10.1016/0020-0255(77)90035-4},
doi = {10.1016/0020-0255(77)90035-4},
timestamp = {Sat, 27 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/isci/ChangP77.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/HsiaoPP77,
author = {M. Y. Hsiao and
Arvind M. Patel and
Dhiraj K. Pradhan},
title = {Store Address Generator with On-Line Fault-Detection Capability},
journal = {{IEEE} Trans. Computers},
volume = {26},
number = {11},
pages = {1144--1151},
year = {1977},
url = {https://doi.org/10.1109/TC.1977.1674762},
doi = {10.1109/TC.1977.1674762},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/HsiaoPP77.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanR76,
author = {Dhiraj K. Pradhan and
Sudhakar M. Reddy},
title = {Techniques to Construct (2, 1) Separating Systems from Linear Error-Correcting
Codes},
journal = {{IEEE} Trans. Computers},
volume = {25},
number = {9},
pages = {945--949},
year = {1976},
timestamp = {Thu, 20 Nov 2003 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/PradhanR76.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanP75,
author = {Dhiraj K. Pradhan and
Arvind M. Patel},
title = {Reed-Muller Like Canonic Forms for Multivalued Functions},
journal = {{IEEE} Trans. Computers},
volume = {24},
number = {2},
pages = {206--210},
year = {1975},
url = {https://doi.org/10.1109/T-C.1975.224186},
doi = {10.1109/T-C.1975.224186},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanP75.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanR74,
author = {Dhiraj K. Pradhan and
Sudhakar M. Reddy},
title = {Design of Two-Level Fault-Tolerant Networks},
journal = {{IEEE} Trans. Computers},
volume = {23},
number = {1},
pages = {41--48},
year = {1974},
url = {https://doi.org/10.1109/T-C.1974.223775},
doi = {10.1109/T-C.1974.223775},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanR74.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Pradhan74,
author = {Dhiraj K. Pradhan},
title = {Fault-Tolerant Carry-Save Adders},
journal = {{IEEE} Trans. Computers},
volume = {23},
number = {12},
pages = {1320--1322},
year = {1974},
url = {https://doi.org/10.1109/T-C.1974.223857},
doi = {10.1109/T-C.1974.223857},
timestamp = {Thu, 25 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Pradhan74.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanR73,
author = {Dhiraj K. Pradhan and
Sudhakar M. Reddy},
title = {Fault-Tolerant Asynchronous Networks},
journal = {{IEEE} Trans. Computers},
volume = {22},
number = {7},
pages = {662--669},
year = {1973},
url = {https://doi.org/10.1109/TC.1973.5009132},
doi = {10.1109/TC.1973.5009132},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanR73.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/PradhanR72,
author = {Dhiraj K. Pradhan and
Sudhakar M. Reddy},
title = {Error-Control Techniques for Logic Processors},
journal = {{IEEE} Trans. Computers},
volume = {21},
number = {12},
pages = {1331--1336},
year = {1972},
url = {https://doi.org/10.1109/T-C.1972.223504},
doi = {10.1109/T-C.1972.223504},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/PradhanR72.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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