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ORCIDBibTeX records: Oscar Palomar
@article{DBLP:journals/dt/JimenezRDSDVGQGSPM23,
author = {V{\'{\i}}ctor Jim{\'{e}}nez and
Mario Rodr{\'{\i}}guez and
Marc Dom{\'{\i}}nguez and
Josep Sans and
Ivan Diaz and
Luca Valente and
Vito Luca Guglielmi and
Josue V. Quiroga and
R. Ignacio Genovese and
Nehir S{\"{o}}nmez and
Oscar Palomar and
Miquel Moret{\'{o}}},
title = {Functional Verification of a {RISC-V} Vector Accelerator},
journal = {{IEEE} Des. Test},
volume = {40},
number = {3},
pages = {36--44},
year = {2023},
url = {https://doi.org/10.1109/MDAT.2022.3226709},
doi = {10.1109/MDAT.2022.3226709},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/JimenezRDSDVGQGSPM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/KovacDMMPROKK23,
author = {Mate Kovac and
Leon Dragic and
Branimir Malnar and
Francesco Minervini and
Oscar Palomar and
Carlos Rojas and
Mauro Olivieri and
Josip Knezovic and
Mario Kovac},
title = {{FAUST:} Design and implementation of a pipelined {RISC-V} vector
floating-point unit},
journal = {Microprocess. Microsystems},
volume = {97},
pages = {104762},
year = {2023},
url = {https://doi.org/10.1016/j.micpro.2023.104762},
doi = {10.1016/J.MICPRO.2023.104762},
timestamp = {Fri, 18 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/KovacDMMPROKK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/MinerviniPURQMRFRGMVHCKBPMOKKDVC23,
author = {Francesco Minervini and
Oscar Palomar and
Osman S. Unsal and
Enrico Reggiani and
Josue V. Quiroga and
Joan Marimon and
Carlos Rojas and
Roger Figueras and
Abraham Ruiz and
Alberto Gonz{\'{a}}lez and
Jonnatan Mendoza and
Iv{\'{a}}n Vargas and
C{\'{e}}sar Hern{\'{a}}ndez and
Joan Cabre and
Lina Khoirunisya and
Mustapha Bouhali and
Julian Pavon and
Francesc Moll and
Mauro Olivieri and
Mario Kovac and
Mate Kovac and
Leon Dragic and
Mateo Valero and
Adri{\'{a}}n Cristal},
title = {Vitruvius+: An Area-Efficient {RISC-V} Decoupled Vector Coprocessor
for High Performance Computing Applications},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {20},
number = {2},
pages = {28:1--28:25},
year = {2023},
url = {https://doi.org/10.1145/3575861},
doi = {10.1145/3575861},
timestamp = {Fri, 21 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/MinerviniPURQMRFRGMVHCKBPMOKKDVC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/AlvarezRBK0MBAM23,
author = {Lluc Alvarez and
Abraham Ruiz and
Arnau Bigas{-}Soldevilla and
Pavel Kuroedov and
Alberto Gonz{\'{a}}lez and
Hamsika Mahale and
Noe Bustamante and
Albert Aguilera and
Francesco Minervini and
Javier Salamero and
Oscar Palomar and
Vassilis Papaefstathiou and
Antonis Psathakis and
Nikolaos Dimou and
Michalis Giaourtas and
Iasonas Mastorakis and
Georgios Ieronymakis and
Georgios{-}Michail Matzouranis and
Vassilis Flouris and
Nick Kossifidis and
Manolis Marazakis and
Bhavishya Goel and
Madhavan Manivannan and
Ahsen Ejaz and
Panagiotis Strikos and
Mateo V{\'{a}}zquez and
Ioannis Sourdis and
Pedro Trancoso and
Per Stenstr{\"{o}}m and
Jens Hagemeyer and
Lennart Tigges and
Nils Kucza and
Jean{-}Marc Philippe and
Ioannis Papaefstathiou},
editor = {Andrea Bartolini and
Kristian F. D. Rietveld and
Catherine D. Schuman and
Jose Moreira},
title = {eProcessor: European, Extendable, Energy-Efficient, Extreme-Scale,
Extensible, Processor Ecosystem},
booktitle = {Proceedings of the 20th {ACM} International Conference on Computing
Frontiers, {CF} 2023, Bologna, Italy, May 9-11, 2023},
pages = {309--314},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3587135.3592178},
doi = {10.1145/3587135.3592178},
timestamp = {Sat, 30 Sep 2023 09:36:30 +0200},
biburl = {https://dblp.org/rec/conf/cf/AlvarezRBK0MBAM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/DoblasCCDE0HJKL23,
author = {Max Doblas and
Gerard Cand{\'{o}}n and
Xavier Carril and
Marc Dom{\'{\i}}nguez and
Enric Erra and
Alberto Gonz{\'{a}}lez and
C{\'{e}}sar Hern{\'{a}}ndez and
V{\'{\i}}ctor Jim{\'{e}}nez and
Vatistas Kostalampros and
Rub{\'{e}}n Langarita and
Neiel Leyva and
Guillem L{\'{o}}pez{-}Parad{\'{\i}}s and
Jonnatan Mendoza and
Josep Oltra and
Juli{\'{a}}n Pav{\'{o}}n and
Crist{\'{o}}bal Ram{\'{\i}}rez and
Narc{\'{\i}}s Rodas and
Enrico Reggiani and
Mario Rodr{\'{\i}}guez and
Carlos Rojas and
Abraham Ruiz and
Hugo Safadi and
V{\'{\i}}ctor Soria and
Alejandro Suanes and
Iv{\'{a}}n Vargas and
Fernando Arreza and
Roger Figueras and
Pau Fontova{-}Must{\'{e}} and
Joan Marimon and
Ricardo Mart{\'{\i}}nez and
Sergio Moreno and
Jordi Sacrist{\'{a}}n and
Oscar Alonso and
Xavier Aragon{\`{e}}s and
Adri{\'{a}}n Cristal and
{\'{A}}ngel Di{\'{e}}guez and
Manuel L{\'{o}}pez and
Diego Mateo and
Francesc Moll and
Miquel Moret{\'{o}} and
Oscar Palomar and
Marco A. Ram{\'{\i}}rez and
Francisco Serra{-}Graells and
Nehir S{\"{o}}nmez and
Llu{\'{\i}}s Ter{\'{e}}s and
Osman S. Unsal and
Mateo Valero and
Luis Villa},
title = {Sargantana: An Academic SoC {RISC-V} Processor in 22nm {FDSOI} Technology},
booktitle = {38th Conference on Design of Circuits and Integrated Systems, {DCIS}
2023, M{\'{a}}laga, Spain, November 15-17, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DCIS58620.2023.10335976},
doi = {10.1109/DCIS58620.2023.10335976},
timestamp = {Mon, 25 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/DoblasCCDE0HJKL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/CaboCCDDGHJKLLL22,
author = {Guillem Cabo and
Gerard Cand{\'{o}}n and
Xavier Carril and
Max Doblas and
Marc Dom{\'{\i}}nguez and
Alberto Gonz{\'{a}}lez and
C{\'{e}}sar Hern{\'{a}}ndez and
V{\'{\i}}ctor Jim{\'{e}}nez and
Vatistas Kostalampros and
Rub{\'{e}}n Langarita and
Neiel Leyva and
Guillem L{\'{o}}pez{-}Parad{\'{\i}}s and
Jonnatan Mendoza and
Francesco Minervini and
Juli{\'{a}}n Pav{\'{o}}n and
Crist{\'{o}}bal Ram{\'{\i}}rez and
Narc{\'{\i}}s Rodas and
Enrico Reggiani and
Mario Rodr{\'{\i}}guez and
Carlos Rojas and
Abraham Ruiz and
V{\'{\i}}ctor Soria and
Alejandro Suanes and
Iv{\'{a}}n Vargas and
Roger Figueras and
Pau Fontova and
Joan Marimon and
V{\'{\i}}ctor Montabes and
Adri{\'{a}}n Cristal and
Carles Hern{\'{a}}ndez and
Ricardo Mart{\'{\i}}nez and
Miquel Moret{\'{o}} and
Francesc Moll and
Oscar Palomar and
Marco A. Ram{\'{\i}}rez and
Antonio Rubio and
Jordi Sacrist{\'{a}}n and
Francisco Serra{-}Graells and
Nehir S{\"{o}}nmez and
Llu{\'{\i}}s Ter{\'{e}}s and
Osman S. Unsal and
Mateo Valero and
Lu{\'{\i}}s Villa},
title = {{DVINO:} {A} {RISC-V} Vector Processor Implemented in 65nm Technology},
booktitle = {37th Conference on Design of Circuits and Integrated Systems, {DCIS}
2022, Pamplona, Spain, November 16-18, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/DCIS55711.2022.9970128},
doi = {10.1109/DCIS55711.2022.9970128},
timestamp = {Mon, 25 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/CaboCCDDGHJKLLL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2111-01949,
author = {Crist{\'{o}}bal Ram{\'{\i}}rez Lazo and
C{\'{e}}sar{-}Alejandro Hern{\'{a}}ndez{-}Calder{\'{o}}n and
Oscar Palomar and
Osman Sabri Unsal and
Marco Antonio Ram{\'{\i}}rez and
Adri{\'{a}}n Cristal},
title = {A {RISC-V} Simulator and Benchmark Suite for Designing and Evaluating
Vector Architectures},
journal = {CoRR},
volume = {abs/2111.01949},
year = {2021},
url = {https://arxiv.org/abs/2111.01949},
eprinttype = {arXiv},
eprint = {2111.01949},
timestamp = {Fri, 05 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2111-01949.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/RamirezHPURC20,
author = {Crist{\'{o}}bal Ram{\'{\i}}rez and
C{\'{e}}sar{-}Alejandro Hern{\'{a}}ndez{-}Calder{\'{o}}n and
Oscar Palomar and
Osman S. Unsal and
Marco Antonio Ram{\'{\i}}rez and
Adri{\'{a}}n Cristal},
title = {A {RISC-V} Simulator and Benchmark Suite for Designing and Evaluating
Vector Architectures},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {17},
number = {4},
pages = {38:1--38:30},
year = {2020},
url = {https://doi.org/10.1145/3422667},
doi = {10.1145/3422667},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/RamirezHPURC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2005-07619,
author = {Miquel Peric{\`{a}}s and
Oscar Palomar and
Vassilis Papaefstathiou and
Mahmoud Eljammaly},
title = {Proceedings of the Thirteenth International Workshop on Programmability
and Architectures for Heterogeneous Multicores {(MULTIPROG-2020)}},
journal = {CoRR},
volume = {abs/2005.07619},
year = {2020},
url = {https://arxiv.org/abs/2005.07619},
eprinttype = {arXiv},
eprint = {2005.07619},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2005-07619.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/IordanouPMGNL19,
author = {Konstantinos Iordanou and
Oscar Palomar and
John Mawer and
Cosmin Gorgovan and
Andy Nisbet and
Mikel Luj{\'{a}}n},
title = {SimAcc: {A} Configurable Cycle-Accurate Simulator for Customized Accelerators
on CPU-FPGAs SoCs},
booktitle = {27th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2019, San Diego, CA, USA, April 28 - May
1, 2019},
pages = {163--171},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/FCCM.2019.00031},
doi = {10.1109/FCCM.2019.00031},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/IordanouPMGNL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/SaeediBWNNMMPVS18,
author = {Sajad Saeedi and
Bruno Bodin and
Harry Wagstaff and
Andy Nisbet and
Luigi Nardi and
John Mawer and
Nicolas Melot and
Oscar Palomar and
Emanuele Vespa and
Tom Spink and
Cosmin Gorgovan and
Andrew M. Webb and
James Clarkson and
Erik Tomusk and
Thomas Debrunner and
Kuba Kaszyk and
Pablo Gonz{\'{a}}lez de Aledo Marug{\'{a}}n and
Andrey Rodchenko and
Graham D. Riley and
Christos Kotselidis and
Bj{\"{o}}rn Franke and
Michael F. P. O'Boyle and
Andrew J. Davison and
Paul H. J. Kelly and
Mikel Luj{\'{a}}n and
Steve B. Furber},
title = {Navigating the Landscape for Real-Time Localization and Mapping for
Robotics and Virtual and Augmented Reality},
journal = {Proc. {IEEE}},
volume = {106},
number = {11},
pages = {2020--2039},
year = {2018},
url = {https://doi.org/10.1109/JPROC.2018.2856739},
doi = {10.1109/JPROC.2018.2856739},
timestamp = {Fri, 11 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pieee/SaeediBWNNMMPVS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/RatkovicPSUCV18,
author = {Ivan Ratkovic and
Oscar Palomar and
Milan Stanic and
Osman Sabri Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {Vector Processing-Aware Advanced Clock-Gating Techniques for Low-Power
Fused Multiply-Add},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {26},
number = {4},
pages = {639--652},
year = {2018},
url = {https://doi.org/10.1109/TVLSI.2017.2784807},
doi = {10.1109/TVLSI.2017.2784807},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/RatkovicPSUCV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/vlsisp/HussainPUCA18,
author = {Tassadaq Hussain and
Oscar Palomar and
Osman S. {\"{U}}nsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}}},
title = {Memory Controller for Vector Processor},
journal = {J. Signal Process. Syst.},
volume = {90},
number = {11},
pages = {1533--1549},
year = {2018},
url = {https://doi.org/10.1007/s11265-016-1215-5},
doi = {10.1007/S11265-016-1215-5},
timestamp = {Thu, 12 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/vlsisp/HussainPUCA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1808-06352,
author = {Sajad Saeedi and
Bruno Bodin and
Harry Wagstaff and
Andy Nisbet and
Luigi Nardi and
John Mawer and
Nicolas Melot and
Oscar Palomar and
Emanuele Vespa and
Tom Spink and
Cosmin Gorgovan and
Andrew M. Webb and
James Clarkson and
Erik Tomusk and
Thomas Debrunner and
Kuba Kaszyk and
Pablo Gonz{\'{a}}lez de Aledo and
Andrey Rodchenko and
Graham D. Riley and
Christos Kotselidis and
Bj{\"{o}}rn Franke and
Michael F. P. O'Boyle and
Andrew J. Davison and
Paul H. J. Kelly and
Mikel Luj{\'{a}}n and
Steve B. Furber},
title = {Navigating the Landscape for Real-time Localisation and Mapping for
Robotics and Virtual and Augmented Reality},
journal = {CoRR},
volume = {abs/1808.06352},
year = {2018},
url = {http://arxiv.org/abs/1808.06352},
eprinttype = {arXiv},
eprint = {1808.06352},
timestamp = {Fri, 11 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1808-06352.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/StanicPHRCUV17,
author = {Milan Stanic and
Oscar Palomar and
Timothy Hayes and
Ivan Ratkovic and
Adri{\'{a}}n Cristal and
Osman S. Unsal and
Mateo Valero},
title = {An Integrated Vector-Scalar Design on an In-Order {ARM} Core},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {14},
number = {2},
pages = {17:1--17:26},
year = {2017},
url = {https://doi.org/10.1145/3075618},
doi = {10.1145/3075618},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/StanicPHRCUV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/MawerPGNTL17,
author = {John Mawer and
Oscar Palomar and
Cosmin Gorgovan and
Andy Nisbet and
Will Toms and
Mikel Luj{\'{a}}n},
title = {The Potential of Dynamic Binary Modification and {CPU-FPGA} SoCs for
Simulation},
booktitle = {25th {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2017, Napa, CA, USA, April 30 - May 2,
2017},
pages = {144--151},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/FCCM.2017.36},
doi = {10.1109/FCCM.2017.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/MawerPGNTL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cse/Arcas-AbellaA0M16,
author = {Oriol Arcas{-}Abella and
Adri{\`{a}} Armejach and
Timothy Hayes and
Gorker Alp Malazgirt and
Oscar Palomar and
Behzad Salami and
Nehir S{\"{o}}nmez},
title = {Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs,
and Memory},
journal = {Comput. Sci. Eng.},
volume = {18},
number = {1},
pages = {80--87},
year = {2016},
url = {https://doi.org/10.1109/MCSE.2016.16},
doi = {10.1109/MCSE.2016.16},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cse/Arcas-AbellaA0M16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/GilPUC16,
author = {J. Rub{\'{e}}n Titos Gil and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {Architectural support for efficient message passing on shared memory
multi-cores},
journal = {J. Parallel Distributed Comput.},
volume = {95},
pages = {92--106},
year = {2016},
url = {https://doi.org/10.1016/j.jpdc.2016.02.005},
doi = {10.1016/J.JPDC.2016.02.005},
timestamp = {Sat, 22 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/GilPUC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/StanicP0RUCV16,
author = {Milan Stanic and
Oscar Palomar and
Timothy Hayes and
Ivan Ratkovic and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
editor = {Ayal Zaks and
Bilha Mendelson and
Lawrence Rauchwerger and
Wen{-}mei W. Hwu},
title = {{POSTER:} An Integrated Vector-Scalar Design on an In-order {ARM}
Core},
booktitle = {Proceedings of the 2016 International Conference on Parallel Architectures
and Compilation, {PACT} 2016, Haifa, Israel, September 11-15, 2016},
pages = {447--448},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2967938.2974057},
doi = {10.1145/2967938.2974057},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/StanicP0RUCV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cd/StanicP0RUC16,
author = {Milan Stanic and
Oscar Palomar and
Timothy Hayes and
Ivan Ratkovic and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
editor = {Gianluca Palermo and
John Feo},
title = {Towards low-power embedded vector processor},
booktitle = {Proceedings of the {ACM} International Conference on Computing Frontiers,
CF'16, Como, Italy, May 16-19, 2016},
pages = {339--342},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2903150.2903485},
doi = {10.1145/2903150.2903485},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cd/StanicP0RUC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PalomarRYGPTUCF16,
author = {Oscar Palomar and
Santhosh Kumar Rethinagiri and
Gulay Yalcin and
J. Rub{\'{e}}n Titos Gil and
Pablo Prieto and
Emma Torrella and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Pascal Felber and
Anita Sobe and
Yaroslav Hayduk and
Mascha Kurpicz and
Christof Fetzer and
Thomas Knauth and
Malte Schneega{\ss} and
Jens Struckmeier and
Dragomir Milojevic},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {Energy minimization at all layers of the data center: The ParaDIME
project},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {684--689},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459396/},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/PalomarRYGPTUCF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/0001PUCV16,
author = {Timothy Hayes and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {Future Vector Microprocessor Extensions for Data Aggregations},
booktitle = {43rd {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2016, Seoul, South Korea, June 18-22, 2016},
pages = {418--430},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISCA.2016.44},
doi = {10.1109/ISCA.2016.44},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/0001PUCV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/RatkovicPSUCV16,
author = {Ivan Ratkovic and
Oscar Palomar and
Milan Stanic and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {A Fully Parameterizable Low Power Design of Vector Fused Multiply-Add
Using Active Clock-Gating Techniques},
booktitle = {Proceedings of the 2016 International Symposium on Low Power Electronics
and Design, {ISLPED} 2016, San Francisco Airport, CA, USA, August
08 - 10, 2016},
pages = {362--367},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2934583.2934587},
doi = {10.1145/2934583.2934587},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/islped/RatkovicPSUCV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pdp/YalcinRPUCM16,
author = {Gulay Yalcin and
Santhosh Kumar Rethinagiri and
Oscar Palomar and
Osman S. {\"{U}}nsal and
Adri{\'{a}}n Cristal and
Dragomir Milojevic},
title = {Exploring Energy Reduction in Future Technology Nodes via Voltage
Scaling with Application to 10nm},
booktitle = {24th Euromicro International Conference on Parallel, Distributed,
and Network-Based Processing, {PDP} 2016, Heraklion, Crete, Greece,
February 17-19, 2016},
pages = {184--191},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/PDP.2016.108},
doi = {10.1109/PDP.2016.108},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/pdp/YalcinRPUCM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/RethinagiriPSYK15,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Anita Sobe and
Gulay Yalcin and
Thomas Knauth and
J. Rub{\'{e}}n Titos Gil and
Pablo Prieto and
Malte Schneega{\ss} and
Adri{\'{a}}n Cristal and
Osman S. Unsal and
Pascal Felber and
Christof Fetzer and
Dragomir Milojevic},
title = {ParaDIME: Parallel Distributed Infrastructure for Minimization of
Energy for data centers},
journal = {Microprocess. Microsystems},
volume = {39},
number = {8},
pages = {1174--1189},
year = {2015},
url = {https://doi.org/10.1016/j.micpro.2015.06.005},
doi = {10.1016/J.MICPRO.2015.06.005},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/RethinagiriPSYK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bmei/HussainPCAH15,
author = {Tassadaq Hussain and
Oscar Palomar and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Amna Haider},
editor = {Li Bai and
Lipo Wang and
Liangshan Shao and
Jinguang Sun and
Zhiyong Tao and
Sen Lin},
title = {ViPS: Visual processing system for medical imaging},
booktitle = {8th International Conference on Biomedical Engineering and Informatics,
{BMEI} 2015, Shenyang, China, October 14-16, 2015},
pages = {40--45},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/BMEI.2015.7401470},
doi = {10.1109/BMEI.2015.7401470},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/bmei/HussainPCAH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/coolchips/RethinagiriPMUC15,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Javier Arias Moreno and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {An energy efficient hybrid {FPGA-GPU} based embedded platform to accelerate
face recognition application},
booktitle = {2015 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS}
XVIII, Yokohama, Japan, April 13-15, 2015},
pages = {1--3},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/CoolChips.2015.7158532},
doi = {10.1109/COOLCHIPS.2015.7158532},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/coolchips/RethinagiriPMUC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/europar/CasasMACC0JPUCA15,
author = {Marc Casas and
Miquel Moret{\'{o}} and
Lluc Alvarez and
Emilio Castillo and
Dimitrios Chasapis and
Timothy Hayes and
Luc Jaulmes and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Jes{\'{u}}s Labarta and
Mateo Valero},
editor = {Jesper Larsson Tr{\"{a}}ff and
Sascha Hunold and
Francesco Versaci},
title = {Runtime-Aware Architectures},
booktitle = {Euro-Par 2015: Parallel Processing - 21st International Conference
on Parallel and Distributed Computing, Vienna, Austria, August 24-28,
2015, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {9233},
pages = {16--27},
publisher = {Springer},
year = {2015},
url = {https://doi.org/10.1007/978-3-662-48096-0\_2},
doi = {10.1007/978-3-662-48096-0\_2},
timestamp = {Sun, 12 Nov 2023 02:07:45 +0100},
biburl = {https://dblp.org/rec/conf/europar/CasasMACC0JPUCA15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/RethinagiriPMUC15,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Javier Arias Moreno and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {Heterogeneous Platform to Accelerate Compute Intensive Applications},
booktitle = {23rd {IEEE} Annual International Symposium on Field-Programmable Custom
Computing Machines, {FCCM} 2015, Vancouver, BC, Canada, May 2-6, 2015},
pages = {31},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/FCCM.2015.62},
doi = {10.1109/FCCM.2015.62},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/RethinagiriPMUC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/RethinagiriPMUC15,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Javier Arias Moreno and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {Trigeneous Platforms for Energy Efficient Computing of {HPC} Applications},
booktitle = {22nd {IEEE} International Conference on High Performance Computing,
HiPC 2015, Bengaluru, India, December 16-19, 2015},
pages = {264--274},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HiPC.2015.19},
doi = {10.1109/HIPC.2015.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipc/RethinagiriPMUC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HayesPUCV15,
author = {Timothy Hayes and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {{VSR} sort: {A} novel vectorised sorting algorithm {\&} architecture
extensions for future microprocessors},
booktitle = {21st {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2015, Burlingame, CA, USA, February 7-11, 2015},
pages = {26--38},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/HPCA.2015.7056019},
doi = {10.1109/HPCA.2015.7056019},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/HayesPUCV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RethinagiriPMUC15,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Javier Arias Moreno and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {{VPM:} Virtual power meter tool for low-power many-core/heterogeneous
data center prototypes},
booktitle = {33rd {IEEE} International Conference on Computer Design, {ICCD} 2015,
New York City, NY, USA, October 18-21, 2015},
pages = {651--658},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICCD.2015.7357177},
doi = {10.1109/ICCD.2015.7357177},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RethinagiriPMUC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icpp/GilPUC15,
author = {J. Rub{\'{e}}n Titos Gil and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {DiMP: Architectural Support for Direct Message Passing on Shared Memory
Multi-cores},
booktitle = {44th International Conference on Parallel Processing, {ICPP} 2015,
Beijing, China, September 1-4, 2015},
pages = {130--139},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ICPP.2015.22},
doi = {10.1109/ICPP.2015.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icpp/GilPUC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/RatkovicPSDPUCV15,
author = {Ivan Ratkovic and
Oscar Palomar and
Milan Stanic and
Milovan Duric and
Djordje Peic and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {Joint Circuit-System Design Space Exploration of Multiplier Unit Structure
for Energy-Efficient Vector Processors},
booktitle = {2015 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2015,
Montpellier, France, July 8-10, 2015},
pages = {19--26},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ISVLSI.2015.23},
doi = {10.1109/ISVLSI.2015.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/RatkovicPSDPUCV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/DuricSRPUCVS15,
author = {Milovan Duric and
Milan Stanic and
Ivan Ratkovic and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero and
Aaron Smith},
editor = {Dimitrios Soudris and
Luigi Carro},
title = {Imposing coarse-grained reconfiguration to general purpose processors},
booktitle = {2015 International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2015, Samos, Greece, July 19-23,
2015},
pages = {42--51},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/SAMOS.2015.7363658},
doi = {10.1109/SAMOS.2015.7363658},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/samos/DuricSRPUCVS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/RethinagiriPMCU15,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Javier Arias Moreno and
Adri{\'{a}}n Cristal and
Osman S. Unsal},
title = {FAcET: Fast and accurate power/energy estimation tool for {CPU-GPU}
platforms at architectural-level},
booktitle = {28th {IEEE} International System-on-Chip Conference, {SOCC} 2015,
Beijing, China, September 8-11, 2015},
pages = {209--214},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/SOCC.2015.7406947},
doi = {10.1109/SOCC.2015.7406947},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/RethinagiriPMCU15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/arc/HussainPUCAVH14,
author = {Tassadaq Hussain and
Oscar Palomar and
Osman S. {\"{U}}nsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Mateo Valero and
Amna Haider},
editor = {Diana Goehringer and
Marco Domenico Santambrogio and
Jo{\~{a}}o M. P. Cardoso and
Koen Bertels},
title = {Stand-Alone Memory Controller for Graphics System},
booktitle = {Reconfigurable Computing: Architectures, Tools, and Applications -
10th International Symposium, {ARC} 2014, Vilamoura, Portugal, April
14-16, 2014. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {8405},
pages = {108--120},
publisher = {Springer},
year = {2014},
url = {https://doi.org/10.1007/978-3-319-05960-0\_10},
doi = {10.1007/978-3-319-05960-0\_10},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/arc/HussainPUCAVH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HussainPUCAV14,
author = {Tassadaq Hussain and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {{PVMC:} Programmable Vector Memory Controller},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {240--247},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868668},
doi = {10.1109/ASAP.2014.6868668},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HussainPUCAV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/StanicPRDUC14,
author = {Milan Stanic and
Oscar Palomar and
Ivan Ratkovic and
Milovan Duric and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
editor = {Pedro Trancoso and
Diana Franklin and
Sally A. McKee},
title = {VALib and SimpleVector: tools for rapid initial research on vector
architectures},
booktitle = {Computing Frontiers Conference, CF'14, Cagliari, Italy - May 20 -
22, 2014},
pages = {7:1--7:10},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2597917.2597919},
doi = {10.1145/2597917.2597919},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/StanicPRDUC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/DuricPSUCVB14,
author = {Milovan Duric and
Oscar Palomar and
Aaron Smith and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero and
Doug Burger},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {{EVX:} Vector execution on low power {EDGE} cores},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--4},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.035},
doi = {10.7873/DATE.2014.035},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/DuricPSUCVB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/RethinagiriPSKBYHCUFFRA14,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Anita Sobe and
Thomas Knauth and
Wojciech M. Barczynski and
Gulay Yalcin and
Yarco Hayduk and
Adri{\'{a}}n Cristal and
Osman S. Unsal and
Pascal Felber and
Christof Fetzer and
Julien Ryckaert and
Gina Alioto},
title = {ParaDIME: Parallel Distributed Infrastructure for Minimization of
Energy},
booktitle = {17th Euromicro Conference on Digital System Design, {DSD} 2014, Verona,
Italy, August 27-29, 2014},
pages = {191--198},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/DSD.2014.27},
doi = {10.1109/DSD.2014.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/RethinagiriPSKBYHCUFFRA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/estimedia/RethinagiriPMYUC14,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Javier Arias Moreno and
Gulay Yalcin and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {System-level power {\&} energy estimation methodology and optimization
techniques for {CPU-GPU} based mobile platforms},
booktitle = {12th {IEEE} Symposium on Embedded Systems for Real-time Multimedia,
ESTIMedia 2014, Greater Noida, India, October 16-17, 2014},
pages = {118--127},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ESTIMedia.2014.6962352},
doi = {10.1109/ESTIMEDIA.2014.6962352},
timestamp = {Thu, 17 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/estimedia/RethinagiriPMYUC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HussainPUCAVR14,
author = {Tassadaq Hussain and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Mateo Valero and
Santhosh Kumar Rethinagiri},
editor = {Vaughn Betz and
George A. Constantinides},
title = {{APMC:} advanced pattern based memory controller (abstract only)},
booktitle = {The 2014 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} '14, Monterey, CA, {USA} - February 26 - 28, 2014},
pages = {252},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2554688.2554732},
doi = {10.1145/2554688.2554732},
timestamp = {Tue, 06 Nov 2018 16:58:22 +0100},
biburl = {https://dblp.org/rec/conf/fpga/HussainPUCAVR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RethinagiriPCU14,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Adri{\'{a}}n Cristal and
Osman S. Unsal},
editor = {Vaughn Betz and
George A. Constantinides},
title = {Power estimation tool for system on programmable chip based platforms
(abstract only)},
booktitle = {The 2014 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, {FPGA} '14, Monterey, CA, {USA} - February 26 - 28, 2014},
pages = {256},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2554688.2554718},
doi = {10.1145/2554688.2554718},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpga/RethinagiriPCU14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HussainPUCAV14,
author = {Tassadaq Hussain and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {{MAPC:} Memory access pattern based controller},
booktitle = {24th International Conference on Field Programmable Logic and Applications,
{FPL} 2014, Munich, Germany, 2-4 September, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FPL.2014.6927397},
doi = {10.1109/FPL.2014.6927397},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HussainPUCAV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/HussainPUCAVG14,
author = {Tassadaq Hussain and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Mateo Valero and
Shakaib A. Gursal},
editor = {Jialin Chen and
Wenbo Yin and
Yuichiro Shibata and
Lingli Wang and
Hayden Kwok{-}Hay So and
Yuchun Ma},
title = {{AMMC:} Advanced Multi-Core Memory Controller},
booktitle = {2014 International Conference on Field-Programmable Technology, {FPT}
2014, Shanghai, China, December 10-12, 2014},
pages = {292--295},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/FPT.2014.7082802},
doi = {10.1109/FPT.2014.7082802},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/fpt/HussainPUCAVG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcs/StanicPRDUCV14,
author = {Milan Stanic and
Oscar Palomar and
Ivan Ratkovic and
Milovan Duric and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {Evaluation of vectorization potential of Graph500 on Intel's Xeon
Phi},
booktitle = {International Conference on High Performance Computing {\&} Simulation,
{HPCS} 2014, Bologna, Italy, 21-25 July, 2014},
pages = {47--54},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPCSim.2014.6903668},
doi = {10.1109/HPCSIM.2014.6903668},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/hpcs/StanicPRDUCV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpcs/HussainPUCAV14,
author = {Tassadaq Hussain and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {Advanced Pattern based Memory Controller for {FPGA} based {HPC} applications},
booktitle = {International Conference on High Performance Computing {\&} Simulation,
{HPCS} 2014, Bologna, Italy, 21-25 July, 2014},
pages = {287--294},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/HPCSim.2014.6903697},
doi = {10.1109/HPCSIM.2014.6903697},
timestamp = {Sun, 02 Jun 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpcs/HussainPUCAV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/RethinagiriPUCAN14,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Rabie Ben Atitallah and
Sma{\"{\i}}l Niar},
title = {{PETS:} Power and energy estimation tool at system-level},
booktitle = {Fifteenth International Symposium on Quality Electronic Design, {ISQED}
2014, Santa Clara, CA, USA, March 3-5, 2014},
pages = {535--542},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISQED.2014.6783373},
doi = {10.1109/ISQED.2014.6783373},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/RethinagiriPUCAN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/RatkovicPSUCV14,
author = {Ivan Ratkovic and
Oscar Palomar and
Milan Stanic and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {Physical vs. Physically-Aware Estimation Flow: Case Study of Design
Space Exploration of Adders},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa,
FL, USA, July 9-11, 2014},
pages = {118--123},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISVLSI.2014.14},
doi = {10.1109/ISVLSI.2014.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/RatkovicPSUCV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/RethinagiriPMUCB14,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Javier Arias Moreno and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Morteza Biglari{-}Abhari},
title = {System-Level Power and Energy Estimation Methodology for Open Multimedia
Applications Platforms},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2014, Tampa,
FL, USA, July 9-11, 2014},
pages = {442--449},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ISVLSI.2014.38},
doi = {10.1109/ISVLSI.2014.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/RethinagiriPMUCB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/RethinagiriPMUC14,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Javier Arias Moreno and
Osman S. Unsal and
Adri{\'{a}}n Cristal},
title = {{VPPET:} Virtual platform power and energy estimation tool for heterogeneous
MPSoC based {FPGA} platforms},
booktitle = {24th International Workshop on Power and Timing Modeling, Optimization
and Simulation, PATMOS), Palma de Mallorca, Spain, September 29 -
Oct. 1, 2014},
pages = {1--8},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/PATMOS.2014.6951910},
doi = {10.1109/PATMOS.2014.6951910},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/patmos/RethinagiriPMUC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rapido/RethinagiriPANUK14,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Rabie Ben Atitallah and
Sma{\"{\i}}l Niar and
Osman S. Unsal and
Adri{\'{a}}n Cristal Kestelman},
editor = {Daniel Gracia P{\'{e}}rez and
Morteza Biglari{-}Abhari and
Daniel Chillet and
Gianluca Palermo},
title = {System-level power estimation tool for embedded processor based platforms},
booktitle = {Proceedings of the 2014 Workshop on Rapid Simulation and Performance
Evaluation: Methods and Tools, {RAPIDO} '14, 22 January, 2014, Vienna,
Austria},
pages = {5:1--5:8},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2555486.2555491},
doi = {10.1145/2555486.2555491},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rapido/RethinagiriPANUK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/HussainSPUCAVG14,
author = {Tassadaq Hussain and
Nehir S{\"{o}}nmez and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Mateo Valero and
Shakaib A. Gursal},
title = {{PAMS:} Pattern Aware Memory System for embedded systems},
booktitle = {2014 International Conference on ReConFigurable Computing and FPGAs,
ReConFig14, Cancun, Mexico, December 8-10, 2014},
pages = {1--7},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ReConFig.2014.7032544},
doi = {10.1109/RECONFIG.2014.7032544},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/HussainSPUCAVG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/DuricPSSUCVBV14,
author = {Milovan Duric and
Oscar Palomar and
Aaron Smith and
Milan Stanic and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero and
Doug Burger and
Alexander V. Veidenbaum},
title = {Dynamic-vector execution on a general purpose {EDGE} chip multiprocessor},
booktitle = {XIVth International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos,
Greece, July 14-17, 2014},
pages = {18--25},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SAMOS.2014.6893190},
doi = {10.1109/SAMOS.2014.6893190},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/samos/DuricPSSUCVBV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/RethinagiriPCUS14,
author = {Santhosh Kumar Rethinagiri and
Oscar Palomar and
Adri{\'{a}}n Cristal and
Osman S. Unsal and
Michael M. Swift},
editor = {Kaijian Shi and
Thomas B{\"{u}}chner and
Danella Zhao and
Ramalingam Sridhar},
title = {{DESSERT:} DESign Space ExploRation Tool based on power and energy
at System-Level},
booktitle = {27th {IEEE} International System-on-Chip Conference, {SOCC} 2014,
Las Vegas, NV, USA, September 2-5, 2014},
pages = {48--53},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SOCC.2014.6948898},
doi = {10.1109/SOCC.2014.6948898},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/RethinagiriPCUS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/RatkovicPSUCV13,
author = {Ivan Ratkovic and
Oscar Palomar and
Milan Stanic and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {On the selection of adder unit in energy efficient vector processing},
booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013,
Santa Clara, CA, USA, March 4-6, 2013},
pages = {143--150},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISQED.2013.6523602},
doi = {10.1109/ISQED.2013.6523602},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/RatkovicPSUCV13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/reconfig/DuricPS13,
author = {Milovan Duric and
Oscar Palomar and
Aaron Smith},
title = {ReCompAc: Reconfigurable compute accelerator},
booktitle = {2012 International Conference on Reconfigurable Computing and FPGAs,
ReConFig 2013, Cancun, Mexico, December 9-11, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ReConFig.2013.6732326},
doi = {10.1109/RECONFIG.2013.6732326},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/reconfig/DuricPS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/HayesPUCV12,
author = {Timothy Hayes and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Mateo Valero},
title = {Vector Extensions for Decision Support {DBMS} Acceleration},
booktitle = {45th Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2012, Vancouver, BC, Canada, December 1-5, 2012},
pages = {166--176},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/MICRO.2012.24},
doi = {10.1109/MICRO.2012.24},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/HayesPUCV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/es/Perez11,
author = {Oscar Palomar},
title = {Reusing cached schedules in an out-of-order processor with in-order
issue logic},
school = {Polytechnic University of Catalonia, Spain},
year = {2011},
url = {http://hdl.handle.net/10803/80536},
timestamp = {Fri, 11 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/es/Perez11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/PalomarJN09,
author = {Oscar Palomar and
Toni Juan and
Juan J. Navarro},
title = {Reusing cached schedules in an out-of-order processor with in-order
issue logic},
booktitle = {27th International Conference on Computer Design, {ICCD} 2009, Lake
Tahoe, CA, USA, October 4-7, 2009},
pages = {246--253},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ICCD.2009.5413146},
doi = {10.1109/ICCD.2009.5413146},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/PalomarJN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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