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BibTeX records: Nobuaki Otsuka
@article{DBLP:journals/ieicet/AgawaIMKKNASMUTIHFKYO10, author = {Kenichi Agawa and Shin{-}ichiro Ishizuka and Hideaki Majima and Hiroyuki Kobayashi and Masayuki Koizumi and Takeshi Nagano and Makoto Arai and Yutaka Shimizu and Asuka Maki and Go Urakawa and Tadashi Terada and Nobuyuki Itoh and Mototsugu Hamada and Fumie Fujii and Tadamasa Kato and Sadayuki Yoshitomi and Nobuaki Otsuka}, title = {A 0.13 {\(\mathrm{\mu}\)}m {CMOS} Bluetooth {EDR} Transceiver with High Sensitivity over Wide Temperature Range and Immunity to Process Variation}, journal = {{IEICE} Trans. Electron.}, volume = {93-C}, number = {6}, pages = {803--811}, year = {2010}, url = {https://doi.org/10.1587/transele.E93.C.803}, doi = {10.1587/TRANSELE.E93.C.803}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/AgawaIMKKNASMUTIHFKYO10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/KakuINWSTIMITHMO08, author = {Mariko Kaku and Hitoshi Iwai and Takeshi Nagai and Masaharu Wada and Atsushi Suzuki and Tomohisa Takai and Naoko Itoga and Takayuki Miyazaki and Takayuki Iwai and Hiroyuki Takenaka and Takehiko Hojo and Shinji Miyano and Nobuaki Otsuka}, title = {An 833MHz Pseudo-Two-Port Embedded {DRAM} for Graphics Applications}, booktitle = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008}, pages = {276--277}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ISSCC.2008.4523164}, doi = {10.1109/ISSCC.2008.4523164}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/KakuINWSTIMITHMO08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/KawasumiYTHKTSKFFO08, author = {Atsushi Kawasumi and Tomoaki Yabe and Yasuhisa Takeyama and Osamu Hirabayashi and Keiichi Kushida and Akihito Tohata and Takahiko Sasaki and Akira Katayama and Gou Fukano and Yuki Fujimura and Nobuaki Otsuka}, title = {A Single-Power-Supply 0.7V 1GHz 45nm {SRAM} with An Asymmetrical Unit-{\texttimes}-ratio Memory Cell}, booktitle = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008}, pages = {382--383}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ISSCC.2008.4523217}, doi = {10.1109/ISSCC.2008.4523217}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isscc/KawasumiYTHKTSKFFO08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/IkehashiMYSOMSOMSOST08, author = {Tamio Ikehashi and Takayuki Miyazaki and Hiroaki Yamazaki and Atsushi Suzuki and Etsuji Ogawa and Shinji Miyano and Tomohiro Saito and Tatsuya Ohguro and Takeshi Miyagi and Yoshiaki Sugizaki and Nobuaki Otsuka and Hideki Shibata and Yoshiaki Toyoshima}, title = {An {RF} {MEMS} Variable Capacitor with Intelligent Bipolar Actuation}, booktitle = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008}, pages = {582--583}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ISSCC.2008.4523317}, doi = {10.1109/ISSCC.2008.4523317}, timestamp = {Wed, 17 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isscc/IkehashiMYSOMSOMSOST08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/KatayamaYHTKSO08, author = {Akira Katayama and Tomoaki Yabe and Osamu Hirabayashi and Yasuhisa Takeyama and Keiichi Kushida and Takahiko Sasaki and Nobuaki Otsuka}, editor = {Douglas Young and Nur A. Touba}, title = {Direct Cell-Stability Test Techniques for an {SRAM} Macro with Asymmetric Cell-Bias-Voltage Modulation}, booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara, California, USA, October 26-31, 2008}, pages = {1--7}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/TEST.2008.4700616}, doi = {10.1109/TEST.2008.4700616}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/KatayamaYHTKSO08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cicc/AgawaMKKINASUIHO07, author = {Kenichi Agawa and Hideaki Majima and Hiroyuki Kobayashi and Masayuki Koizumi and Shin{-}ichiro Ishizuka and Takeshi Nagano and Makoto Arai and Yutaka Shimizu and Go Urakawa and Nobuyuki Itoh and Mototsugu Hamada and Nobuaki Otsuka}, title = {A -90 dBm sensitivity 0.13 {\(\mu\)}m {CMOS} bluetooth transceiver operating in wide temperature range}, booktitle = {Proceedings of the {IEEE} 2007 Custom Integrated Circuits Conference, {CICC} 2007, DoubleTree Hotel, San Jose, California, USA, September 16-19, 2007}, pages = {655--658}, publisher = {{IEEE}}, year = {2007}, url = {https://doi.org/10.1109/CICC.2007.4405817}, doi = {10.1109/CICC.2007.4405817}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/cicc/AgawaMKKINASUIHO07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/TakeyamaOHKO06, author = {Yasuhisa Takeyama and Hiroyuki Otake and Osamu Hirabayashi and Keiichi Kushida and Nobuaki Otsuka}, title = {A low leakage {SRAM} macro with replica cell biasing scheme}, journal = {{IEEE} J. Solid State Circuits}, volume = {41}, number = {4}, pages = {815--822}, year = {2006}, url = {https://doi.org/10.1109/JSSC.2006.870763}, doi = {10.1109/JSSC.2006.870763}, timestamp = {Fri, 15 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/TakeyamaOHKO06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtdt/KushidaOHT05, author = {Keiichi Kushida and Nobuaki Otsuka and Osamu Hirabayashi and Yasuhisa Takeyama}, title = {{DFT} techniques for memory macro with built-in {ECC}}, booktitle = {13th {IEEE} International Workshop on Memory Technology, Design, and Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan}, pages = {109--114}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/MTDT.2005.19}, doi = {10.1109/MTDT.2005.19}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtdt/KushidaOHT05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/itc/HirabayashiSYKTKTO02, author = {Osamu Hirabayashi and Azuma Suzuki and Tomoaki Yabe and Atsushi Kawasumi and Yasuhisa Takeyama and Keiichi Kushida and Akihito Tohata and Nobuaki Otsuka}, title = {{DFT} Techniques for Wafer-Level At-Speed Testing of High-Speed SRAMs}, booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002}, pages = {164--169}, publisher = {{IEEE} Computer Society}, year = {2002}, url = {https://doi.org/10.1109/TEST.2002.1041757}, doi = {10.1109/TEST.2002.1041757}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/itc/HirabayashiSYKTKTO02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/OtsukaH97, author = {Nobuaki Otsuka and Mark A. Horowitz}, title = {Circuit techniques for 1.5-V power supply flash memory}, journal = {{IEEE} J. Solid State Circuits}, volume = {32}, number = {8}, pages = {1217--1230}, year = {1997}, url = {https://doi.org/10.1109/4.604078}, doi = {10.1109/4.604078}, timestamp = {Thu, 07 Jul 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/OtsukaH97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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