BibTeX records: Tim Niggemeier

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@article{DBLP:journals/vlsisp/BerekovicBN08,
  author       = {Mladen Berekovic and
                  Tim Niggemeier},
  title        = {A Distributed, Simultaneously Multi-Threaded {(SMT)} Processor with
                  Clustered Scheduling Windows for Scalable {DSP} Performance},
  journal      = {J. Signal Process. Syst.},
  volume       = {50},
  number       = {2},
  pages        = {201--229},
  year         = {2008},
  url          = {https://doi.org/10.1007/s11265-007-0138-6},
  doi          = {10.1007/S11265-007-0138-6},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/BerekovicBN08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/samos/BerekovicN06,
  author       = {Mladen Berekovic and
                  Tim Niggemeier},
  editor       = {Stamatis Vassiliadis and
                  Stephan Wong and
                  Timo H{\"{a}}m{\"{a}}l{\"{a}}inen},
  title        = {A Scalable, Multi-thread, Multi-issue Array Processor Architecture
                  for {DSP} Applications Based on Extended Tomasulo Scheme},
  booktitle    = {Embedded Computer Systems: Architectures, Modeling, and Simulation,
                  6th International Workshop, {SAMOS} 2006, Samos, Greece, July 17-20,
                  2006, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {4017},
  pages        = {289--298},
  publisher    = {Springer},
  year         = {2006},
  url          = {https://doi.org/10.1007/11796435\_30},
  doi          = {10.1007/11796435\_30},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/BerekovicN06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/samos/WittenburgSG0N04,
  author       = {Jens Peter Wittenburg and
                  Ulrich Schreiber and
                  Ulrich Gries and
                  Markus Schneider and
                  Tim Niggemeier},
  editor       = {Andy D. Pimentel and
                  Stamatis Vassiliadis},
  title        = {A Cost-Efficient {RISC} Processor Platform for Real Time Audio Applications},
  booktitle    = {Computer Systems: Architectures, Modeling, and Simulation, Third and
                  Fourth International Workshops, {SAMOS} 2003 and {SAMOS} 2004, Samos,
                  Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {3133},
  pages        = {39--48},
  publisher    = {Springer},
  year         = {2004},
  url          = {https://doi.org/10.1007/978-3-540-27776-7\_5},
  doi          = {10.1007/978-3-540-27776-7\_5},
  timestamp    = {Tue, 14 May 2019 10:00:45 +0200},
  biburl       = {https://dblp.org/rec/conf/samos/WittenburgSG0N04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}