BibTeX records: Bich-Yen Nguyen

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@inproceedings{DBLP:conf/vlsit/ZhouJKZHCSNG23,
  author       = {Zuopu Zhou and
                  Leming Jiao and
                  Qiwen Kong and
                  Zijie Zheng and
                  Kaizhen Han and
                  Yue Chen and
                  Chen Sun and
                  Bich{-}Yen Nguyen and
                  Xiao Gong},
  title        = {Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with
                  {BEOL} 3D Monolithically Integrated {IGZO} Access Transistor for 4F\({}^{\mbox{2}}\)
                  High-Density Integration},
  booktitle    = {2023 {IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits), Kyoto, Japan, June 11-16, 2023},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185243},
  doi          = {10.23919/VLSITECHNOLOGYANDCIR57934.2023.10185243},
  timestamp    = {Tue, 19 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsit/ZhouJKZHCSNG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icicdt/BesnardNM22,
  author       = {Guillaume Besnard and
                  Bich{-}Yen Nguyen and
                  Christophe Maleville},
  title        = {Smart Cut\({}^{\mbox{{\texttrademark}}}\) technology: from Substrate
                  Enginnering to Advanced 3D Integration},
  booktitle    = {International Conference on {IC} Design and Technology, {ICICDT} 2022,
                  Hanoi, Vietnam, September 21-23, 2022},
  pages        = {81--83},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ICICDT56182.2022.9933105},
  doi          = {10.1109/ICICDT56182.2022.9933105},
  timestamp    = {Wed, 16 Nov 2022 21:55:12 +0100},
  biburl       = {https://dblp.org/rec/conf/icicdt/BesnardNM22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsit/VandoorenPFLARS22,
  author       = {A. Vandooren and
                  N. Parihar and
                  Jacopo Franco and
                  Roger Loo and
                  Hiroaki Arimura and
                  R. Rodriguez and
                  F. Sebaai and
                  S. Iacovo and
                  Kevin Vandersmissen and
                  W. Li and
                  G. Mannaert and
                  D. Radisic and
                  E. Rosseel and
                  Andriy Hikavyy and
                  Anne Jourdain and
                  O. Mourey and
                  G. Gaudin and
                  S. Reboh and
                  L. Le Van{-}Jodin and
                  Guillaume Besnard and
                  C. Roda Neve and
                  Bich{-}Yen Nguyen and
                  Iuliana P. Radu and
                  E. Dentoni Litta and
                  N. Horiguchi},
  title        = {Demonstration of 3D sequential {FD-SOI} on {CMOS} FinFET stacking
                  featuring low temperature Si layer transfer and top tier device fabrication
                  with tier interconnections},
  booktitle    = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
  pages        = {330--331},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830400},
  doi          = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830400},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/VandoorenPFLARS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/essderc/SchwarzenbachLJ19,
  author       = {Walter Schwarzenbach and
                  L. Loubriat and
                  Vincent Joseph and
                  Laurent Viravaux and
                  Olivier Moreau and
                  Sebastien Lasserre and
                  Bich{-}Yen Nguyen},
  title        = {22FD-SOI Variability Improvement Thanks to SmartCut Thickness Control
                  at Atomic Scale},
  booktitle    = {49th European Solid-State Device Research Conference, {ESSDERC} 2019,
                  Cracow, Poland, September 23-26, 2019},
  pages        = {64--65},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ESSDERC.2019.8901827},
  doi          = {10.1109/ESSDERC.2019.8901827},
  timestamp    = {Wed, 03 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/essderc/SchwarzenbachLJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icicdt/SchwarzenbachNB19,
  author       = {Walter Schwarzenbach and
                  Bich{-}Yen Nguyen and
                  Guillaume Besnard},
  title        = {Low Temperature SmartCutTM enables High Density 3D SoC Applications},
  booktitle    = {International Conference on {IC} Design and Technology, {ICICDT} 2019,
                  Suzhou, China, June 17-19, 2019},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ICICDT.2019.8790947},
  doi          = {10.1109/ICICDT.2019.8790947},
  timestamp    = {Wed, 16 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icicdt/SchwarzenbachNB19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/irps/QuCLLNFXCZ18,
  author       = {Yiming Qu and
                  Ran Cheng and
                  Wei Liu and
                  Junkang Li and
                  Bich{-}Yen Nguyen and
                  Olivier Faynot and
                  Nuo Xu and
                  Bing Chen and
                  Yi Zhao},
  title        = {Effect of measurement speed ({\(\mu\)}s-800 ps) on the characterization
                  of reliability behaviors for {FDSOI} nMOSFETs},
  booktitle    = {{IEEE} International Reliability Physics Symposium, {IRPS} 2018, Burlingame,
                  CA, USA, March 11-15, 2018},
  pages        = {6},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/IRPS.2018.8353644},
  doi          = {10.1109/IRPS.2018.8353644},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/irps/QuCLLNFXCZ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icicdt/KoJSN17,
  author       = {Eunah Ko and
                  Jaesung Jo and
                  Changhwan Shin and
                  Bich{-}Yen Nguyen},
  title        = {Layout engineering to suppress hysteresis of negative capacitance
                  FinFET},
  booktitle    = {2017 {IEEE} International Conference on {IC} Design and Technology,
                  {ICICDT} 2017, Austin, TX, USA, May 23-25, 2017},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ICICDT.2017.7993498},
  doi          = {10.1109/ICICDT.2017.7993498},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icicdt/KoJSN17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icicdt/SchwarzenbachSN17,
  author       = {Walter Schwarzenbach and
                  Manuel Sellier and
                  Bich{-}Yen Nguyen and
                  Christophe Girard and
                  Christophe Maleville},
  title        = {{FD-SOI} material enabling {CMOS} technology disruption from 65nm
                  to 12nm and beyond},
  booktitle    = {2017 {IEEE} International Conference on {IC} Design and Technology,
                  {ICICDT} 2017, Austin, TX, USA, May 23-25, 2017},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ICICDT.2017.7993499},
  doi          = {10.1109/ICICDT.2017.7993499},
  timestamp    = {Wed, 17 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icicdt/SchwarzenbachSN17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icicdt/RaduNGM15,
  author       = {Ionut Radu and
                  Bich{-}Yen Nguyen and
                  Gweltaz Gaudin and
                  Carlos Mazure},
  title        = {3D monolithic integration: Stacking technology and applications},
  booktitle    = {2015 International Conference on {IC} Design {\&} Technology,
                  {ICICDT} 2015, Leuven, Belgium, June 1-3, 2015},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ICICDT.2015.7165915},
  doi          = {10.1109/ICICDT.2015.7165915},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icicdt/RaduNGM15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icicdt/SchwarzenbachDK12,
  author       = {Walter Schwarzenbach and
                  N. Daval and
                  S. Kerdiles and
                  G. Chabanne and
                  C. Figuet and
                  S. Guerroudj and
                  O. Bonnin and
                  X. Cauchy and
                  Bich{-}Yen Nguyen and
                  Christophe Maleville},
  title        = {Strained silicon on insulator substrates for fully depleted application},
  booktitle    = {{IEEE} International Conference on {IC} Design {\&} Technology,
                  {ICICDT} 2012, Austin, TX, USA, May 30 - June 1, 2012},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ICICDT.2012.6232869},
  doi          = {10.1109/ICICDT.2012.6232869},
  timestamp    = {Wed, 03 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icicdt/SchwarzenbachDK12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/MazureFNSM10,
  author       = {Carlos Mazure and
                  Richard Ferrant and
                  Bich{-}Yen Nguyen and
                  Walter Schwarzenbach and
                  C{\'{e}}cile Moulin},
  title        = {{FDSOI:} From substrate to devices and circuit applications},
  booktitle    = {36th European Solid-State Circuits Conference, {ESSCIRC} 2010, Sevilla,
                  Spain, September 13-17, 2010},
  pages        = {45--51},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ESSCIRC.2010.5619767},
  doi          = {10.1109/ESSCIRC.2010.5619767},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/MazureFNSM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ThomasNFJDPBADBBNVA10,
  author       = {Olivier Thomas and
                  Jean{-}Philippe Noel and
                  Claire Fenouillet{-}B{\'{e}}ranger and
                  Marie{-}Anne Jaud and
                  J. Dura and
                  P. Perreau and
                  Fr{\'{e}}d{\'{e}}ric Boeuf and
                  Fran{\c{c}}ois Andrieu and
                  D. Delprat and
                  F. Boedt and
                  Konstantin Bourdelle and
                  Bich{-}Yen Nguyen and
                  Andrei Vladimirescu and
                  Amara Amara},
  title        = {32nm and beyond Multi-VT Ultra-Thin Body and {BOX} {FDSOI:} From device
                  to circuit},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
                  30 - June 2, 2010, Paris, France},
  pages        = {1703--1706},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISCAS.2010.5537517},
  doi          = {10.1109/ISCAS.2010.5537517},
  timestamp    = {Fri, 24 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/ThomasNFJDPBADBBNVA10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/NikolicSCSLN10,
  author       = {Borivoje Nikolic and
                  Changhwan Shin and
                  Min Hee Cho and
                  Xin Sun and
                  Tsu{-}Jae King Liu and
                  Bich{-}Yen Nguyen},
  title        = {{SRAM} design in fully-depleted {SOI} technology},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
                  30 - June 2, 2010, Paris, France},
  pages        = {1707--1710},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISCAS.2010.5537520},
  doi          = {10.1109/ISCAS.2010.5537520},
  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/NikolicSCSLN10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/Fenouillet-Beranger09,
  author       = {Claire Fenouillet{-}B{\'{e}}ranger and
                  P. Perreau and
                  S. Denorme and
                  L. Tosti and
                  Fran{\c{c}}ois Andrieu and
                  Olivier Weber and
                  S. Barnola and
                  C. Arvet and
                  Y. Campidelli and
                  S{\'{e}}bastien Haendler and
                  R. Beneyton and
                  C. Perrot and
                  C. de Buttet and
                  P. Gros and
                  L. Pham{-}Nguyen and
                  F. Leverd and
                  P. Gouraud and
                  F. Abbate and
                  F. Baron and
                  A. Torres and
                  C. Laviron and
                  L. Pinzelli and
                  J. Vetier and
                  C. Borowiak and
                  A. Margain and
                  D. Delprat and
                  F. Boedt and
                  Konstantin Bourdelle and
                  Bich{-}Yen Nguyen and
                  Olivier Faynot and
                  Thomas Skotnicki},
  title        = {Impact of a 10nm Ultra-Thin {BOX} {(UTBOX)} and Ground Plane on {FDSOI}
                  devices for 32nm node and below},
  booktitle    = {35th European Solid-State Circuits Conference, {ESSCIRC} 2009, Athens,
                  Greece, 14-18 September 2009},
  pages        = {88--91},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ESSCIRC.2009.5325994},
  doi          = {10.1109/ESSCIRC.2009.5325994},
  timestamp    = {Mon, 09 Aug 2021 14:54:02 +0200},
  biburl       = {https://dblp.org/rec/conf/esscirc/Fenouillet-Beranger09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/TrivediFMCZWN05,
  author       = {Vishal P. Trivedi and
                  Jerry G. Fossum and
                  Leo Mathew and
                  Murshed M. Chowdhury and
                  Weimin Zhang and
                  Glenn O. Workman and
                  Bich{-}Yen Nguyen},
  title        = {Physics-based compact modeling for nonclassical {CMOS}},
  booktitle    = {2005 International Conference on Computer-Aided Design, {ICCAD} 2005,
                  San Jose, CA, USA, November 6-10, 2005},
  pages        = {211--216},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/ICCAD.2005.1560066},
  doi          = {10.1109/ICCAD.2005.1560066},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/TrivediFMCZWN05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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