BibTeX records: Suriyaprakash Natarajan

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@article{DBLP:journals/tcad/KunduBRNB24,
  author       = {Shamik Kundu and
                  Suvadeep Banerjee and
                  Arnab Raha and
                  Suriyaprakash Natarajan and
                  Kanad Basu},
  title        = {DiagNNose: Toward Error Localization in Deep Learning Hardware-Based
                  on {VTA-TVM} Stack},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {43},
  number       = {1},
  pages        = {217--229},
  year         = {2024},
  url          = {https://doi.org/10.1109/TCAD.2023.3303851},
  doi          = {10.1109/TCAD.2023.3303851},
  timestamp    = {Sat, 13 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tcad/KunduBRNB24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/dt/KunduRBNB23,
  author       = {Shamik Kundu and
                  Arnab Raha and
                  Suvadeep Banerjee and
                  Suriyaprakash Natarajan and
                  Kanad Basu},
  title        = {Analysis and Mitigation of {DRAM} Faults in Sparse-DNN Accelerators},
  journal      = {{IEEE} Des. Test},
  volume       = {40},
  number       = {2},
  pages        = {90--99},
  year         = {2023},
  url          = {https://doi.org/10.1109/MDAT.2022.3183545},
  doi          = {10.1109/MDAT.2022.3183545},
  timestamp    = {Tue, 28 Mar 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dt/KunduRBNB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tc/KunduBRSNB23,
  author       = {Shamik Kundu and
                  Suvadeep Banerjee and
                  Arnab Raha and
                  Fei Su and
                  Suriyaprakash Natarajan and
                  Kanad Basu},
  title        = {Trouble-Shooting at {GAN} Point: Improving Functional Safety in Deep
                  Learning Accelerators},
  journal      = {{IEEE} Trans. Computers},
  volume       = {72},
  number       = {8},
  pages        = {2194--2208},
  year         = {2023},
  url          = {https://doi.org/10.1109/TC.2023.3241218},
  doi          = {10.1109/TC.2023.3241218},
  timestamp    = {Sat, 05 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tc/KunduBRSNB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/ArunachalamKRBNB23,
  author       = {Ayush Arunachalam and
                  Shamik Kundu and
                  Arnab Raha and
                  Suvadeep Banerjee and
                  Suriyaprakash Natarajan and
                  Kanad Basu},
  title        = {A Novel Low-Power Compression Scheme for Systolic Array-Based Deep
                  Learning Accelerators},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {42},
  number       = {4},
  pages        = {1085--1098},
  year         = {2023},
  url          = {https://doi.org/10.1109/TCAD.2022.3198036},
  doi          = {10.1109/TCAD.2022.3198036},
  timestamp    = {Sun, 16 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/ArunachalamKRBNB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/ArunachalamDRSJ23,
  author       = {Ayush Arunachalam and
                  Sanjay Das and
                  Monikka Rajan and
                  Fei Su and
                  Xiankun Jin and
                  Suvadeep Banerjee and
                  Arnab Raha and
                  Suriyaprakash Natarajan and
                  Kanad Basu},
  title        = {Enhanced ML-Based Approach for Functional Safety Improvement in Automotive
                  {AMS} Circuits},
  booktitle    = {{IEEE} International Test Conference, {ITC} 2023, Anaheim, CA, USA,
                  October 7-15, 2023},
  pages        = {266--275},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ITC51656.2023.00043},
  doi          = {10.1109/ITC51656.2023.00043},
  timestamp    = {Tue, 09 Jan 2024 17:03:11 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/ArunachalamDRSJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ats/AddepalliPANSV22,
  author       = {Hari Addepalli and
                  Irith Pomeranz and
                  M. Enamul Amyeen and
                  Suriyaprakash Natarajan and
                  Arani Sinha and
                  Srikanth Venkataraman},
  title        = {Using Fault Detection Tests to Produce Diagnostic Tests Targeting
                  Large Sets of Candidate Faults},
  booktitle    = {{IEEE} 31st Asian Test Symposium, {ATS} 2022, Taichung City, Taiwan,
                  November 21-24, 2022},
  pages        = {120--125},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ATS56056.2022.00033},
  doi          = {10.1109/ATS56056.2022.00033},
  timestamp    = {Wed, 11 Jan 2023 14:55:55 +0100},
  biburl       = {https://dblp.org/rec/conf/ats/AddepalliPANSV22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/ThiagarajanNM22,
  author       = {Shiva Shankar Thiagarajan and
                  Suriyaprakash Natarajan and
                  Yiorgos Makris},
  editor       = {Rob Oshana},
  title        = {A defect tolerance framework for improving yield},
  booktitle    = {{DAC} '22: 59th {ACM/IEEE} Design Automation Conference, San Francisco,
                  California, USA, July 10 - 14, 2022},
  pages        = {847--852},
  publisher    = {{ACM}},
  year         = {2022},
  url          = {https://doi.org/10.1145/3489517.3530534},
  doi          = {10.1145/3489517.3530534},
  timestamp    = {Thu, 25 Aug 2022 14:23:32 +0200},
  biburl       = {https://dblp.org/rec/conf/dac/ThiagarajanNM22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/NatarajanSOCB22,
  author       = {Suriyaprakash Natarajan and
                  Abhijit Sathaye and
                  Chaitali Oak and
                  Nipun Chaplot and
                  Suvadeep Banerjee},
  title        = {{DEFCON:} Defect Acceleration through Content Optimization},
  booktitle    = {{IEEE} International Test Conference, {ITC} 2022, Anaheim, CA, USA,
                  September 23-30, 2022},
  pages        = {298--304},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ITC50671.2022.00038},
  doi          = {10.1109/ITC50671.2022.00038},
  timestamp    = {Thu, 05 Jan 2023 13:13:27 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/NatarajanSOCB22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/KunduBRNB21,
  author       = {Shamik Kundu and
                  Suvadeep Banerjee and
                  Arnab Raha and
                  Suriyaprakash Natarajan and
                  Kanad Basu},
  title        = {Toward Functional Safety of Systolic Array-Based Deep Learning Hardware
                  Accelerators},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {29},
  number       = {3},
  pages        = {485--498},
  year         = {2021},
  url          = {https://doi.org/10.1109/TVLSI.2020.3048829},
  doi          = {10.1109/TVLSI.2020.3048829},
  timestamp    = {Tue, 23 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/KunduBRNB21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/ArunachalamKRBN21,
  author       = {Ayush Arunachalam and
                  Shamik Kundu and
                  Arnab Raha and
                  Suvadeep Banerjee and
                  Suriyaprakash Natarajan and
                  Kanad Basu},
  title        = {HardCompress: {A} Novel Hardware-based Low-power Compression Scheme
                  for {DNN} Accelerators},
  booktitle    = {22nd International Symposium on Quality Electronic Design, {ISQED}
                  2021, Santa Clara, CA, USA, April 7-9, 2021},
  pages        = {457--462},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ISQED51717.2021.9424301},
  doi          = {10.1109/ISQED51717.2021.9424301},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/ArunachalamKRBN21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/PandeyLNNSSC21,
  author       = {Sujay Pandey and
                  Zhiwei Liao and
                  Shreyas Nandi and
                  Suriyaprakash Natarajan and
                  Arani Sinha and
                  Adit D. Singh and
                  Abhijit Chatterjee},
  title        = {Two Pattern Timing Tests Capturing Defect-Induced Multi-Gate Delay
                  Impact of Shorts},
  booktitle    = {39th {IEEE} {VLSI} Test Symposium, {VTS} 2021, San Diego, CA, USA,
                  April 25-28, 2021},
  pages        = {1--7},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/VTS50974.2021.9441005},
  doi          = {10.1109/VTS50974.2021.9441005},
  timestamp    = {Wed, 09 Jun 2021 08:59:55 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/PandeyLNNSSC21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/PandeyLNGNSSC20,
  author       = {Sujay Pandey and
                  Zhiwei Liao and
                  Shreyas Nandi and
                  Sanya Gupta and
                  Suriyaprakash Natarajan and
                  Arani Sinha and
                  Adit D. Singh and
                  Abhijit Chatterjee},
  title        = {{SAT-ATPG} Generated Multi-Pattern Scan Tests for Cell Internal Defects:
                  Coverage Analysis for Resistive Opens and Shorts},
  booktitle    = {{IEEE} International Test Conference, {ITC} 2020, Washington, DC,
                  USA, November 1-6, 2020},
  pages        = {1--10},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ITC44778.2020.9325240},
  doi          = {10.1109/ITC44778.2020.9325240},
  timestamp    = {Mon, 25 Jan 2021 08:44:58 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/PandeyLNGNSSC20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/RamanLMNY20,
  author       = {Srikanth Venkataraman and
                  Pongpachara Limpisathian and
                  Pascal Meinerzhagen and
                  Suriyaprakash Natarajan and
                  Eric Yang},
  title        = {Automating Design For Yield: Silicon Learning to Predictive Models
                  and Design Optimization},
  booktitle    = {{IEEE} International Test Conference, {ITC} 2020, Washington, DC,
                  USA, November 1-6, 2020},
  pages        = {1--10},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ITC44778.2020.9325263},
  doi          = {10.1109/ITC44778.2020.9325263},
  timestamp    = {Mon, 13 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/itc/RamanLMNY20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/NatarajanMM20,
  author       = {Suriyaprakash Natarajan and
                  Andres F. Malavasi and
                  Pascal Andreas Meinerzhagen},
  title        = {Automated Design For Yield Through Defect Tolerance},
  booktitle    = {38th {IEEE} {VLSI} Test Symposium, {VTS} 2020, San Diego, CA, USA,
                  April 5-8, 2020},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/VTS48691.2020.9107558},
  doi          = {10.1109/VTS48691.2020.9107558},
  timestamp    = {Thu, 25 Jun 2020 15:32:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/NatarajanMM20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/PandeyGLNSC19,
  author       = {Sujay Pandey and
                  Sanya Gupta and
                  Madhu Sudhan L. and
                  Suriya Natarajan and
                  Arani Sinha and
                  Abhijit Chatterjee},
  title        = {Characterization of Library Cells for Open-circuit Defect Exposure:
                  {A} Systematic Methodology},
  booktitle    = {{IEEE} International Test Conference, {ITC} 2019, Washington, DC,
                  USA, November 9-15, 2019},
  pages        = {1--10},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ITC44170.2019.9000154},
  doi          = {10.1109/ITC44170.2019.9000154},
  timestamp    = {Mon, 24 Feb 2020 17:28:46 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/PandeyGLNSC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/integration/AhmadyanNV17,
  author       = {Seyed Nematollah Ahmadyan and
                  Suriyaprakash Natarajan and
                  Shobha Vasudevan},
  title        = {A novel test compression algorithm for analog circuits to decrease
                  production costs},
  journal      = {Integr.},
  volume       = {58},
  pages        = {538--548},
  year         = {2017},
  url          = {https://doi.org/10.1016/j.vlsi.2016.10.010},
  doi          = {10.1016/J.VLSI.2016.10.010},
  timestamp    = {Thu, 20 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/AhmadyanNV17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/NatarajanS17,
  author       = {Suriya Natarajan and
                  Abhijit Sathaye},
  title        = {Innovative practices session 4C data analytics in test},
  booktitle    = {35th {IEEE} {VLSI} Test Symposium, {VTS} 2017, Las Vegas, NV, USA,
                  April 9-12, 2017},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/VTS.2017.7928934},
  doi          = {10.1109/VTS.2017.7928934},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/NatarajanS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/RajendranSN17,
  author       = {Jeyavijayan (JV) Rajendran and
                  Peilin Song and
                  Suriya Natarajan},
  title        = {Innovative practices session 3C hardware security},
  booktitle    = {35th {IEEE} {VLSI} Test Symposium, {VTS} 2017, Las Vegas, NV, USA,
                  April 9-12, 2017},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/VTS.2017.7928931},
  doi          = {10.1109/VTS.2017.7928931},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/RajendranSN17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/esticas/ChintaluriNNR16,
  author       = {Ashwin Chintaluri and
                  Helia Naeimi and
                  Suriyaprakash Natarajan and
                  Arijit Raychowdhury},
  title        = {Analysis of Defects and Variations in Embedded Spin Transfer Torque
                  {(STT)} {MRAM} Arrays},
  journal      = {{IEEE} J. Emerg. Sel. Topics Circuits Syst.},
  volume       = {6},
  number       = {3},
  pages        = {319--329},
  year         = {2016},
  url          = {https://doi.org/10.1109/JETCAS.2016.2547779},
  doi          = {10.1109/JETCAS.2016.2547779},
  timestamp    = {Sat, 20 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/esticas/ChintaluriNNR16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/AhmadyanNV16,
  author       = {Seyed Nematollah Ahmadyan and
                  Suriyaprakash Natarajan and
                  Shobha Vasudevan},
  title        = {Every test makes a difference: Compressing analog tests to decrease
                  production costs},
  booktitle    = {21st Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2016, Macao, Macao, January 25-28, 2016},
  pages        = {539--544},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ASPDAC.2016.7428067},
  doi          = {10.1109/ASPDAC.2016.7428067},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/AhmadyanNV16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/SequeiraNGC16,
  author       = {Jyotsna Sequeira and
                  Suriyaprakash Natarajan and
                  Prashant Goteti and
                  Nitin Chaudhary},
  title        = {Fault simulation for analog test coverage},
  booktitle    = {2016 {IEEE} International Test Conference, {ITC} 2016, Fort Worth,
                  TX, USA, November 15-17, 2016},
  pages        = {1--7},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/TEST.2016.7805831},
  doi          = {10.1109/TEST.2016.7805831},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/itc/SequeiraNGC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/BanerjeeN16,
  author       = {Suvadeep Banerjee and
                  Suriyaprakash Natarajan},
  title        = {Infant mortality tests for analog and mixed-signal circuits},
  booktitle    = {34th {IEEE} {VLSI} Test Symposium, {VTS} 2016, Las Vegas, NV, USA,
                  April 25-27, 2016},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/VTS.2016.7477262},
  doi          = {10.1109/VTS.2016.7477262},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/BanerjeeN16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/NatarajanW16,
  author       = {Suriyaprakash Natarajan and
                  Li{-}C. Wang},
  title        = {Session 4B - Panel data analytics in semiconductor manufacturing},
  booktitle    = {34th {IEEE} {VLSI} Test Symposium, {VTS} 2016, Las Vegas, NV, USA,
                  April 25-27, 2016},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/VTS.2016.7477277},
  doi          = {10.1109/VTS.2016.7477277},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/NatarajanW16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ats/ChintaluriPNNR15,
  author       = {Ashwin Chintaluri and
                  Abhinav Parihar and
                  Suriyaprakash Natarajan and
                  Helia Naeimi and
                  Arijit Raychowdhury},
  title        = {A Model Study of Defects and Faults in Embedded Spin Transfer Torque
                  {(STT)} {MRAM} Arrays},
  booktitle    = {24th {IEEE} Asian Test Symposium, {ATS} 2015, Mumbai, India, November
                  22-25, 2015},
  pages        = {187--192},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/ATS.2015.39},
  doi          = {10.1109/ATS.2015.39},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ats/ChintaluriPNNR15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/AhmadyanGNCV15,
  author       = {Seyed Nematollah Ahmadyan and
                  Chenjie Gu and
                  Suriyaprakash Natarajan and
                  Eli Chiprout and
                  Shobha Vasudevan},
  editor       = {Wolfgang Nebel and
                  David Atienza},
  title        = {Fast eye diagram analysis for high-speed {CMOS} circuits},
  booktitle    = {Proceedings of the 2015 Design, Automation {\&} Test in Europe
                  Conference {\&} Exhibition, {DATE} 2015, Grenoble, France, March
                  9-13, 2015},
  pages        = {1377--1382},
  publisher    = {{ACM}},
  year         = {2015},
  url          = {http://dl.acm.org/citation.cfm?id=2757133},
  timestamp    = {Mon, 09 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/date/AhmadyanGNCV15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icecsys/LiNS15,
  author       = {Chong Li and
                  Suriyaprakash Natarajan and
                  C.{-}J. Richard Shi},
  title        = {Identifying {DC} bias conditions for maximum {DC} current in digitally-assisted
                  analog design},
  booktitle    = {2015 {IEEE} International Conference on Electronics, Circuits, and
                  Systems, {ICECS} 2015, Cairo, Egypt, December 6-9, 2015},
  pages        = {478--481},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ICECS.2015.7440352},
  doi          = {10.1109/ICECS.2015.7440352},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/LiNS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/KodakaraN15,
  author       = {Sreekumar V. Kodakara and
                  Suriya Natarajan},
  title        = {Special session 12B: Panel: {IOT} - Reliable? Secure? Or death by
                  a billion cuts?},
  booktitle    = {33rd {IEEE} {VLSI} Test Symposium, {VTS} 2015, Napa, CA, USA, April
                  27-29, 2015},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/VTS.2015.7116304},
  doi          = {10.1109/VTS.2015.7116304},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/KodakaraN15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/Natarajan15,
  author       = {Suriya Natarajan},
  title        = {Innovative practices session 7C: Mixed signal test and debug},
  booktitle    = {33rd {IEEE} {VLSI} Test Symposium, {VTS} 2015, Napa, CA, USA, April
                  27-29, 2015},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/VTS.2015.7116282},
  doi          = {10.1109/VTS.2015.7116282},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/Natarajan15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/AhmadiHNCM14,
  author       = {Ali Ahmadi and
                  Ke Huang and
                  Suriyaprakash Natarajan and
                  John M. Carulli Jr. and
                  Yiorgos Makris},
  title        = {Spatio-temporal wafer-level correlation modeling with progressive
                  sampling: {A} pathway to {HVM} yield estimation},
  booktitle    = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
                  October 20-23, 2014},
  pages        = {1--10},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/TEST.2014.7035325},
  doi          = {10.1109/TEST.2014.7035325},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/AhmadiHNCM14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/MajumdarNMSGH14,
  author       = {Amitava Majumdar and
                  Suriya Natarajan and
                  Stephen K. Sunter and
                  Prashant Goteti and
                  Ke Huang},
  title        = {Innovative practices session 4C: Disruptive solutions in the non-digital
                  world},
  booktitle    = {32nd {IEEE} {VLSI} Test Symposium, {VTS} 2014, Napa, CA, USA, April
                  13-17, 2014},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/VTS.2014.6818759},
  doi          = {10.1109/VTS.2014.6818759},
  timestamp    = {Thu, 18 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/MajumdarNMSGH14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/NatarajanMR14,
  author       = {Suriya Natarajan and
                  Amitava Majumdar and
                  Jeyavijayan Rajendran},
  title        = {Hot topic session 9C: Test and fault tolerance for emerging memory
                  technologies},
  booktitle    = {32nd {IEEE} {VLSI} Test Symposium, {VTS} 2014, Napa, CA, USA, April
                  13-17, 2014},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/VTS.2014.6818788},
  doi          = {10.1109/VTS.2014.6818788},
  timestamp    = {Thu, 18 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/NatarajanMR14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/YeltenNXG13,
  author       = {Mustafa Berke Yelten and
                  Suriyaprakash Natarajan and
                  Bin Xue and
                  Prashant Goteti},
  editor       = {J{\"{o}}rg Henkel},
  title        = {Scalable and efficient analog parametric fault identification},
  booktitle    = {The {IEEE/ACM} International Conference on Computer-Aided Design,
                  ICCAD'13, San Jose, CA, USA, November 18-21, 2013},
  pages        = {387--392},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ICCAD.2013.6691147},
  doi          = {10.1109/ICCAD.2013.6691147},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iccad/YeltenNXG13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/BhattaMNGX13,
  author       = {Debesh Bhatta and
                  Ishita Mukhopadhyay and
                  Suriyaprakash Natarajan and
                  Prashant Goteti and
                  Bin Xue},
  title        = {Framework for analog test coverage},
  booktitle    = {International Symposium on Quality Electronic Design, {ISQED} 2013,
                  Santa Clara, CA, USA, March 4-6, 2013},
  pages        = {468--475},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISQED.2013.6523653},
  doi          = {10.1109/ISQED.2013.6523653},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/BhattaMNGX13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/NaeimiNVKN13,
  author       = {Helia Naeimi and
                  Suriya Natarajan and
                  Kushagra Vaid and
                  Prabhakar Kudva and
                  Mahesh Natu},
  title        = {Innovative practices session 5C: Cloud atlas - Unreliability through
                  massive connectivity},
  booktitle    = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
                  April 29 - May 2, 2013},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/VTS.2013.6548907},
  doi          = {10.1109/VTS.2013.6548907},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/NaeimiNVKN13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/YamaguchiARNC13,
  author       = {Takahiro J. Yamaguchi and
                  Jacob A. Abraham and
                  Gordon W. Roberts and
                  Suriyaprakash Natarajan and
                  Dennis J. Ciplickas},
  title        = {Special session 12B: Panel post-silicon validation {\&} test in
                  huge variance era},
  booktitle    = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
                  April 29 - May 2, 2013},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/VTS.2013.6548945},
  doi          = {10.1109/VTS.2013.6548945},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/YamaguchiARNC13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/NatarajanS11,
  author       = {Suriyaprakash Natarajan and
                  Arani Sinha},
  title        = {The buck stops with wafer test: Dream or reality?},
  booktitle    = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
                  Point, California, {USA}},
  pages        = {111},
  publisher    = {{IEEE} Computer Society},
  year         = {2011},
  url          = {https://doi.org/10.1109/VTS.2011.5783763},
  doi          = {10.1109/VTS.2011.5783763},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/NatarajanS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/SinhaN11,
  author       = {Arani Sinha and
                  Suriyaprakash Natarajan},
  title        = {The bang for the buck with resiliency: Yield or field?},
  booktitle    = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
                  Point, California, {USA}},
  pages        = {152},
  publisher    = {{IEEE} Computer Society},
  year         = {2011},
  url          = {https://doi.org/10.1109/VTS.2011.5783769},
  doi          = {10.1109/VTS.2011.5783769},
  timestamp    = {Thu, 25 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/SinhaN11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/NatarajanKCG10,
  author       = {Suriyaprakash Natarajan and
                  Arun Krishnamachary and
                  Eli Chiprout and
                  Rajesh Galivanche},
  editor       = {Ron Press and
                  Erik H. Volkerink},
  title        = {Path coverage based functional test generation for processor marginality
                  validation},
  booktitle    = {2011 {IEEE} International Test Conference, {ITC} 2010, Austin, TX,
                  USA, November 2-4, 2010},
  pages        = {544--552},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/TEST.2010.5699257},
  doi          = {10.1109/TEST.2010.5699257},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/NatarajanKCG10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/Natarajan10,
  author       = {Suriyaprakash Natarajan},
  title        = {Innovative practices session 9C: Implications of power delivery network
                  for validation and testing},
  booktitle    = {28th {IEEE} {VLSI} Test Symposium, {VTS} 2010, April 19-22, 2010,
                  Santa Cruz, California, {USA}},
  pages        = {282},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/VTS.2010.5469555},
  doi          = {10.1109/VTS.2010.5469555},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/Natarajan10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/dt/KillpackNKB08,
  author       = {Kip Killpack and
                  Suriyaprakash Natarajan and
                  Arun Krishnamachary and
                  Pouria Bastani},
  title        = {Case Study on Speed Failure Causes in a Microprocessor},
  journal      = {{IEEE} Des. Test Comput.},
  volume       = {25},
  number       = {3},
  pages        = {224--230},
  year         = {2008},
  url          = {https://doi.org/10.1109/MDT.2008.61},
  doi          = {10.1109/MDT.2008.61},
  timestamp    = {Sun, 17 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/dt/KillpackNKB08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/glvlsi/GurumurthyVAN08,
  author       = {Sankar Gurumurthy and
                  Ramtilak Vemu and
                  Jacob A. Abraham and
                  Suriyaprakash Natarajan},
  editor       = {Vijaykrishnan Narayanan and
                  Zhiyuan Yan and
                  Enrico Macii and
                  Sanjukta Bhanja},
  title        = {On efficient generation of instruction sequences to test for delay
                  defects in a processor},
  booktitle    = {Proceedings of the 18th {ACM} Great Lakes Symposium on {VLSI} 2008,
                  Orlando, Florida, USA, May 4-6, 2008},
  pages        = {279--284},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1145/1366110.1366178},
  doi          = {10.1145/1366110.1366178},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/GurumurthyVAN08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/HuangCNSG08,
  author       = {I{-}De Huang and
                  Yi{-}Shing Chang and
                  Suriyaprakash Natarajan and
                  Ramesh Sharma and
                  Sandeep K. Gupta},
  editor       = {Douglas Young and
                  Nur A. Touba},
  title        = {On Accelerating Path Delay Fault Simulation of Long Test Sequences},
  booktitle    = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
                  California, USA, October 26-31, 2008},
  pages        = {1--9},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/TEST.2008.4700625},
  doi          = {10.1109/TEST.2008.4700625},
  timestamp    = {Fri, 22 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/itc/HuangCNSG08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ats/JasNP07,
  author       = {Abhijit Jas and
                  Suriyaprakash Natarajan and
                  Srinivas Patil},
  title        = {The Region-Exhaustive Fault Model},
  booktitle    = {16th Asian Test Symposium, {ATS} 2007, Beijing, China, October 8-11,
                  2007},
  pages        = {13--18},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ATS.2007.78},
  doi          = {10.1109/ATS.2007.78},
  timestamp    = {Wed, 09 Nov 2022 21:30:34 +0100},
  biburl       = {https://dblp.org/rec/conf/ats/JasNP07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dft/LeeNPP06,
  author       = {Hangkyu Lee and
                  Suriyaprakash Natarajan and
                  Srinivas Patil and
                  Irith Pomeranz},
  title        = {Selecting High-Quality Delay Tests for Manufacturing Test and Debug},
  booktitle    = {21th {IEEE} International Symposium on Defect and Fault-Tolerance
                  in {VLSI} Systems {(DFT} 2006), 4-6 October 2006, Arlington, Virginia,
                  {USA}},
  pages        = {59--70},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/DFT.2006.57},
  doi          = {10.1109/DFT.2006.57},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dft/LeeNPP06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/NatarajanPC06,
  author       = {Suriyaprakash Natarajan and
                  Srinivas Patil and
                  Sreejit Chakravarty},
  title        = {Path Delay Fault Simulation on Large Industrial Designs},
  booktitle    = {24th {IEEE} {VLSI} Test Symposium {(VTS} 2006), 30 April - 4 May 2006,
                  Berkeley, California, {USA}},
  pages        = {16--23},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/VTS.2006.55},
  doi          = {10.1109/VTS.2006.55},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/NatarajanPC06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ats/SyalHNC05,
  author       = {Manan Syal and
                  Michael S. Hsiao and
                  Suriyaprakash Natarajan and
                  Sreejit Chakravarty},
  title        = {Untestable Multi-Cycle Path Delay Faults in Industrial Designs},
  booktitle    = {14th Asian Test Symposium {(ATS} 2005), 18-21 December 2005, Calcutta,
                  India},
  pages        = {194--201},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/ATS.2005.111},
  doi          = {10.1109/ATS.2005.111},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ats/SyalHNC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/NazarianHNGB02,
  author       = {Shahin Nazarian and
                  Hang Huang and
                  Suriyaprakash Natarajan and
                  Sandeep K. Gupta and
                  Melvin A. Breuer},
  title        = {{XIDEN:} Crosstalk Target Identification Framework},
  booktitle    = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
                  MD, USA, October 7-10, 2002},
  pages        = {365--374},
  publisher    = {{IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/TEST.2002.1041780},
  doi          = {10.1109/TEST.2002.1041780},
  timestamp    = {Thu, 21 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/itc/NazarianHNGB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/NatarajanGB01,
  author       = {Suriyaprakash Natarajan and
                  Sandeep K. Gupta and
                  Melvin A. Breuer},
  title        = {Switch-level delay test of domino logic circuits},
  booktitle    = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
                  MD, USA, 30 October - 1 November 2001},
  pages        = {367--376},
  publisher    = {{IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/TEST.2001.966653},
  doi          = {10.1109/TEST.2001.966653},
  timestamp    = {Thu, 21 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/itc/NatarajanGB01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/NatarajanGB99,
  author       = {Suriyaprakash Natarajan and
                  Sandeep K. Gupta and
                  Melvin A. Breuer},
  title        = {Switch-level delay test},
  booktitle    = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
                  NJ, USA, 27-30 September 1999},
  pages        = {171--180},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/TEST.1999.805628},
  doi          = {10.1109/TEST.1999.805628},
  timestamp    = {Thu, 21 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/itc/NatarajanGB99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dft/NatarajanBG98,
  author       = {Suriyaprakash Natarajan and
                  Melvin A. Breuer and
                  Sandeep K. Gupta},
  title        = {Process Variations and their Impact on Circuit Operation},
  booktitle    = {13th International Symposium on Defect and Fault-Tolerance in {VLSI}
                  Systems {(DFT} '98), 2-4 November 1998, Austin, TX, USA, Proceedings},
  pages        = {73},
  publisher    = {{IEEE} Computer Society},
  year         = {1998},
  url          = {https://doi.org/10.1109/DFTVS.1998.732153},
  doi          = {10.1109/DFTVS.1998.732153},
  timestamp    = {Thu, 21 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dft/NatarajanBG98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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