BibTeX records: Shogo Nakaya

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@article{DBLP:journals/ipsj/NakayaMSNS13,
  author       = {Shogo Nakaya and
                  Makoto Miyamura and
                  Noboru Sakimura and
                  Yuichi Nakamura and
                  Tadahiko Sugibayashi},
  title        = {A Non-volatile Reconfigurable Offloader for Wireless Sensor Nodes},
  journal      = {{IPSJ} Trans. Syst. {LSI} Des. Methodol.},
  volume       = {6},
  pages        = {52--59},
  year         = {2013},
  url          = {https://doi.org/10.2197/ipsjtsldm.6.52},
  doi          = {10.2197/IPSJTSLDM.6.52},
  timestamp    = {Fri, 10 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ipsj/NakayaMSNS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/embc/NakayaN13,
  author       = {Shogo Nakaya and
                  Yuichi Nakamura},
  title        = {Adaptive sensing of {ECG} signals using {R-R} interval prediction},
  booktitle    = {35th Annual International Conference of the {IEEE} Engineering in
                  Medicine and Biology Society, {EMBC} 2013, Osaka, Japan, July 3-7,
                  2013},
  pages        = {9--12},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/EMBC.2013.6609424},
  doi          = {10.1109/EMBC.2013.6609424},
  timestamp    = {Fri, 10 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/embc/NakayaN13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/NakayaMSNS12,
  author       = {Shogo Nakaya and
                  Makoto Miyamura and
                  Noboru Sakimura and
                  Yuichi Nakamura and
                  Tadahiko Sugibayashi},
  title        = {A non-volatile reconfigurable offloader for wireless sensor nodes},
  journal      = {{SIGARCH} Comput. Archit. News},
  volume       = {40},
  number       = {5},
  pages        = {87--92},
  year         = {2012},
  url          = {https://doi.org/10.1145/2460216.2460232},
  doi          = {10.1145/2460216.2460232},
  timestamp    = {Fri, 10 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/sigarch/NakayaMSNS12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/MiyamuraNTSOBIIHSSM11,
  author       = {Makoto Miyamura and
                  Shogo Nakaya and
                  Munehiro Tada and
                  Toshitsugu Sakamoto and
                  Koichiro Okamoto and
                  Naoki Banno and
                  Shinji Ishida and
                  Kimihiko Ito and
                  Hiromitsu Hada and
                  Noboru Sakimura and
                  Tadahiko Sugibayashi and
                  Masato Motomura},
  title        = {Programmable cell array using rewritable solid-electrolyte switch
                  integrated in 90nm {CMOS}},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
                  Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
                  2011},
  pages        = {228--229},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISSCC.2011.5746296},
  doi          = {10.1109/ISSCC.2011.5746296},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/MiyamuraNTSOBIIHSSM11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/YamauchiNIK01,
  author       = {Tsukasa Yamauchi and
                  Shogo Nakaya and
                  Takeshi Inuo and
                  Nobuki Kajihara},
  editor       = {Gordon J. Brebner and
                  Roger F. Woods},
  title        = {Arithmetic Operation Oriented Reconfigurable Chip: {RHW}},
  booktitle    = {Field-Programmable Logic and Applications, 11th International Conference,
                  {FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {2147},
  pages        = {618--622},
  publisher    = {Springer},
  year         = {2001},
  url          = {https://doi.org/10.1007/3-540-44687-7\_66},
  doi          = {10.1007/3-540-44687-7\_66},
  timestamp    = {Sat, 19 Oct 2019 20:15:05 +0200},
  biburl       = {https://dblp.org/rec/conf/fpl/YamauchiNIK01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/YamauchiNIK00,
  author       = {Tsukasa Yamauchi and
                  Shogo Nakaya and
                  Takeshi Inuo and
                  Nobuki Kajihara},
  title        = {Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable
                  Chip {RHW}},
  booktitle    = {8th {IEEE} Symposium on Field-Programmable Custom Computing Machines
                  {(FCCM} 2000), 17-19 April 2000, Napa Valley, CA, USA, Proceedings},
  pages        = {281--282},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/FPGA.2000.903921},
  doi          = {10.1109/FPGA.2000.903921},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fccm/YamauchiNIK00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aaai/SakanashiSINYIKH98,
  author       = {Hidenori Sakanashi and
                  Mehrdad Salami and
                  Masaya Iwata and
                  Shogo Nakaya and
                  Tsukasa Yamauchi and
                  Takeshi Inuo and
                  Nobuki Kajihara and
                  Tetsuya Higuchi},
  editor       = {Jack Mostow and
                  Chuck Rich},
  title        = {Evolvable Hardware Chip for High Precision Printer Image Compression},
  booktitle    = {Proceedings of the Fifteenth National Conference on Artificial Intelligence
                  and Tenth Innovative Applications of Artificial Intelligence Conference,
                  {AAAI} 98, {IAAI} 98, July 26-30, 1998, Madison, Wisconsin, {USA}},
  pages        = {486--491},
  publisher    = {{AAAI} Press / The {MIT} Press},
  year         = {1998},
  url          = {http://www.aaai.org/Library/AAAI/1998/aaai98-069.php},
  timestamp    = {Tue, 05 Sep 2023 09:10:47 +0200},
  biburl       = {https://dblp.org/rec/conf/aaai/SakanashiSINYIKH98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ices/KajitaniHNYNYIKIKH98,
  author       = {Isamu Kajitani and
                  Tsutomu Hoshino and
                  Daisuke Nishikawa and
                  Hiroshi Yokoi and
                  Shogo Nakaya and
                  Tsukasa Yamauchi and
                  Takeshi Inuo and
                  Nobuki Kajihara and
                  Masaya Iwata and
                  Didier Keymeulen and
                  Tetsuya Higuchi},
  editor       = {Moshe Sipper and
                  Daniel Mange and
                  Andr{\'{e}}s P{\'{e}}rez{-}Uribe},
  title        = {A Gate-Level {EHW} Chip: Implementing {GA} Operations and Reconfigurable
                  Hardware on a Single {LSI}},
  booktitle    = {Evolvable Systems: From Biology to Hardware, Second International
                  Conference, {ICES} 98, Lausanne, Switzerland, September 23-25, 1998,
                  Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {1478},
  pages        = {1--12},
  publisher    = {Springer},
  year         = {1998},
  url          = {https://doi.org/10.1007/BFb0057602},
  doi          = {10.1007/BFB0057602},
  timestamp    = {Wed, 07 Dec 2022 23:14:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ices/KajitaniHNYNYIKIKH98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/YamauchiNK96,
  author       = {Tsukasa Yamauchi and
                  Shogo Nakaya and
                  Nobuki Kajihara},
  title        = {{SOP:} a reconfigurable massively parallel system and its control-data-flow
                  based compiling method},
  booktitle    = {4th {IEEE} Symposium on FPGAs for Custom Computing Machines {(FCCM}
                  '96), Napa Valley, CA, USA, April 17-19, 1996},
  pages        = {148--156},
  publisher    = {{IEEE}},
  year         = {1996},
  url          = {https://doi.org/10.1109/FPGA.1996.564793},
  doi          = {10.1109/FPGA.1996.564793},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/fccm/YamauchiNK96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/parcella/YamauchiNK96,
  author       = {Tsukasa Yamauchi and
                  Shogo Nakaya and
                  Nobuki Kajihara},
  editor       = {Roland Vollmar and
                  Werner Erhard and
                  Vesselin Iossifov},
  title        = {{SOP:} An Adaptive Massively Parallel Computer and its Control-Data-Flow
                  Based Compiling Method},
  booktitle    = {Parcella 1996, {VII.} International Workshop on Parallel Processing
                  by Cellular Automata and Arrays, Berlin, Germany, September 16-20,
                  1996, Proceedings},
  series       = {Mathematical Research},
  volume       = {96},
  pages        = {128--136},
  publisher    = {Akademie Verlag, Berlin},
  year         = {1996},
  timestamp    = {Mon, 18 Jun 2018 20:36:59 +0200},
  biburl       = {https://dblp.org/rec/conf/parcella/YamauchiNK96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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