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ORCIDBibTeX records: T. M. Mak
@article{DBLP:journals/imm/UngarJM20,
author = {Louis Y. Ungar and
Neil G. Jacobson and
T. M. Mak},
title = {High-speed {I/O} capabilities added to military automatic test equipment
{(ATE)} using synthetic instruments},
journal = {{IEEE} Instrum. Meas. Mag.},
volume = {23},
number = {5},
pages = {19--26},
year = {2020},
url = {https://ieeexplore.ieee.org/document/9153569},
timestamp = {Sat, 29 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/imm/UngarJM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/JeongNSMKO17,
author = {Jae Woong Jeong and
Vishwanath Natarajan and
Shreyas Sen and
T. M. Mak and
Jennifer Kitchen and
Sule Ozev},
title = {A Comprehensive {BIST} Solution for Polar Transceivers Using On-Chip
Resources},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {23},
number = {1},
pages = {2:1--2:21},
year = {2017},
url = {https://doi.org/10.1145/3084689},
doi = {10.1145/3084689},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/JeongNSMKO17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/OmanaRGMMRT15,
author = {Martin Oma{\~{n}}a and
Daniele Rossi and
Daniele Giaffreda and
Cecilia Metra and
T. M. Mak and
Asifur Rahman and
Simon Tam},
title = {Low-Cost On-Chip Clock Jitter Measurement Scheme},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {23},
number = {3},
pages = {435--443},
year = {2015},
url = {https://doi.org/10.1109/TVLSI.2014.2312431},
doi = {10.1109/TVLSI.2014.2312431},
timestamp = {Sun, 20 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/OmanaRGMMRT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/RossiOCMM14,
author = {Daniele Rossi and
Martin Oma{\~{n}}a and
Jos{\'{e}} Manuel Cazeaux and
Cecilia Metra and
T. M. Mak},
title = {Clock Faults Induced Min and Max Delay Violations},
journal = {J. Electron. Test.},
volume = {30},
number = {1},
pages = {111--123},
year = {2014},
url = {https://doi.org/10.1007/s10836-013-5426-4},
doi = {10.1007/S10836-013-5426-4},
timestamp = {Sun, 20 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/RossiOCMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Mak14,
author = {T. M. Mak},
title = {Interposer test: Testing PCBs that have shrunk 100x},
booktitle = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
October 20-23, 2014},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/TEST.2014.7035334},
doi = {10.1109/TEST.2014.7035334},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Mak14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KimMMM14,
author = {John Kim and
Wolfgang Meyer and
T. M. Mak and
Amitava Majumdar},
title = {Innovative practices session 3C: Solving today's test challenges},
booktitle = {32nd {IEEE} {VLSI} Test Symposium, {VTS} 2014, Napa, CA, USA, April
13-17, 2014},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/VTS.2014.6818756},
doi = {10.1109/VTS.2014.6818756},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/KimMMM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JeongOSM13,
author = {Jae Woong Jeong and
Sule Ozev and
Shreyas Sen and
T. M. Mak},
title = {Measurement of envelope/phase path delay skew and envelope path bandwidth
in polar transmitters},
booktitle = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
April 29 - May 2, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/VTS.2013.6548888},
doi = {10.1109/VTS.2013.6548888},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/JeongOSM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MetraOMT12,
author = {Cecilia Metra and
Martin Oma{\~{n}}a and
T. M. Mak and
Simon Tam},
title = {New Design for Testability Approach for Clock Fault Testing},
journal = {{IEEE} Trans. Computers},
volume = {61},
number = {4},
pages = {448--457},
year = {2012},
url = {https://doi.org/10.1109/TC.2011.59},
doi = {10.1109/TC.2011.59},
timestamp = {Sun, 20 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tc/MetraOMT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/JiangXCM12,
author = {Li Jiang and
Qiang Xu and
Krishnendu Chakrabarty and
T. M. Mak},
title = {Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling
for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {20},
number = {9},
pages = {1621--1633},
year = {2012},
url = {https://doi.org/10.1109/TVLSI.2011.2160410},
doi = {10.1109/TVLSI.2011.2160410},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/JiangXCM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/OmanaMMT11,
author = {Martin Oma{\~{n}}a and
Cecilia Metra and
T. M. Mak and
Simon Tam},
title = {Low-Cost Dynamic Compensation Scheme for Local Clocks of Next Generation
High Performance Microprocessors},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {19},
number = {12},
pages = {2322--2325},
year = {2011},
url = {https://doi.org/10.1109/TVLSI.2010.2085021},
doi = {10.1109/TVLSI.2010.2085021},
timestamp = {Sun, 20 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/OmanaMMT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/OmanaGMMTR10,
author = {Martin Oma{\~{n}}a and
Daniele Giaffreda and
Cecilia Metra and
T. M. Mak and
Simon Tam and
Asifur Rahman},
title = {On-die Ring Oscillator Based Measurement Scheme for Process Parameter
Variations and Clock Jitter},
booktitle = {25th {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} Systems, {DFT} 2010, Kyoto, Japan, October 6-8, 2010},
pages = {265--272},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/DFT.2010.39},
doi = {10.1109/DFT.2010.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/OmanaGMMTR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/JiangXCM09,
author = {Li Jiang and
Qiang Xu and
Krishnendu Chakrabarty and
T. M. Mak},
editor = {Jaijeet S. Roychowdhury},
title = {Layout-driven test-architecture design and optimization for 3D SoCs
under pre-bond test-pin-count constraint},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {191--196},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687434},
doi = {10.1145/1687399.1687434},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/JiangXCM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/YangTYM09,
author = {Joon{-}Sung Yang and
Nur A. Touba and
Shih{-}Yu Yang and
T. M. Mak},
editor = {Gordon W. Roberts and
Bill Eklow},
title = {An industrial case study for X-canceling {MISR}},
booktitle = {2009 {IEEE} International Test Conference, {ITC} 2009, Austin, TX,
USA, November 1-6, 2009},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/TEST.2009.5355687},
doi = {10.1109/TEST.2009.5355687},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/YangTYM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MetraOMRT08,
author = {Cecilia Metra and
Martin Oma{\~{n}}a and
T. M. Mak and
Asifur Rahman and
Simon Tam},
editor = {Cristiana Bolchini and
Yong{-}Bin Kim and
Dimitris Gizopoulos and
Mohammad Tehranipoor},
title = {Novel On-Chip Clock Jitter Measurement Scheme for High Performance
Microprocessors},
booktitle = {23rd {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2008), 1-3 October 2008, Boston, MA, {USA}},
pages = {465--473},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DFT.2008.51},
doi = {10.1109/DFT.2008.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MetraOMRT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/Mak08,
author = {T. M. Mak},
editor = {Douglas Young and
Nur A. Touba},
title = {Jitters in high performance microprocessors},
booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
California, USA, October 26-31, 2008},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/TEST.2008.4700650},
doi = {10.1109/TEST.2008.4700650},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/Mak08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Mak07,
author = {T. M. Mak},
title = {The case for power with test},
journal = {{IEEE} Des. Test Comput.},
volume = {24},
number = {3},
pages = {296},
year = {2007},
url = {https://doi.org/10.1109/MDT.2007.87},
doi = {10.1109/MDT.2007.87},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/Mak07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MetraRM07,
author = {Cecilia Metra and
Daniele Rossi and
T. M. Mak},
title = {Won't On-Chip Clock Calibration Guarantee Performance Boost and Product
Quality?},
journal = {{IEEE} Trans. Computers},
volume = {56},
number = {3},
pages = {415--428},
year = {2007},
url = {https://doi.org/10.1109/TC.2007.53},
doi = {10.1109/TC.2007.53},
timestamp = {Mon, 13 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MetraRM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/Mak07,
author = {T. M. Mak},
title = {Invited Talk 1: Testing of Power Constraint Computing},
booktitle = {16th Asian Test Symposium, {ATS} 2007, Beijing, China, October 8-11,
2007},
pages = {6},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/ATS.2007.107},
doi = {10.1109/ATS.2007.107},
timestamp = {Wed, 09 Nov 2022 21:30:34 +0100},
biburl = {https://dblp.org/rec/conf/ats/Mak07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/ZhangMTKSL07,
author = {Ming Zhang and
T. M. Mak and
James W. Tschanz and
Kee Sup Kim and
Norbert Seifert and
Davia Lu},
title = {Design for Resilience to Soft Errors and Variations},
booktitle = {13th {IEEE} International On-Line Testing Symposium {(IOLTS} 2007),
8-11 July 2007, Heraklion, Crete, Greece},
pages = {23--28},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/IOLTS.2007.26},
doi = {10.1109/IOLTS.2007.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/ZhangMTKSL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Mak07,
author = {T. M. Mak},
title = {Infant Mortality--The Lesser Known Reliability Issue},
booktitle = {13th {IEEE} International On-Line Testing Symposium {(IOLTS} 2007),
8-11 July 2007, Heraklion, Crete, Greece},
pages = {122},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/IOLTS.2007.40},
doi = {10.1109/IOLTS.2007.40},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Mak07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/ThirugnanamHM07,
author = {Rajesh Thirugnanam and
Dong Sam Ha and
T. M. Mak},
title = {Data Recovery Block Design for Impulse Modulated Power Line Communications
in a Microprocessor},
booktitle = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2007), May 9-11, 2007, Porto Alegre, Brazil},
pages = {153--158},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ISVLSI.2007.34},
doi = {10.1109/ISVLSI.2007.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/ThirugnanamHM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MetraOMT07,
author = {Cecilia Metra and
Martin Oma{\~{n}}a and
T. M. Mak and
Simon Tam},
editor = {Jill Sibert and
Janusz Rajski},
title = {Novel compensation scheme for local clocks of high performance microprocessors},
booktitle = {2007 {IEEE} International Test Conference, {ITC} 2007, Santa Clara,
California, USA, October 21-26, 2007},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/TEST.2007.4437645},
doi = {10.1109/TEST.2007.4437645},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MetraOMT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MetraOMT07,
author = {Cecilia Metra and
Martin Oma{\~{n}}a and
T. M. Mak and
Simon Tam},
title = {Novel Approach to Clock Fault Testing for High Performance Microprocessors},
booktitle = {25th {IEEE} {VLSI} Test Symposium {(VTS} 2007), 6-10 May 2007, Berkeley,
California, {USA}},
pages = {441--446},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/VTS.2007.42},
doi = {10.1109/VTS.2007.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MetraOMT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/RoyMC06,
author = {Kaushik Roy and
T. M. Mak and
Kwang{-}Ting (Tim) Cheng},
title = {Test Consideration for Nanometer-Scale {CMOS} Circuits},
journal = {{IEEE} Des. Test Comput.},
volume = {23},
number = {2},
pages = {128--136},
year = {2006},
url = {https://doi.org/10.1109/MDT.2006.52},
doi = {10.1109/MDT.2006.52},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/RoyMC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Mak06,
author = {T. M. Mak},
title = {Is System in Package the Panacea for Integration?},
journal = {{IEEE} Des. Test Comput.},
volume = {23},
number = {3},
pages = {256},
year = {2006},
url = {https://doi.org/10.1109/MDT.2006.76},
doi = {10.1109/MDT.2006.76},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/Mak06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MakN06,
author = {T. M. Mak and
Sani R. Nassif},
title = {Guest Editors' Introduction: Process Variation and Stochastic Design
and Test},
journal = {{IEEE} Des. Test Comput.},
volume = {23},
number = {6},
pages = {436--437},
year = {2006},
url = {https://doi.org/10.1109/MDT.2006.147},
doi = {10.1109/MDT.2006.147},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/MakN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ZhangMMSWSKSP06,
author = {Ming Zhang and
Subhasish Mitra and
T. M. Mak and
Norbert Seifert and
Nicholas J. Wang and
Quan Shi and
Kee Sup Kim and
Naresh R. Shanbhag and
Sanjay J. Patel},
title = {Sequential Element Design With Built-In Soft Error Resilience},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {14},
number = {12},
pages = {1368--1378},
year = {2006},
url = {https://doi.org/10.1109/TVLSI.2006.887832},
doi = {10.1109/TVLSI.2006.887832},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ZhangMMSWSKSP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/MetraROCM06,
author = {Cecilia Metra and
Daniele Rossi and
Martin Oma{\~{n}}a and
Jos{\'{e}} Manuel Cazeaux and
T. M. Mak},
editor = {Matteo Sonza Reorda and
Ondrej Nov{\'{a}}k and
Bernd Straube and
Hana Kub{\'{a}}tov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Pavel Kubal{\'{\i}}k and
Raimund Ubar and
Jir{\'{\i}} Bucek},
title = {Can Clock Faults be Detected Through Functional Test?},
booktitle = {Proceedings of the 9th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2006), Prague, Czech
Republic, April 18-21, 2006},
pages = {168--173},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DDECS.2006.1649606},
doi = {10.1109/DDECS.2006.1649606},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/MetraROCM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/SinhaNM06,
author = {Arani Sinha and
Shahin Nazarian and
T. M. Mak},
title = {Simulating the Effects of Process Variations on Capacitive Crosstalk},
booktitle = {13th {IEEE} International Conference on Electronics, Circuits, and
Systems, {ICECS} 2006, Nice, France, December 10-13, 2006},
pages = {604--607},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICECS.2006.379861},
doi = {10.1109/ICECS.2006.379861},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/SinhaNM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MetraORCM06,
author = {Cecilia Metra and
Martin Oma{\~{n}}a and
Daniele Rossi and
Jos{\'{e}} Manuel Cazeaux and
T. M. Mak},
title = {Path (Min) Delay Faults and Their Impact on Self-Checking Circuits'
Operation},
booktitle = {12th {IEEE} International On-Line Testing Symposium {(IOLTS} 2006),
10-12 July 2006, Como, Italy},
pages = {17--22},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/IOLTS.2006.47},
doi = {10.1109/IOLTS.2006.47},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/MetraORCM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Mak06,
author = {T. M. Mak},
title = {Test Challenges for 3D Circuits},
booktitle = {12th {IEEE} International On-Line Testing Symposium {(IOLTS} 2006),
10-12 July 2006, Como, Italy},
pages = {79},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/IOLTS.2006.58},
doi = {10.1109/IOLTS.2006.58},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Mak06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MakM06,
author = {T. M. Mak and
Subhasish Mitra},
title = {Should Logic {SER} be Solved at the Circuit Level?},
booktitle = {12th {IEEE} International On-Line Testing Symposium {(IOLTS} 2006),
10-12 July 2006, Como, Italy},
pages = {199},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/IOLTS.2006.56},
doi = {10.1109/IOLTS.2006.56},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/MakM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MitraZSMK06a,
author = {Subhasish Mitra and
Ming Zhang and
Norbert Seifert and
T. M. Mak and
Kee Sup Kim},
editor = {Giovanni De Micheli and
Salvador Mir and
Ricardo Reis},
title = {Soft Error Resilient System Design through Error Correction},
booktitle = {VLSI-SoC: Research Trends in {VLSI} and Systems on Chip - Fourteenth
International Conference on Very Large Scale Integration of System
on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France},
series = {{IFIP}},
volume = {249},
pages = {143--156},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/978-0-387-74909-9\_9},
doi = {10.1007/978-0-387-74909-9\_9},
timestamp = {Tue, 17 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/MitraZSMK06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/MitraZSMK06,
author = {Subhasish Mitra and
Ming Zhang and
Norbert Seifert and
T. M. Mak and
Kee Sup Kim},
title = {Soft Error Resilient System Design through Error Correction},
booktitle = {{IFIP} VLSI-SoC 2006, {IFIP} {WG} 10.5 International Conference on
Very Large Scale Integration of System-on-Chip, Nice, France, 16-18
October 2006},
pages = {332--337},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/VLSISOC.2006.313256},
doi = {10.1109/VLSISOC.2006.313256},
timestamp = {Tue, 17 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/MitraZSMK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AshoueiCSDM06,
author = {Maryam Ashouei and
Abhijit Chatterjee and
Adit D. Singh and
Vivek De and
T. M. Mak},
title = {Statistical Estimation of Correlated Leakage Power Variation and Its
Application to Leakage-Aware Design},
booktitle = {19th International Conference on {VLSI} Design {(VLSI} Design 2006),
3-7 January 2006, Hyderabad, India},
pages = {606--612},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/VLSID.2006.152},
doi = {10.1109/VLSID.2006.152},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AshoueiCSDM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ats/Mak05,
author = {T. M. Mak},
title = {Limitation of structural scan delay test},
booktitle = {14th Asian Test Symposium {(ATS} 2005), 18-21 December 2005, Calcutta,
India},
pages = {471},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ATS.2005.74},
doi = {10.1109/ATS.2005.74},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ats/Mak05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MetraORCM05,
author = {Cecilia Metra and
Martin Oma{\~{n}}a and
Daniele Rossi and
Jos{\'{e}} Manuel Cazeaux and
T. M. Mak},
title = {The Other Side of the Timing Equation: a Result of Clock Faults},
booktitle = {20th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2005), 3-5 October 2005, Monterey, CA, {USA}},
pages = {169--177},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DFTVS.2005.65},
doi = {10.1109/DFTVS.2005.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MetraORCM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MakMZ05,
author = {T. M. Mak and
Subhasish Mitra and
Ming Zhang},
title = {{DFT} Assisted Built-In Soft Error Resilience},
booktitle = {11th {IEEE} International On-Line Testing Symposium {(IOLTS} 2005),
6-8 July 2005, Saint Raphael, France},
pages = {69},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/IOLTS.2005.23},
doi = {10.1109/IOLTS.2005.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/MakMZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Mak05,
author = {T. M. Mak},
title = {Does It Mean Less Testing for Self Calibrating Design?},
booktitle = {11th {IEEE} International On-Line Testing Symposium {(IOLTS} 2005),
6-8 July 2005, Saint Raphael, France},
pages = {99},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/IOLTS.2005.24},
doi = {10.1109/IOLTS.2005.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Mak05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MitraZMSZK05,
author = {Subhasish Mitra and
Ming Zhang and
T. M. Mak and
Norbert Seifert and
Victor Zia and
Kee Sup Kim},
title = {Logic soft errors: a major barrier to robust platform design},
booktitle = {Proceedings 2005 {IEEE} International Test Conference, {ITC} 2005,
Austin, TX, USA, November 8-10, 2005},
pages = {10},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/TEST.2005.1584031},
doi = {10.1109/TEST.2005.1584031},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MitraZMSZK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LeeWPM05,
author = {Leonard Lee and
Li{-}C. Wang and
Praveen Parvathala and
T. M. Mak},
title = {On Silicon-Based Speed Path Identification},
booktitle = {23rd {IEEE} {VLSI} Test Symposium {(VTS} 2005), 1-5 May 2005, Palm
Springs, CA, {USA}},
pages = {35--41},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/VTS.2005.61},
doi = {10.1109/VTS.2005.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/LeeWPM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/BreuerGM04,
author = {Melvin A. Breuer and
Sandeep K. Gupta and
T. M. Mak},
title = {Defect and Error Tolerance in the Presence of Massive Numbers of Defects},
journal = {{IEEE} Des. Test Comput.},
volume = {21},
number = {3},
pages = {216--227},
year = {2004},
url = {https://doi.org/10.1109/MDT.2004.8},
doi = {10.1109/MDT.2004.8},
timestamp = {Thu, 21 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/BreuerGM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MakKCW04,
author = {T. M. Mak and
Angela Krstic and
Kwang{-}Ting (Tim) Cheng and
Li{-}C. Wang},
title = {New Challenges in Delay Testing of Nanometer, Multigigahertz Designs},
journal = {{IEEE} Des. Test Comput.},
volume = {21},
number = {3},
pages = {241--247},
year = {2004},
url = {https://doi.org/10.1109/MDT.2004.17},
doi = {10.1109/MDT.2004.17},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/MakKCW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MakTM04,
author = {T. M. Mak and
Mike Tripp and
Anne Meixner},
title = {Testing Gbps Interfaces without a Gigahertz Tester},
journal = {{IEEE} Des. Test Comput.},
volume = {21},
number = {4},
pages = {278--286},
year = {2004},
url = {https://doi.org/10.1109/MDT.2004.42},
doi = {10.1109/MDT.2004.42},
timestamp = {Sun, 17 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/MakTM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/MetraFM04,
author = {Cecilia Metra and
Stefano Di Francescantonio and
T. M. Mak},
title = {Implications of Clock Distribution Faults and Issues with Screening
Them during Manufacturing Testing},
journal = {{IEEE} Trans. Computers},
volume = {53},
number = {5},
pages = {531--546},
year = {2004},
url = {https://doi.org/10.1109/TC.2004.1275295},
doi = {10.1109/TC.2004.1275295},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/MetraFM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/MetraMO04,
author = {Cecilia Metra and
T. M. Mak and
Martin Oma{\~{n}}a},
editor = {Stamatis Vassiliadis and
Jean{-}Luc Gaudiot and
Vincenzo Piuri},
title = {Fault secureness need for next generation high performance microprocessor
design for testability structures},
booktitle = {Proceedings of the First Conference on Computing Frontiers, 2004,
Ischia, Italy, April 14-16, 2004},
pages = {444--450},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/977091.977153},
doi = {10.1145/977091.977153},
timestamp = {Sun, 20 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/MetraMO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/TrippMM04,
author = {Mike Tripp and
T. M. Mak and
Anne Meixner},
title = {Design considerations and {DFT} to enable testing of digital interfaces},
booktitle = {Proceedings of the {IEEE} 2004 Custom Integrated Circuits Conference,
{CICC} 2004, Orlando, FL, USA, October 2004},
pages = {197--205},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/CICC.2004.1358776},
doi = {10.1109/CICC.2004.1358776},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/TrippMM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/WangMCA04,
author = {Li{-}C. Wang and
T. M. Mak and
Kwang{-}Ting Cheng and
Magdy S. Abadir},
editor = {Sharad Malik and
Limor Fix and
Andrew B. Kahng},
title = {On path-based learning and its applications in delay test and diagnosis},
booktitle = {Proceedings of the 41th Design Automation Conference, {DAC} 2004,
San Diego, CA, USA, June 7-11, 2004},
pages = {492--497},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/996566.996704},
doi = {10.1145/996566.996704},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/WangMCA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MetraMO04,
author = {Cecilia Metra and
T. M. Mak and
Martin Oma{\~{n}}a},
title = {Are Our Design for Testability Features Fault Secure?},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {714--715},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1268944},
doi = {10.1109/DATE.2004.1268944},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MetraMO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LeeWMC04,
author = {Leonard Lee and
Li{-}C. Wang and
T. M. Mak and
Kwang{-}Ting Cheng},
title = {A path-based methodology for post-silicon timing validation},
booktitle = {2004 International Conference on Computer-Aided Design, {ICCAD} 2004,
San Jose, CA, USA, November 7-11, 2004},
pages = {713--720},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2004},
url = {https://doi.org/10.1109/ICCAD.2004.1382669},
doi = {10.1109/ICCAD.2004.1382669},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/LeeWMC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/WeglarzSM04,
author = {Eric F. Weglarz and
Kewal K. Saluja and
T. M. Mak},
title = {Testing of Hard Faults in Simultaneous Multithreaded Processors},
booktitle = {10th {IEEE} International On-Line Testing Symposium {(IOLTS} 2004),
12-14 July 2004, Funchal, Madeira Island, Portugal},
pages = {95--100},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/IOLTS.2004.47},
doi = {10.1109/IOLTS.2004.47},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/WeglarzSM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KunduMG04,
author = {Sandip Kundu and
T. M. Mak and
Rajesh Galivanche},
title = {Trends in manufacturing test methods and their implications},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {679--687},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387329},
doi = {10.1109/TEST.2004.1387329},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/KunduMG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MetraMO04,
author = {Cecilia Metra and
T. M. Mak and
Martin Oma{\~{n}}a},
title = {Risks Associated with Faults within Test Pattern Compactors and Their
Implications on Testing},
booktitle = {Proceedings 2004 International Test Conference {(ITC} 2004), October
26-28, 2004, Charlotte, NC, {USA}},
pages = {1223--1231},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387395},
doi = {10.1109/TEST.2004.1387395},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MetraMO04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/TrippMM03a,
author = {Mike Tripp and
T. M. Mak and
Anne Meixner},
title = {Elimination of Traditional Functional Testing of Interface Timings
at Intel},
booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking
Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte,
NC, {USA}},
pages = {1448--1456},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/TEST.2004.1387457},
doi = {10.1109/TEST.2004.1387457},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/TrippMM03a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mtdt/SpicaM04,
author = {Michael Spica and
T. M. Mak},
title = {Do We Need Anything More Than Single Bit Error Correction (ECC)?},
booktitle = {12th {IEEE} International Workshop on Memory Technology, Design, and
Testing {(MTDT} 2004), 9-10 August 2004, San Jose, CA, {USA}},
pages = {111--116},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/MTDT.2004.9},
doi = {10.1109/MTDT.2004.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mtdt/SpicaM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/KrsticWCLM03,
author = {Angela Krstic and
Li{-}C. Wang and
Kwang{-}Ting Cheng and
Jing{-}Jia Liou and
T. M. Mak},
title = {Enhancing diagnosis resolution for delay defects based upon statistical
timing and statistical fault models},
booktitle = {Proceedings of the 40th Design Automation Conference, {DAC} 2003,
Anaheim, CA, USA, June 2-6, 2003},
pages = {668--673},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/775832.776001},
doi = {10.1145/775832.776001},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/KrsticWCLM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MetraMR03,
author = {Cecilia Metra and
T. M. Mak and
Daniele Rossi},
title = {Clock Calibration Faults and their Impact on Quality of High Performance
Microprocessors},
booktitle = {18th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2003), 3-5 November 2003, Boston, MA, USA,
Proceedings},
pages = {63--70},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/DFTVS.2003.1250096},
doi = {10.1109/DFTVS.2003.1250096},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MetraMR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/KrsticWCM03,
author = {Angela Krstic and
Li{-}C. Wang and
Kwang{-}Ting Cheng and
T. M. Mak},
title = {Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools
and Methodologies},
booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking
Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte,
NC, {USA}},
pages = {339--348},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/TEST.2003.1270856},
doi = {10.1109/TEST.2003.1270856},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/KrsticWCM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/TrippMM03,
author = {Mike Tripp and
T. M. Mak and
Anne Meixner},
title = {Elimination of Traditional Functional Testing of Interface Timings
at Intel},
booktitle = {Proceedings 2003 International Test Conference {(ITC} 2003), Breaking
Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte,
NC, {USA}},
pages = {1014--1022},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/TEST.2003.1271089},
doi = {10.1109/TEST.2003.1271089},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/TrippMM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RoyMC03,
author = {Kaushik Roy and
T. M. Mak and
Kwang{-}Ting Cheng},
title = {Embedded Tutorial: Test Consideration for Nanometer Scale {CMOS} Circuits},
booktitle = {21st {IEEE} {VLSI} Test Symposium {(VTS} 2003), 27 April - 1 May 2003,
Napa Valley, CA, {USA}},
pages = {313--318},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/VTEST.2003.1197668},
doi = {10.1109/VTEST.2003.1197668},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/RoyMC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MetraFM02,
author = {Cecilia Metra and
Stefano Di Francescantonio and
T. M. Mak},
title = {Clock Faults? Impact on Manufacturing Testing and Their Possible Detection
Through On-Line Testing},
booktitle = {Proceedings {IEEE} International Test Conference 2002, Baltimore,
MD, USA, October 7-10, 2002},
pages = {100--109},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/TEST.2002.1041750},
doi = {10.1109/TEST.2002.1041750},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MetraFM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/MetraFRM01,
author = {Cecilia Metra and
Stefano Di Francescantonio and
Bruno Ricc{\`{o}} and
T. M. Mak},
title = {Evaluation of Clock Distribution Networks' Most Likely Faults and
Produced Effects},
booktitle = {16th {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2001), 24-26 October 2001, San Francisco,
CA, USA, Proceedings},
pages = {357--365},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DFTVS.2001.966789},
doi = {10.1109/DFTVS.2001.966789},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/MetraFRM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/ChenMGB01,
author = {Liang{-}Chi Chen and
T. M. Mak and
Sandeep K. Gupta and
Melvin A. Breuer},
title = {Crosstalk test generation on pseudo industrial circuits: a case study},
booktitle = {Proceedings {IEEE} International Test Conference 2001, Baltimore,
MD, USA, 30 October - 1 November 2001},
pages = {548--557},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/TEST.2001.966673},
doi = {10.1109/TEST.2001.966673},
timestamp = {Thu, 21 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/ChenMGB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MakBPRRFY98,
author = {T. M. Mak and
Debika Bhattacharya and
Cheryl Prunty and
Bob Roeder and
Nermine Ramadan and
F. Joel Ferguson and
Jianlin Yu},
title = {Cache {RAM} inductive fault analysis with fab defect modeling},
booktitle = {Proceedings {IEEE} International Test Conference 1998, Washington,
DC, USA, October 18-22, 1998},
pages = {862--871},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/TEST.1998.743275},
doi = {10.1109/TEST.1998.743275},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MakBPRRFY98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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