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BibTeX records: Luca Macchiarulo
@inproceedings{DBLP:conf/iccad/GaoM11, author = {Xin Gao and Luca Macchiarulo}, editor = {Joel R. Phillips and Alan J. Hu and Helmut Graeb}, title = {A jumper insertion algorithm under antenna ratio and timing constraints}, booktitle = {2011 {IEEE/ACM} International Conference on Computer-Aided Design, {ICCAD} 2011, San Jose, California, USA, November 7-10, 2011}, pages = {290--297}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/ICCAD.2011.6105344}, doi = {10.1109/ICCAD.2011.6105344}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccad/GaoM11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tbcas/MassagramHCMLB10, author = {Wansuree Massagram and Noah Hafner and Mingqi Chen and Luca Macchiarulo and Victor Lubecke and Olga Boric{-}Lubecke}, title = {Digital Heart-Rate Variability Parameter Monitoring and Assessment {ASIC}}, journal = {{IEEE} Trans. Biomed. Circuits Syst.}, volume = {4}, number = {1}, pages = {19--26}, year = {2010}, url = {https://doi.org/10.1109/TBCAS.2009.2035555}, doi = {10.1109/TBCAS.2009.2035555}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tbcas/MassagramHCMLB10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/GaoM10, author = {Xin Gao and Luca Macchiarulo}, editor = {Giovanni De Micheli and Bashir M. Al{-}Hashimi and Wolfgang M{\"{u}}ller and Enrico Macii}, title = {Enhancing double-patterning detailed routing with lazy coloring and within-path conflict avoidance}, booktitle = {Design, Automation and Test in Europe, {DATE} 2010, Dresden, Germany, March 8-12, 2010}, pages = {1279--1284}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/DATE.2010.5457003}, doi = {10.1109/DATE.2010.5457003}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/date/GaoM10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/TotaCRMZ09, author = {Sergio Tota and Mario R. Casu and Massimo Ruo Roch and Luca Macchiarulo and Maurizio Zamboni}, title = {A Case Study for NoC-Based Homogeneous MPSoC Architectures}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {17}, number = {3}, pages = {384--388}, year = {2009}, url = {https://doi.org/10.1109/TVLSI.2008.2011239}, doi = {10.1109/TVLSI.2008.2011239}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/TotaCRMZ09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:journals/entcs/CasuM09, author = {Mario R. Casu and Luca Macchiarulo}, editor = {Sandeep K. Shukla and Jean{-}Pierre Talpin}, title = {Adaptive Latency Insensitive Protocols and Elastic Circuits with Early Evaluation: {A} Comparative Analysis}, booktitle = {Proceedings of the 4th International Workshop on the Application of Formal Methods for Globally Asynchronous and Locally Synchronous Design, FMGALS@DATE 2009, Nice, France, April 24, 2009}, series = {Electronic Notes in Theoretical Computer Science}, volume = {245}, pages = {35--50}, publisher = {Elsevier}, year = {2009}, url = {https://doi.org/10.1016/j.entcs.2009.07.027}, doi = {10.1016/J.ENTCS.2009.07.027}, timestamp = {Thu, 09 Mar 2023 14:36:56 +0100}, biburl = {https://dblp.org/rec/journals/entcs/CasuM09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/CasuM07, author = {Mario R. Casu and Luca Macchiarulo}, title = {Adaptive Latency-Insensitive Protocols}, journal = {{IEEE} Des. Test Comput.}, volume = {24}, number = {5}, pages = {442--452}, year = {2007}, url = {https://doi.org/10.1109/MDT.2007.152}, doi = {10.1109/MDT.2007.152}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/dt/CasuM07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/CasuM06, author = {Mario R. Casu and Luca Macchiarulo}, title = {Floorplanning With Wire Pipelining in Adaptive Communication Channels}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {25}, number = {12}, pages = {2996--3004}, year = {2006}, url = {https://doi.org/10.1109/TCAD.2006.882590}, doi = {10.1109/TCAD.2006.882590}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/CasuM06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/embc/Macchiarulo06, author = {Luca Macchiarulo}, title = {Using Existing Digital Tools for Efficient Metabolic Pathway Simulations}, booktitle = {28th International Conference of the {IEEE} Engineering in Medicine and Biology Society, {EMBC} 2006, New York City, NY, USA, August 30 - September 3, 2006, Main Volume}, pages = {4233--4236}, publisher = {{IEEE}}, year = {2006}, url = {https://doi.org/10.1109/IEMBS.2006.259858}, doi = {10.1109/IEMBS.2006.259858}, timestamp = {Tue, 01 Jun 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/embc/Macchiarulo06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/embc/WangCMB06, author = {Xiaoyue Wang and Mingqi Chen and Luca Macchiarulo and Olga Boric{-}Lubecke}, title = {Fully-Integrated Heart Rate Variability Monitoring System with an Efficient Memory}, booktitle = {28th International Conference of the {IEEE} Engineering in Medicine and Biology Society, {EMBC} 2006, New York City, NY, USA, August 30 - September 3, 2006, Main Volume}, pages = {5064--5067}, publisher = {{IEEE}}, year = {2006}, url = {https://doi.org/10.1109/IEMBS.2006.259825}, doi = {10.1109/IEMBS.2006.259825}, timestamp = {Tue, 01 Jun 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/embc/WangCMB06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/glvlsi/TotaCM06, author = {Sergio Tota and Mario R. Casu and Luca Macchiarulo}, editor = {Gang Qu and Yehea I. Ismail and Narayanan Vijaykrishnan and Hai Zhou}, title = {Implementation analysis of NoC: a MPSoC trace-driven approach}, booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006, Philadelphia, PA, USA, April 30 - May 1, 2006}, pages = {204--209}, publisher = {{ACM}}, year = {2006}, url = {https://doi.org/10.1145/1127908.1127957}, doi = {10.1145/1127908.1127957}, timestamp = {Wed, 16 Aug 2023 21:16:32 +0200}, biburl = {https://dblp.org/rec/conf/glvlsi/TotaCM06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/CasuM05, author = {Mario R. Casu and Luca Macchiarulo}, title = {Throughput-driven floorplanning with wire pipelining}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {24}, number = {5}, pages = {663--675}, year = {2005}, url = {https://doi.org/10.1109/TCAD.2005.846371}, doi = {10.1109/TCAD.2005.846371}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/CasuM05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/CasuM05, author = {Mario R. Casu and Luca Macchiarulo}, title = {A New System Design Methodology for Wire Pipelined SoC}, booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition {(DATE} 2005), 7-11 March 2005, Munich, Germany}, pages = {944--945}, publisher = {{IEEE} Computer Society}, year = {2005}, url = {https://doi.org/10.1109/DATE.2005.25}, doi = {10.1109/DATE.2005.25}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/CasuM05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ispd/CasuM05, author = {Mario R. Casu and Luca Macchiarulo}, editor = {Patrick Groeneveld and Louis Scheffer}, title = {Floorplan assisted data rate enhancement through wire pipelining: a real assessment}, booktitle = {Proceedings of the 2005 International Symposium on Physical Design, {ISPD} 2005, San Francisco, California, USA, April 3-6, 2005}, pages = {121--128}, publisher = {{ACM}}, year = {2005}, url = {https://doi.org/10.1145/1055137.1055163}, doi = {10.1145/1055137.1055163}, timestamp = {Tue, 06 Nov 2018 11:07:46 +0100}, biburl = {https://dblp.org/rec/conf/ispd/CasuM05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/MacchiaruloSM04, author = {Luca Macchiarulo and Shih{-}Min Shu and Malgorzata Marek{-}Sadowska}, title = {Pipelining Sequential Circuits with Wave Steering}, journal = {{IEEE} Trans. Computers}, volume = {53}, number = {9}, pages = {1205--1210}, year = {2004}, url = {https://doi.org/10.1109/TC.2004.65}, doi = {10.1109/TC.2004.65}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/MacchiaruloSM04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/CasuM04, author = {Mario R. Casu and Luca Macchiarulo}, editor = {Sharad Malik and Limor Fix and Andrew B. Kahng}, title = {A new approach to latency insensitive design}, booktitle = {Proceedings of the 41th Design Automation Conference, {DAC} 2004, San Diego, CA, USA, June 7-11, 2004}, pages = {576--581}, publisher = {{ACM}}, year = {2004}, url = {https://doi.org/10.1145/996566.996725}, doi = {10.1145/996566.996725}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/dac/CasuM04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/CasuM04, author = {Mario R. Casu and Luca Macchiarulo}, title = {Issues in Implementing Latency Insensitive Protocols}, booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition {(DATE} 2004), 16-20 February 2004, Paris, France}, pages = {1390--1391}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/DATE.2004.1269102}, doi = {10.1109/DATE.2004.1269102}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/CasuM04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/glvlsi/MacchiaruloCP04, author = {Luca Macchiarulo and Consolato F. Caccamo and Davide Pandini}, editor = {David Garrett and John C. Lach and Charles A. Zukowski}, title = {A comparison between mask- and field-programmable routing structures on industrial {FPGA} architectures}, booktitle = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004, Boston, MA, USA, April 26-28, 2004}, pages = {436--439}, publisher = {{ACM}}, year = {2004}, url = {https://doi.org/10.1145/988952.989056}, doi = {10.1145/988952.989056}, timestamp = {Fri, 20 Aug 2021 16:30:37 +0200}, biburl = {https://dblp.org/rec/conf/glvlsi/MacchiaruloCP04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/CasuM04, author = {Mario R. Casu and Luca Macchiarulo}, title = {On-Chip Transparent Wire Pipelining}, booktitle = {22nd {IEEE} International Conference on Computer Design: {VLSI} in Computers {\&} Processors {(ICCD} 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings}, pages = {160--167}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/ICCD.2004.1347916}, doi = {10.1109/ICCD.2004.1347916}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/CasuM04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ispd/CasuM04, author = {Mario R. Casu and Luca Macchiarulo}, editor = {Charles J. Alpert and Patrick Groeneveld}, title = {Floorplanning for throughput}, booktitle = {Proceedings of the 2004 International Symposium on Physical Design, {ISPD} 2004, Phoenix, Arizona, USA, April 18-21, 2004}, pages = {62--69}, publisher = {{ACM}}, year = {2004}, url = {https://doi.org/10.1145/981066.981081}, doi = {10.1145/981066.981081}, timestamp = {Tue, 06 Nov 2018 11:07:46 +0100}, biburl = {https://dblp.org/rec/conf/ispd/CasuM04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mj/CiveraMRRV03, author = {Pierluigi Civera and Luca Macchiarulo and Maurizio Rebaudengo and Matteo Sonza Reorda and Massimo Violante}, title = {New techniques for efficiently assessing reliability of SOCs}, journal = {Microelectron. J.}, volume = {34}, number = {1}, pages = {53--61}, year = {2003}, url = {https://doi.org/10.1016/S0026-2692(02)00127-1}, doi = {10.1016/S0026-2692(02)00127-1}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mj/CiveraMRRV03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/SinghMMM03, author = {Amit Singh and Arindam Mukherjee and Luca Macchiarulo and Malgorzata Marek{-}Sadowska}, title = {{PITIA:} an {FPGA} for throughput-intensive applications}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {11}, number = {3}, pages = {354--363}, year = {2003}, url = {https://doi.org/10.1109/TVLSI.2003.810780}, doi = {10.1109/TVLSI.2003.810780}, timestamp = {Mon, 05 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/SinghMMM03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/et/CiveraMRRV02, author = {Pierluigi Civera and Luca Macchiarulo and Maurizio Rebaudengo and Matteo Sonza Reorda and Massimo Violante}, title = {An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits}, journal = {J. Electron. Test.}, volume = {18}, number = {3}, pages = {261--271}, year = {2002}, url = {https://doi.org/10.1023/A:1015079004512}, doi = {10.1023/A:1015079004512}, timestamp = {Fri, 11 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/et/CiveraMRRV02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/BeniniMMP02, author = {Luca Benini and Luca Macchiarulo and Alberto Macii and Massimo Poncino}, title = {Layout-driven memory synthesis for embedded systems-on-chip}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {10}, number = {2}, pages = {96--105}, year = {2002}, url = {https://doi.org/10.1109/92.994985}, doi = {10.1109/92.994985}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/BeniniMMP02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/MacchiaruloMP02, author = {Luca Macchiarulo and Enrico Macii and Massimo Poncino}, title = {Wire Placement for Crosstalk Energy Minimization in Address Buses}, booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition {(DATE} 2002), 4-8 March 2002, Paris, France}, pages = {158--162}, publisher = {{IEEE} Computer Society}, year = {2002}, url = {https://doi.org/10.1109/DATE.2002.998264}, doi = {10.1109/DATE.2002.998264}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/MacchiaruloMP02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dft/CiveraMV02, author = {Pierluigi Civera and Luca Macchiarulo and Massimo Violante}, title = {A Simplified Gate-Level Fault Model for Crosstalk Effects Analysis}, booktitle = {17th {IEEE} International Symposium on Defect and Fault-Tolerance in {VLSI} Systems {(DFT} 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings}, pages = {31--39}, publisher = {{IEEE} Computer Society}, year = {2002}, url = {https://doi.org/10.1109/DFTVS.2002.1173499}, doi = {10.1109/DFTVS.2002.1173499}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dft/CiveraMV02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/glvlsi/DonnoMMMP02, author = {Monica Donno and Luca Macchiarulo and Alberto Macii and Enrico Macii and Massimo Poncino}, editor = {Kanad Ghose and Patrick H. Madden and Vivek De and Peter M. Kogge}, title = {Enhanced clustered voltage scaling for low power}, booktitle = {Proceedings of the 12th {ACM} Great Lakes Symposium on {VLSI} 2002, New York, NY, USA, April 18-19, 2002}, pages = {18--23}, publisher = {{ACM}}, year = {2002}, url = {https://doi.org/10.1145/505306.505311}, doi = {10.1145/505306.505311}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/glvlsi/DonnoMMMP02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ats/CiveraMRRV01, author = {Pierluigi Civera and Luca Macchiarulo and Maurizio Rebaudengo and Matteo Sonza Reorda and Massimo Violante}, title = {FPGA-Based Fault Injection for Microprocessor Systems}, booktitle = {10th Asian Test Symposium {(ATS} 2001), 19-21 November 2001, Kyoto, Japan}, pages = {304}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/ATS.2001.990301}, doi = {10.1109/ATS.2001.990301}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ats/CiveraMRRV01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/BeniniMMMP01, author = {Luca Benini and Luca Macchiarulo and Alberto Macii and Enrico Macii and Massimo Poncino}, title = {From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip}, booktitle = {Proceedings of the 38th Design Automation Conference, {DAC} 2001, Las Vegas, NV, USA, June 18-22, 2001}, pages = {784--789}, publisher = {{ACM}}, year = {2001}, url = {https://doi.org/10.1145/378239.379066}, doi = {10.1145/378239.379066}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/BeniniMMMP01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/MacchiaruloBM01, author = {Luca Macchiarulo and Luca Benini and Enrico Macii}, editor = {Wolfgang Nebel and Ahmed Jerraya}, title = {On-the-fly layout generation for {PTL} macrocells}, booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe, {DATE} 2001, Munich, Germany, March 12-16, 2001}, pages = {546--551}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/DATE.2001.915077}, doi = {10.1109/DATE.2001.915077}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/MacchiaruloBM01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dft/CiveraMRRV01, author = {Pierluigi Civera and Luca Macchiarulo and Maurizio Rebaudengo and Matteo Sonza Reorda and Massimo Violante}, title = {Exploiting FPGA-Based Techniques for Fault Injection Campaigns on {VLSI} Circuits}, booktitle = {16th {IEEE} International Symposium on Defect and Fault-Tolerance in {VLSI} Systems {(DFT} 2001), 24-26 October 2001, San Francisco, CA, USA, Proceedings}, pages = {250--258}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/DFTVS.2001.966777}, doi = {10.1109/DFTVS.2001.966777}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dft/CiveraMRRV01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpl/CiveraMRRV01, author = {Pierluigi Civera and Luca Macchiarulo and Maurizio Rebaudengo and Matteo Sonza Reorda and Massimo Violante}, editor = {Gordon J. Brebner and Roger F. Woods}, title = {FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in {VLSI} Circuits}, booktitle = {Field-Programmable Logic and Applications, 11th International Conference, {FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2147}, pages = {493--502}, publisher = {Springer}, year = {2001}, url = {https://doi.org/10.1007/3-540-44687-7\_51}, doi = {10.1007/3-540-44687-7\_51}, timestamp = {Fri, 09 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpl/CiveraMRRV01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iolts/CiveraMRRV01, author = {Pierluigi Civera and Luca Macchiarulo and Maurizio Rebaudengo and Matteo Sonza Reorda and Massimo Violante}, title = {Exploiting {FPGA} for Accelerating Fault Injection Experiments}, booktitle = {7th {IEEE} International On-Line Testing Workshop {(IOLTW} 2001), 9-11 July 2001, Taormina, Italy}, pages = {9--13}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/OLT.2001.937810}, doi = {10.1109/OLT.2001.937810}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iolts/CiveraMRRV01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/islped/MacchiaruloMP01, author = {Luca Macchiarulo and Enrico Macii and Massimo Poncino}, editor = {Enrico Macii and Vivek De and Mary Jane Irwin}, title = {Low-energy for deep-submicron address buses}, booktitle = {Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001}, pages = {176--181}, publisher = {{ACM}}, year = {2001}, url = {https://doi.org/10.1145/383082.383127}, doi = {10.1145/383082.383127}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/islped/MacchiaruloMP01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/DubrovaM00a, author = {Elena Dubrova and Luca Macchiarulo}, title = {A Comment on 'Graph-Based Algorithm for Boolean Function Manipulation'}, journal = {{IEEE} Trans. Computers}, volume = {49}, number = {11}, pages = {1290--1292}, year = {2000}, url = {https://doi.org/10.1109/12.895944}, doi = {10.1109/12.895944}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/DubrovaM00a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/MacchiaruloM00, author = {Luca Macchiarulo and Malgorzata Marek{-}Sadowska}, editor = {Giovanni De Micheli}, title = {Wave-steering one-hot encoded FSMs}, booktitle = {Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000}, pages = {357--360}, publisher = {{ACM}}, year = {2000}, url = {https://doi.org/10.1145/337292.337440}, doi = {10.1145/337292.337440}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/MacchiaruloM00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/MacchiaruloSM00, author = {Luca Macchiarulo and Shih{-}Ming Shu and Malgorzata Marek{-}Sadowska}, editor = {Ivo Bolsens}, title = {Wave Steered FSMs}, booktitle = {2000 Design, Automation and Test in Europe {(DATE} 2000), 27-30 March 2000, Paris, France}, pages = {270--276}, publisher = {{IEEE} Computer Society / {ACM}}, year = {2000}, url = {https://doi.org/10.1109/DATE.2000.840283}, doi = {10.1109/DATE.2000.840283}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/MacchiaruloSM00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fpga/SinghMMM00, author = {Amit Singh and Luca Macchiarulo and Arindam Mukherjee and Malgorzata Marek{-}Sadowska}, editor = {Steve Trimberger and Scott Hauck}, title = {A novel high throughput reconfigurable {FPGA} architecture}, booktitle = {Proceedings of the {ACM/SIGDA} International Symposium on Field Programmable Gate Arrays, {FPGA} 2000, Monterey, CA, USA, February 10-11, 2000}, pages = {22--29}, publisher = {{ACM}}, year = {2000}, url = {https://doi.org/10.1145/329166.329174}, doi = {10.1145/329166.329174}, timestamp = {Mon, 05 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/fpga/SinghMMM00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsid/MacchiaruloC99, author = {Luca Macchiarulo and Pierluigi Civera}, title = {Functional Decomposition through Structural Analysis of Decision Diagrams - the Binary and Multiple-Valued Cases}, booktitle = {12th International Conference on {VLSI} Design {(VLSI} Design 1999), 10-13 January 1999, Goa, India}, pages = {218}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ICVD.1999.745151}, doi = {10.1109/ICVD.1999.745151}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/MacchiaruloC99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/captech/BellanCFLMMPR98, author = {Y. Bellan and Mario Costa and Giancarlo Ferrigno and Fabrizio Lombardi and Luca Macchiarulo and Alfonso Montuori and Eros Pasero and Camilla Rigotti}, editor = {Nadia Magnenat{-}Thalmann and Daniel Thalmann}, title = {Artificial Neural Networks for Motion Emulation in Virtual Environments}, booktitle = {Modelling and Motion Capture Techniques for Virtual Environments, International Workshop, CAPTECH'98, Geneva, Switzerland}, series = {Lecture Notes in Computer Science}, volume = {1537}, pages = {83--99}, publisher = {Springer}, year = {1998}, url = {https://doi.org/10.1007/3-540-49384-0\_7}, doi = {10.1007/3-540-49384-0\_7}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/captech/BellanCFLMMPR98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ismvl/MacchiaruloC98, author = {Luca Macchiarulo and Pierluigi Civera}, title = {Ternary Decision Diagrams with Inverted Edges and Cofactoring - An Application to Discrete Neural Networks Synthesis}, booktitle = {28th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL} 1998, Fukuoka, Japan, May 27-29, 1998, Proceedings}, pages = {58--64}, publisher = {{IEEE} Computer Society}, year = {1998}, url = {https://doi.org/10.1109/ISMVL.1998.679289}, doi = {10.1109/ISMVL.1998.679289}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ismvl/MacchiaruloC98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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