BibTeX records: Hsing-San Lee

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@article{DBLP:journals/ibmrd/EllisBDDFHLMMSK95,
  author       = {Wayne F. Ellis and
                  John E. Barth Jr. and
                  Sri Divakaruni and
                  Jeffrey H. Dreibelbis and
                  Anatol Furman and
                  Erik L. Hedberg and
                  Hsing{-}San Lee and
                  Thomas M. Maffitt and
                  Christopher P. Miller and
                  Charles H. Stapper and
                  Howard L. Kalter},
  title        = {Multipurpose {DRAM} architecture for optimal power, performance, and
                  product flexibility},
  journal      = {{IBM} J. Res. Dev.},
  volume       = {39},
  number       = {1-2},
  pages        = {51--62},
  year         = {1995},
  url          = {https://doi.org/10.1147/rd.391.0051},
  doi          = {10.1147/RD.391.0051},
  timestamp    = {Fri, 25 Feb 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ibmrd/EllisBDDFHLMMSK95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tc/StapperL92,
  author       = {Charles H. Stapper and
                  Hsing{-}San Lee},
  title        = {Synergistic Fault-Tolerance for Memory Chips},
  journal      = {{IEEE} Trans. Computers},
  volume       = {41},
  number       = {9},
  pages        = {1078--1087},
  year         = {1992},
  url          = {https://doi.org/10.1109/12.165390},
  doi          = {10.1109/12.165390},
  timestamp    = {Sat, 20 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tc/StapperL92.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}