BibTeX records: Mike Lankamp

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@article{DBLP:journals/mam/PossLYFTUJ13,
  author       = {Raphael Poss and
                  Mike Lankamp and
                  Qiang Yang and
                  Jian Fu and
                  Michiel W. van Tol and
                  Muhammad Irfan Uddin and
                  Chris R. Jesshope},
  title        = {Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency
                  management},
  journal      = {Microprocess. Microsystems},
  volume       = {37},
  number       = {8-C},
  pages        = {1090--1101},
  year         = {2013},
  url          = {https://doi.org/10.1016/j.micpro.2013.05.004},
  doi          = {10.1016/J.MICPRO.2013.05.004},
  timestamp    = {Mon, 11 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/mam/PossLYFTUJ13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/samos/PossLYFUJ13,
  author       = {Raphael Poss and
                  Mike Lankamp and
                  Qiang Yang and
                  Jian Fu and
                  Muhammad Irfan Uddin and
                  Chris R. Jesshope},
  title        = {MGSim - {A} simulation environment for multi-core research and education},
  booktitle    = {2013 International Conference on Embedded Computer Systems: Architectures,
                  Modeling, and Simulation, {SAMOS} 2013, Agios Konstantinos, Samos
                  Island, Greece, July 15-18, 2013},
  pages        = {80--87},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/SAMOS.2013.6621109},
  doi          = {10.1109/SAMOS.2013.6621109},
  timestamp    = {Mon, 11 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/samos/PossLYFUJ13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-1302-1390,
  author       = {Mike Lankamp and
                  Raphael 'kena' Poss and
                  Qiang Yang and
                  Jian Fu and
                  Muhammad Irfan Uddin and
                  Chris R. Jesshope},
  title        = {MGSim - Simulation tools for multi-core processor architectures},
  journal      = {CoRR},
  volume       = {abs/1302.1390},
  year         = {2013},
  url          = {http://arxiv.org/abs/1302.1390},
  eprinttype    = {arXiv},
  eprint       = {1302.1390},
  timestamp    = {Mon, 11 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/corr/abs-1302-1390.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsd/PossLYFTJ12,
  author       = {Raphael Poss and
                  Mike Lankamp and
                  Qiang Yang and
                  Jian Fu and
                  Michiel W. van Tol and
                  Chris R. Jesshope},
  title        = {Apple-CORE: Microgrids of {SVP} Cores - Flexible, General-Purpose,
                  Fine-Grained Hardware Concurrency Management},
  booktitle    = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme,
                  Izmir, Turkey, September 5-8, 2012},
  pages        = {501--508},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/DSD.2012.25},
  doi          = {10.1109/DSD.2012.25},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dsd/PossLYFTJ12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/rapido/PossLUSK12,
  author       = {Raphael Poss and
                  Mike Lankamp and
                  Muhammad Irfan Uddin and
                  Jaroslav Sykora and
                  Leos Kafka},
  editor       = {Daniel Gracia P{\'{e}}rez and
                  Sma{\"{\i}}l Niar and
                  Cristina Silvano and
                  Morteza Biglari{-}Abhari},
  title        = {Heterogeneous integration to simplify many-core architecture simulations},
  booktitle    = {Proceedings of the 2012 Workshop on Rapid Simulation and Performance
                  Evaluation: Methods and Tools, {RAPIDO} '12, 23 January, 2012, Paris,
                  France},
  pages        = {17--24},
  publisher    = {{ACM}},
  year         = {2012},
  url          = {https://doi.org/10.1145/2162131.2162134},
  doi          = {10.1145/2162131.2162134},
  timestamp    = {Mon, 11 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rapido/PossLUSK12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jsa/BousiasGJL09,
  author       = {Kostas Bousias and
                  Liang Guang and
                  Chris R. Jesshope and
                  Mike Lankamp},
  title        = {Implementation and evaluation of a microthread architecture},
  journal      = {J. Syst. Archit.},
  volume       = {55},
  number       = {3},
  pages        = {149--161},
  year         = {2009},
  url          = {https://doi.org/10.1016/j.sysarc.2008.07.001},
  doi          = {10.1016/J.SYSARC.2008.07.001},
  timestamp    = {Mon, 24 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/BousiasGJL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jsa/TolJLP09,
  author       = {Michiel W. van Tol and
                  Chris R. Jesshope and
                  Mike Lankamp and
                  Simon Polstra},
  title        = {An implementation of the {SANE} Virtual Processor using {POSIX} threads},
  journal      = {J. Syst. Archit.},
  volume       = {55},
  number       = {3},
  pages        = {162--169},
  year         = {2009},
  url          = {https://doi.org/10.1016/j.sysarc.2008.09.006},
  doi          = {10.1016/J.SYSARC.2008.09.006},
  timestamp    = {Mon, 24 Feb 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jsa/TolJLP09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/sigarch/JesshopeLZ09,
  author       = {Chris R. Jesshope and
                  Mike Lankamp and
                  Li Zhang},
  title        = {The implementation of an {SVP} many-core processor and the evaluation
                  of its memory architecture},
  journal      = {{SIGARCH} Comput. Archit. News},
  volume       = {37},
  number       = {2},
  pages        = {38--45},
  year         = {2009},
  url          = {https://doi.org/10.1145/1577129.1577136},
  doi          = {10.1145/1577129.1577136},
  timestamp    = {Thu, 30 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/sigarch/JesshopeLZ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/arcs/JesshopeLZ09,
  author       = {Chris R. Jesshope and
                  Mike Lankamp and
                  Li Zhang},
  editor       = {Mladen Berekovic and
                  Christian M{\"{u}}ller{-}Schloer and
                  Christian Hochberger and
                  Stephan Wong},
  title        = {Evaluating CMPs and Their Memory Architecture},
  booktitle    = {Architecture of Computing Systems - {ARCS} 2009, 22nd International
                  Conference, Delft, The Netherlands, March 10-13, 2009. Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {5455},
  pages        = {246--257},
  publisher    = {Springer},
  year         = {2009},
  url          = {https://doi.org/10.1007/978-3-642-00454-4\_24},
  doi          = {10.1007/978-3-642-00454-4\_24},
  timestamp    = {Tue, 14 May 2019 10:00:52 +0200},
  biburl       = {https://dblp.org/rec/conf/arcs/JesshopeLZ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/parco/JesshopeHLPZ09,
  author       = {Chris R. Jesshope and
                  Michael A. Hicks and
                  Mike Lankamp and
                  Raphael 'kena' Poss and
                  Li Zhang},
  editor       = {Barbara M. Chapman and
                  Fr{\'{e}}d{\'{e}}ric Desprez and
                  Gerhard R. Joubert and
                  Alain Lichnewsky and
                  Frans J. Peters and
                  Thierry Priol},
  title        = {Making multi-cores mainstream - from security to scalability},
  booktitle    = {Parallel Computing: From Multicores and GPU's to Petascale, Proceedings
                  of the conference ParCo 2009, 1-4 September 2009, Lyon, France},
  series       = {Advances in Parallel Computing},
  volume       = {19},
  pages        = {16--31},
  publisher    = {{IOS} Press},
  year         = {2009},
  url          = {https://doi.org/10.3233/978-1-60750-530-3-16},
  doi          = {10.3233/978-1-60750-530-3-16},
  timestamp    = {Wed, 23 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/parco/JesshopeHLPZ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/samos/BernardBGJLTZ08,
  author       = {Thomas A. M. Bernard and
                  Kostas Bousias and
                  Liang Guang and
                  Chris R. Jesshope and
                  Mike Lankamp and
                  Michiel W. van Tol and
                  Li Zhang},
  editor       = {Walid A. Najjar and
                  Holger Blume},
  title        = {A general model of concurrency and its implementation as many-core
                  dynamic {RISC} processors},
  booktitle    = {Proceedings of the 2008 International Conference on Embedded Computer
                  Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2008),
                  Samos, Greece, July 21-24, 2008},
  pages        = {1--9},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ICSAMOS.2008.4664840},
  doi          = {10.1109/ICSAMOS.2008.4664840},
  timestamp    = {Fri, 22 Feb 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/samos/BernardBGJLTZ08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}