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BibTeX records: Hideaki Kurata
@article{DBLP:journals/ieicet/KajiyamaSOKI08, author = {Shinya Kajiyama and Ken'ichiro Sonoda and Kazuo Otsuga and Hideaki Kurata and Kiyoshi Ishikawa}, title = {A Design of Constant-Charge-Injection Programming Scheme for {AG-AND} Flash Memories Using Array-Level Analytical Model}, journal = {{IEICE} Trans. Electron.}, volume = {91-C}, number = {4}, pages = {526--533}, year = {2008}, url = {https://doi.org/10.1093/ietele/e91-c.4.526}, doi = {10.1093/IETELE/E91-C.4.526}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/KajiyamaSOKI08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/ItohKOS08, author = {Kiyoo Itoh and Hideaki Kurata and Kenichi Osada and Tomonori Sekiguchi}, title = {Memory at {VLSI} Circuits Symposium}, journal = {{IEEE} J. Solid State Circuits}, volume = {43}, number = {4}, pages = {762--768}, year = {2008}, url = {https://doi.org/10.1109/JSSC.2008.917527}, doi = {10.1109/JSSC.2008.917527}, timestamp = {Thu, 07 Jul 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/ItohKOS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/OtsugaKNSAKK07, author = {Kazuo Otsuga and Hideaki Kurata and Satoshi Noda and Yoshitaka Sasago and Tsuyoshi Arigane and Tetsufumi Kawamura and Takashi Kobayashi}, title = {Selective-Capacitance Constant-Charge-Injection Programming Scheme for High-Speed Multilevel {AG-AND} Flash Memories}, journal = {{IEICE} Trans. Electron.}, volume = {90-C}, number = {4}, pages = {772--778}, year = {2007}, url = {https://doi.org/10.1093/ietele/e90-c.4.772}, doi = {10.1093/IETELE/E90-C.4.772}, timestamp = {Thu, 20 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/OtsugaKNSAKK07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/KurataNSOAKKKHISSITF07, author = {Hideaki Kurata and Satoshi Noda and Yoshitaka Sasago and Kazuo Otsuga and Tsuyoshi Arigane and Tetsufumi Kawamura and Takashi Kobayashi and Hitoshi Kume and Kazuki Homma and Teruhiko Ito and Yoshinori Sakamoto and Masahiro Shimizu and Yoshinori Ikeda and Osamu Tsuchiya and Kazunori Furusawa}, title = {A 126 mm\({}^{\mbox{2}}\) 4-Gb Multilevel {AG-AND} Flash Memory with Inversion-Layer-Bit-Line Technology}, journal = {{IEICE} Trans. Electron.}, volume = {90-C}, number = {11}, pages = {2146--2156}, year = {2007}, url = {https://doi.org/10.1093/ietele/e90-c.11.2146}, doi = {10.1093/IETELE/E90-C.11.2146}, timestamp = {Thu, 20 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/KurataNSOAKKKHISSITF07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/KurataOKKOSNTKT07, author = {Hideaki Kurata and Kazuo Otsuga and Akira Kotabe and Shinya Kajiyama and Taro Osabe and Yoshitaka Sasago and Shunichi Narumi and Kenji Tokami and Shiro Kamohara and Osamu Tsuchiya}, title = {Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node}, journal = {{IEEE} J. Solid State Circuits}, volume = {42}, number = {6}, pages = {1362--1369}, year = {2007}, url = {https://doi.org/10.1109/JSSC.2007.897158}, doi = {10.1109/JSSC.2007.897158}, timestamp = {Sun, 30 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/KurataOKKOSNTKT07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/KurataSKSAYTYTINKIF06, author = {Hideaki Kurata and Shunichi Saeki and Takashi Kobayashi and Yoshitaka Sasago and Tsuyoshi Arigane and Keiichi Yoshida and Yoshinori Takase and Takayuki Yoshitake and Osamu Tsuchiya and Yoshinori Ikeda and Shunichi Narumi and Michitaro Kanamitsu and Kazuto Izawa and Kazunori Furusawa}, title = {A 130-nm {CMOS} 95-mm\({}^{\mbox{2}}\) 1-Gb Multilevel AG-AND-Type Flash Memory with 10-MB/s Programming Throughput}, journal = {{IEICE} Trans. Electron.}, volume = {89-C}, number = {10}, pages = {1469--1479}, year = {2006}, url = {https://doi.org/10.1093/ietele/e89-c.10.1469}, doi = {10.1093/IETELE/E89-C.10.1469}, timestamp = {Thu, 20 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/KurataSKSAYTYTINKIF06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/KurataSKSAOK05, author = {Hideaki Kurata and Shunichi Saeki and Takashi Kobayashi and Yoshitaka Sasago and Tsuyoshi Arigane and Kazuo Otsuga and Takayuki Kawahara}, title = {Constant-charge-injection programming: a novel high-speed programming method for multilevel flash memories}, journal = {{IEEE} J. Solid State Circuits}, volume = {40}, number = {2}, pages = {523--531}, year = {2005}, url = {https://doi.org/10.1109/JSSC.2004.841019}, doi = {10.1109/JSSC.2004.841019}, timestamp = {Thu, 20 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/KurataSKSAOK05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icra/KiguchiIYKWF02, author = {Kazuo Kiguchi and Koya Iwami and Makoto Yasuda and Hideaki Kurata and Keigo Watanabe and Toshio Fukuda}, title = {Intelligent Interface and Control of an Exoskeletal Robot for Human Shoulder Motion Support Considering Subject's Arm Posture}, booktitle = {Proceedings of the 2002 {IEEE} International Conference on Robotics and Automation, {ICRA} 2002, May 11-15, 2002, Washington, DC, {USA}}, pages = {3230--3235}, publisher = {{IEEE}}, year = {2002}, url = {https://doi.org/10.1109/ROBOT.2002.1013724}, doi = {10.1109/ROBOT.2002.1013724}, timestamp = {Mon, 22 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/icra/KiguchiIYKWF02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/NozoeKTYFKNKKMK99, author = {Atsushi Nozoe and Hiroaki Kotani and Tetsuya Tsujikawa and Keiichi Yoshida and Kazunori Furusawa and Masataka Kato and Toshiaki Nishimoto and Hitoshi Kume and Hideaki Kurata and Naoki Miyamoto and Shoji Kubono and Michitaro Kanamitsu and Kenji Koda and Takeshi Nakayama and Yasuhiro Kouro and Akira Hosogane and Natsuo Ajika and Kiyoteru Kobayashi}, title = {A 256-Mb multilevel flash memory with 2-MB/s program rate for mass storage applications}, journal = {{IEEE} J. Solid State Circuits}, volume = {34}, number = {11}, pages = {1544--1550}, year = {1999}, url = {https://doi.org/10.1109/4.799861}, doi = {10.1109/4.799861}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/NozoeKTYFKNKKMK99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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