BibTeX records: Yoshinori Kumura

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@article{DBLP:journals/jssc/ShigaTSHMOFTHMNHNHDSKTWFOKKSYMSYYKHNF10,
  author       = {Hidehiro Shiga and
                  Daisaburo Takashima and
                  Shinichiro Shiratake and
                  Katsuhiko Hoya and
                  Tadashi Miyakawa and
                  Ryu Ogiwara and
                  Ryo Fukuda and
                  Ryosuke Takizawa and
                  Kosuke Hatsuda and
                  Fumiyoshi Matsuoka and
                  Yasushi Nagadomi and
                  Daisuke Hashimoto and
                  Hisaaki Nishimura and
                  Takeshi Hioka and
                  Sumiko M. Doumae and
                  Shoichi Shimizu and
                  Mitsumo Kawano and
                  Toyoki Taguchi and
                  Yohji Watanabe and
                  Shuso Fujii and
                  Tohru Ozaki and
                  Hiroyuki Kanaya and
                  Yoshinori Kumura and
                  Yoshiro Shimojo and
                  Yuki Yamada and
                  Yoshihiro Minami and
                  Susumu Shuto and
                  Koji Yamakawa and
                  Soichi Yamazaki and
                  Iwao Kunishima and
                  Takeshi Hamamoto and
                  Akihiro Nitayama and
                  Tohru Furuyama},
  title        = {A 1.6 GB/s {DDR2} 128 Mb Chain FeRAM With Scalable Octal Bitline and
                  Sensing Schemes},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {45},
  number       = {1},
  pages        = {142--152},
  year         = {2010},
  url          = {https://doi.org/10.1109/JSSC.2009.2034414},
  doi          = {10.1109/JSSC.2009.2034414},
  timestamp    = {Fri, 15 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/ShigaTSHMOFTHMNHNHDSKTWFOKKSYMSYYKHNF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/HoyaTSOMSDOKSOYKNF10,
  author       = {Katsuhiko Hoya and
                  Daisaburo Takashima and
                  Shinichiro Shiratake and
                  Ryu Ogiwara and
                  Tadashi Miyakawa and
                  Hidehiro Shiga and
                  Sumiko M. Doumae and
                  Sumito Ohtsuki and
                  Yoshinori Kumura and
                  Susumu Shuto and
                  Tohru Ozaki and
                  Koji Yamakawa and
                  Iwao Kunishima and
                  Akihiro Nitayama and
                  Shuso Fujii},
  title        = {A 64-Mb Chain FeRAM With Quad {BL} Architecture and 200 MB/s Burst
                  Mode},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {18},
  number       = {12},
  pages        = {1745--1752},
  year         = {2010},
  url          = {https://doi.org/10.1109/TVLSI.2009.2034380},
  doi          = {10.1109/TVLSI.2009.2034380},
  timestamp    = {Mon, 12 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/HoyaTSOMSDOKSOYKNF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/ShigaTSHMOFTHMNHNHDSKTWFOKKSYMSYYKHNF09,
  author       = {Hidehiro Shiga and
                  Daisaburo Takashima and
                  Shinichiro Shiratake and
                  Katsuhiko Hoya and
                  Tadashi Miyakawa and
                  Ryu Ogiwara and
                  Ryo Fukuda and
                  Ryosuke Takizawa and
                  Kosuke Hatsuda and
                  Fumiyoshi Matsuoka and
                  Yasushi Nagadomi and
                  Daisuke Hashimoto and
                  Hisaaki Nishimura and
                  Takeshi Hioka and
                  Sumiko M. Doumae and
                  Shoichi Shimizu and
                  Mitsumo Kawano and
                  Toyoki Taguchi and
                  Yohji Watanabe and
                  Shuso Fujii and
                  Tohru Ozaki and
                  Hiroyuki Kanaya and
                  Yoshinori Kumura and
                  Yoshiro Shimojo and
                  Yuki Yamada and
                  Yoshihiro Minami and
                  Susumu Shuto and
                  Koji Yamakawa and
                  Soichi Yamazaki and
                  Iwao Kunishima and
                  Takeshi Hamamoto and
                  Akihiro Nitayama and
                  Tohru Furuyama},
  title        = {A 1.6GB/s {DDR2} 128Mb chain FeRAM with scalable octal bitline and
                  sensing schemes},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
                  Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
                  2009},
  pages        = {464--465},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISSCC.2009.4977509},
  doi          = {10.1109/ISSCC.2009.4977509},
  timestamp    = {Fri, 15 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isscc/ShigaTSHMOFTHMNHNHDSKTWFOKKSYMSYYKHNF09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/HoyaTSOMSDOKSOY06,
  author       = {Katsuhiko Hoya and
                  Daisaburo Takashima and
                  Shinichiro Shiratake and
                  Ryu Ogiwara and
                  Tadashi Miyakawa and
                  Hidehiro Shiga and
                  Sumiko M. Doumae and
                  Sumito Ohtsuki and
                  Yoshinori Kumura and
                  Susumu Shuto and
                  Tohru Ozaki and
                  Koji Yamakawa and
                  Iwao Kunishima and
                  Akihiro Nitayama and
                  Shuso Fujii},
  title        = {A 64Mb Chain FeRAM with Quad-BL Architecture and 200MB/s Burst Mode},
  booktitle    = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
                  2006, Digest of Technical Papers, an Francisco, CA, USA, February
                  6-9, 2006},
  pages        = {459--466},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISSCC.2006.1696078},
  doi          = {10.1109/ISSCC.2006.1696078},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/HoyaTSOMSDOKSOY06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}