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ORCIDBibTeX records: Rainer Kress 0002
@inproceedings{DBLP:conf/date/Casale-RossiPAGHKL14,
author = {Marco Casale{-}Rossi and
Pietro Palella and
Mario Anton and
Ori Galzur and
Robert Hum and
Rainer Kress and
Paul Lo},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Panel: The world is going... analog {\&} mixed-signal! What about
EDA?},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--5},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.050},
doi = {10.7873/DATE.2014.050},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/Casale-RossiPAGHKL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Casale-RossiRBDKSS12,
author = {Marco Casale{-}Rossi and
Pierluigi Rolandi and
Andreas Bruening and
Antun Domic and
Rainer Kress and
Joseph Sawicki and
Christian Sebeke},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {Panel: What is {EDA} doing for trailing edge technologies?},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {874},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176620},
doi = {10.1109/DATE.2012.6176620},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/Casale-RossiRBDKSS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KressPS00,
author = {Rainer Kress and
Andreas Pyttel and
Alexander Sedlmeier},
editor = {Reiner W. Hartenstein and
Herbert Gr{\"{u}}nbacher},
title = {FPGA-Based Prototyping for Product Definition},
booktitle = {Field-Programmable Logic and Applications, The Roadmap to Reconfigurable
Computing, 10th International Workshop, {FPL} 2000, Villach, Austria,
August 27-30, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1896},
pages = {78--86},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44614-1\_9},
doi = {10.1007/3-540-44614-1\_9},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KressPS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/MrvaK00,
author = {Michael Mrva and
Rainer Kress},
editor = {Klaus Waldschmidt and
Christoph Grimm},
title = {Role-Centered Conceptual Modeling in System Design},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February
28 - March 1, 2000},
pages = {121--128},
publisher = {{VDE}},
year = {2000},
timestamp = {Fri, 12 Jun 2015 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/MrvaK00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/FleischmannBK99,
author = {Josef Fleischmann and
Klaus Buchenrieder and
Rainer Kress},
editor = {Mary Jane Irwin},
title = {Java Driven Codesign and Prototyping of Networked Embedded Systems},
booktitle = {Proceedings of the 36th Conference on Design Automation, New Orleans,
LA, USA, June 21-25, 1999},
pages = {794--797},
publisher = {{ACM} Press},
year = {1999},
url = {https://doi.org/10.1145/309847.310068},
doi = {10.1145/309847.310068},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/FleischmannBK99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/FleischmannBK99,
author = {Josef Fleischmann and
Klaus Buchenrieder and
Rainer Kress},
title = {Codesign of Embedded Systems Based on Java and Reconfigurable Hardware
Components},
booktitle = {1999 Design, Automation and Test in Europe {(DATE} '99), 9-12 March
1999, Munich, Germany},
pages = {768--769},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1999},
url = {https://doi.org/10.1109/DATE.1999.761222},
doi = {10.1109/DATE.1999.761222},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/FleischmannBK99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KressP99,
author = {Rainer Kress and
Andreas Pyttel},
editor = {Patrick Lysaght and
James Irvine and
Reiner W. Hartenstein},
title = {Debugging Application-Specific Programmable Products},
booktitle = {Field-Programmable Logic and Applications, 9th International Workshop,
FPL'99, Glasgow, UK, August 30 - September 1, 1999, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1673},
pages = {481--486},
publisher = {Springer},
year = {1999},
url = {https://doi.org/10.1007/978-3-540-48302-1\_57},
doi = {10.1007/978-3-540-48302-1\_57},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KressP99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/FleischmannBK98,
author = {Josef Fleischmann and
Klaus Buchenrieder and
Rainer Kress},
editor = {Gaetano Borriello and
Ahmed Amine Jerraya and
Luciano Lavagno},
title = {A hardware/software prototyping environment for dynamically reconfigurable
embedded systems},
booktitle = {Proceedings of the Sixth International Workshop on Hardware/Software
Codesign, {CODES} 1998, Seattle, Washington, USA, March 15-18, 1998},
pages = {105--109},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1145/278241.278310},
doi = {10.1145/278241.278310},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/FleischmannBK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MrvaBK98,
author = {Michael Mrva and
Klaus Buchenrieder and
Rainer Kress},
editor = {Patrick M. Dewilde and
Franz J. Rammig and
Gerry Musgrave},
title = {A Scalable Architecture for Multi-threaded {JAVA} Applications},
booktitle = {1998 Design, Automation and Test in Europe {(DATE} '98), February
23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
pages = {868--874},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/DATE.1998.655960},
doi = {10.1109/DATE.1998.655960},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MrvaBK98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KressP98,
author = {Rainer Kress and
Andreas Pyttel},
editor = {Reiner W. Hartenstein and
Andres Keevallik},
title = {High-Level Synthesis for Dynamically Reconfigurable Hardware/Software
Systems},
booktitle = {Field-Programmable Logic and Applications, From FPGAs to Computing
Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August
31 - September 3, 1998, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1482},
pages = {288--297},
publisher = {Springer},
year = {1998},
url = {https://doi.org/10.1007/BFb0055256},
doi = {10.1007/BFB0055256},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KressP98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/KressHN97,
author = {Rainer Kress and
Reiner W. Hartenstein and
Ulrich Nageldinger},
editor = {Wayne Luk and
Peter Y. K. Cheung and
Manfred Glesner},
title = {An operating system for custom computing machines based on the Xputer
paradigm},
booktitle = {Field-Programmable Logic and Applications, 7th International Workshop,
{FPL} '97, London, UK, September 1-3, 1997, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1304},
pages = {304--313},
publisher = {Springer},
year = {1997},
url = {https://doi.org/10.1007/3-540-63465-7\_235},
doi = {10.1007/3-540-63465-7\_235},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/KressHN97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:books/daglib/0083729,
author = {Rainer Kress},
title = {A fast reconfigurable {ALU} for Xputers},
school = {Kaiserslautern University of Technology, Germany},
year = {1996},
url = {https://d-nb.info/947946594},
timestamp = {Sat, 17 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/daglib/0083729.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/concurrency/HartensteinBKR96,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Rainer Kress and
Helmut Reinig},
title = {High-performance computing using a reconfigurable accelerator},
journal = {Concurr. Pract. Exp.},
volume = {8},
number = {6},
pages = {429--443},
year = {1996},
url = {https://doi.org/10.1002/(SICI)1096-9128(199607)8:6\&\#60;429::AID-CPE252\&\#62;3.0.CO;2-9},
doi = {10.1002/(SICI)1096-9128(199607)8:6\&\#60;429::AID-CPE252\&\#62;3.0.CO;2-9},
timestamp = {Thu, 21 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/concurrency/HartensteinBKR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HartensteinBHKN96,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Michael Herz and
Rainer Kress and
Ulrich Nageldinger},
title = {A Synthesis System For Bus-Based Wavefront Array Architectures},
booktitle = {1996 International Conference on Application-Specific Systems, Architectures,
and Processors {(ASAP} '96), August 19-23, 1996, Chicago, {IL} , {USA}},
pages = {274--283},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ASAP.1996.542822},
doi = {10.1109/ASAP.1996.542822},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HartensteinBHKN96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/HartensteinBK96,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Rainer Kress},
title = {Two-level Partitioning of Image Processing Algorithms for the Parallel
Map-oriented Machine},
booktitle = {Proceedings of the Forth International Workshop on Hardware/Software
Codesign, {CODES} 1996, Pittsburgh, PA, USA, March 18-20, 1996},
pages = {77--84},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/HCS.1996.492229},
doi = {10.1109/HCS.1996.492229},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/HartensteinBK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecbs/HartensteinBK96,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Rainer Kress},
title = {Two-Level Hardware/Software Partitioning Using CoDe-X},
booktitle = {{IEEE} Symposium and Workshop on Engineering of Computer Based Systems
(ECBS'96), March 11-15, 1996, Friedrichshafen, Germany},
pages = {395},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ECBS.1996.494566},
doi = {10.1109/ECBS.1996.494566},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecbs/HartensteinBK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ecrts/HartensteinBK96,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Rainer Kress},
title = {An Embedded Accelerator for Real-Time Image Processing},
booktitle = {Proceedings of the Eighth Euromicro Workshop on Real-Time Systems,
{RTS} 1996, L'Aquila, Italy, June 12-14, 1996},
pages = {83--88},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EMWRTS.1996.557821},
doi = {10.1109/EMWRTS.1996.557821},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ecrts/HartensteinBK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HartensteinBK96,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Rainer Kress},
editor = {Reiner W. Hartenstein and
Manfred Glesner},
title = {Custom Computing Machines vs. Hardware/Software Codesign: From a globalized
point of view},
booktitle = {Field-Programmable Logic, Smart Applications, New Paradigms and Compilers,
6th International Workshop on Field-Programmable Logic, {FPL} '96,
Darmstadt, Germany, September 23-25, 1996, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1142},
pages = {65--76},
publisher = {Springer},
year = {1996},
url = {https://doi.org/10.1007/3-540-61730-2\_7},
doi = {10.1007/3-540-61730-2\_7},
timestamp = {Fri, 19 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HartensteinBK96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/HartensteinBHKN96,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Michael Herz and
Rainer Kress and
Ulrich Nageldinger},
title = {A Partitioning Programming Environment for a Novel Parallel Architecture},
booktitle = {Proceedings of {IPPS} '96, The 10th International Parallel Processing
Symposium, April 15-19, 1996, Honolulu, Hawaii, {USA}},
pages = {544--548},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/IPPS.1996.508109},
doi = {10.1109/IPPS.1996.508109},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ipps/HartensteinBHKN96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HartensteinBKR96,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Rainer Kress and
Helmut Reinig},
title = {CoDe-C: {A} Novel Two-Level Hardware/Software Co-Design Framework},
booktitle = {9th International Conference on {VLSI} Design {(VLSI} Design 1996),
3-6 January 1996, Bangalore, India},
pages = {81--84},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/ICVD.1996.489461},
doi = {10.1109/ICVD.1996.489461},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HartensteinBKR96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HartensteinBKRS95,
author = {Reiner W. Hartenstein and
J{\"{u}}rgen Becker and
Rainer Kress and
Helmut Reinig and
Karin Schmidt},
title = {A Parallelizing Compilation Method for the Map-oriented Machine},
booktitle = {The International Conference on Application Specific Array Processors
(ASAP'95), July 24-26, 1995, Strasbourg, France},
pages = {129--132},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/ASAP.1995.522914},
doi = {10.1109/ASAP.1995.522914},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HartensteinBKRS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/HartensteinK95,
author = {Reiner W. Hartenstein and
Rainer Kress},
editor = {Isao Shirakawa},
title = {A datapath synthesis system for the reconfigurable datapath architecture},
booktitle = {Proceedings of the 1995 Conference on Asia Pacific Design Automation,
Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995},
publisher = {{ACM}},
year = {1995},
url = {https://doi.org/10.1145/224818.224959},
doi = {10.1145/224818.224959},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/HartensteinK95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Hartenstein0R94,
author = {Reiner W. Hartenstein and
Rainer Kress and
Helmut Reinig},
title = {A dynamically reconfigurable wavefront array architecture for evaluation
of expressions},
booktitle = {International Conference on Application Specific Array Processors,
{ASAP} 1994, Proceedings, San Francisco, CA, USA, 22-24 August, 1994},
pages = {404--414},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/ASAP.1994.331785},
doi = {10.1109/ASAP.1994.331785},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/asap/Hartenstein0R94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HartensteinKR94,
author = {Reiner W. Hartenstein and
Rainer Kress and
Helmut Reinig},
editor = {Reiner W. Hartenstein and
Michal Serv{\'{\i}}t},
title = {A New {FPGA} Architecture for Word-Oriented Datapaths},
booktitle = {Field-Programmable Logic, Architectures, Synthesis and Applications,
4th International Workshop on Field-Programmable Logic and Applications,
{FPL} '94, Prague, Czech Republic, September 7-9, 1994, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {849},
pages = {144--155},
publisher = {Springer},
year = {1994},
url = {https://doi.org/10.1007/3-540-58419-6\_85},
doi = {10.1007/3-540-58419-6\_85},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HartensteinKR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AstHKRS94,
author = {Andreas Ast and
J{\"{u}}rgen Becker and
Reiner W. Hartenstein and
Rainer Kress and
Helmut Reinig and
Karin Schmidt},
editor = {Reiner W. Hartenstein and
Michal Serv{\'{\i}}t},
title = {Data-Procedural Languages for FPL-based Machines},
booktitle = {Field-Programmable Logic, Architectures, Synthesis and Applications,
4th International Workshop on Field-Programmable Logic and Applications,
{FPL} '94, Prague, Czech Republic, September 7-9, 1994, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {849},
pages = {183--195},
publisher = {Springer},
year = {1994},
url = {https://doi.org/10.1007/3-540-58419-6\_89},
doi = {10.1007/3-540-58419-6\_89},
timestamp = {Fri, 19 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AstHKRS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/KressMHD93,
author = {Rainer Kress and
Elmar U. K. Melcher and
Reiner W. Hartenstein and
Michel Dana},
title = {{CMOS} interconnect modelling for timing analysis},
journal = {Microprocess. Microprogramming},
volume = {37},
number = {1-5},
pages = {7--10},
year = {1993},
url = {https://doi.org/10.1016/0165-6074(93)90004-5},
doi = {10.1016/0165-6074(93)90004-5},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/KressMHD93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AstHKRS92,
author = {Andreas Ast and
Reiner W. Hartenstein and
Rainer Kress and
Helmut Reinig and
Karin Schmidt},
editor = {Herbert Gr{\"{u}}nbacher and
Reiner W. Hartenstein},
title = {Novel High Performance Machine Paradigms and Fast- Turnaround {ASIC}
Design Methods},
booktitle = {Field-Programmable Gate Arrays: Architectures and Tools for Rapid
Prototyping, Second International Workshop on Field-Programmable Logic
and Applications, Vienna, Austria, August 31 - September 2, 1992,
Selected Papers},
series = {Lecture Notes in Computer Science},
volume = {705},
pages = {211--217},
publisher = {Springer},
year = {1992},
url = {https://doi.org/10.1007/3-540-57091-8\_46},
doi = {10.1007/3-540-57091-8\_46},
timestamp = {Tue, 14 May 2019 10:00:51 +0200},
biburl = {https://dblp.org/rec/conf/fpga/AstHKRS92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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