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ORCIDBibTeX records: Ivan S. Kourtev
@article{DBLP:journals/jcsc/TaskinK09,
author = {Baris Taskin and
Ivan S. Kourtev},
title = {Multi-Phase Rotary Clock Synchronization of Level-Sensitive Circuits},
journal = {J. Circuits Syst. Comput.},
volume = {18},
number = {5},
pages = {899--908},
year = {2009},
url = {https://doi.org/10.1142/S0218126609005423},
doi = {10.1142/S0218126609005423},
timestamp = {Tue, 25 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jcsc/TaskinK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/LucasHKJ06,
author = {Joshua M. Lucas and
Raymond Hoare and
Ivan S. Kourtev and
Alex K. Jones},
title = {Technology mapping for Field Programmable Gate Arrays using Content-Addressable
Memory {(CAM)}},
journal = {Microprocess. Microsystems},
volume = {30},
number = {7},
pages = {445--456},
year = {2006},
url = {https://doi.org/10.1016/j.micpro.2006.04.002},
doi = {10.1016/J.MICPRO.2006.04.002},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mam/LucasHKJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TaskinK06,
author = {Baris Taskin and
Ivan S. Kourtev},
title = {Delay Insertion Method in Clock Skew Scheduling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {25},
number = {4},
pages = {651--663},
year = {2006},
url = {https://doi.org/10.1109/TCAD.2006.870072},
doi = {10.1109/TCAD.2006.870072},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TaskinK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/HoareKJ06,
author = {Raymond R. Hoare and
Ivan S. Kourtev and
Alex K. Jones},
title = {Technology Mapping for Field Programmable Gate Arrays using Content-Addressable
Memory {(CAM)}},
booktitle = {14th {IEEE} Symposium on Field-Programmable Custom Computing Machines
{(FCCM} 2006), 24-26 April 2006, Napa, CA, USA, Proceedings},
pages = {299--300},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/FCCM.2006.68},
doi = {10.1109/FCCM.2006.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/HoareKJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/TaskinK05,
author = {Baris Taskin and
Ivan S. Kourtev},
editor = {Patrick Groeneveld and
Louis Scheffer},
title = {Delay insertion method in clock skew scheduling},
booktitle = {Proceedings of the 2005 International Symposium on Physical Design,
{ISPD} 2005, San Francisco, California, USA, April 3-6, 2005},
pages = {47--54},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1055137.1055149},
doi = {10.1145/1055137.1055149},
timestamp = {Tue, 06 Nov 2018 11:07:46 +0100},
biburl = {https://dblp.org/rec/conf/ispd/TaskinK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/TaskinK04,
author = {Baris Taskin and
Ivan S. Kourtev},
title = {Linearization of the timing analysis and optimization of level-sensitive
digital synchronous circuits},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {1},
pages = {12--27},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2003.820525},
doi = {10.1109/TVLSI.2003.820525},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/TaskinK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SecareanuWSBBWMSTKF04,
author = {Radu M. Secareanu and
Scott Warner and
Scott Seabridge and
Cathie Burke and
Juan Becerra and
Thomas E. Watrobski and
Christopher Morton and
William Staub and
Thomas Tellier and
Ivan S. Kourtev and
Eby G. Friedman},
title = {Substrate coupling in digital circuits in mixed-signal smart-power
systems},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {1},
pages = {67--78},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2003.820526},
doi = {10.1109/TVLSI.2003.820526},
timestamp = {Fri, 10 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/SecareanuWSBBWMSTKF04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/BradyJK04,
author = {Bryan A. Brady and
Alex K. Jones and
Ivan S. Kourtev},
title = {Efficient {CAD} development for emerging technologies using Objective-C
and Cocoa},
booktitle = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
2004},
pages = {369--372},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ICECS.2004.1399695},
doi = {10.1109/ICECS.2004.1399695},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/BradyJK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/JonesHKFKFBM04,
author = {Alex K. Jones and
Raymond Hoare and
Ivan S. Kourtev and
Joshua Fazekas and
Dara Kusic and
John Foster and
Sedric Boddie and
Ahmed Muaydh},
title = {A 64-way {VLIW/SIMD} {FPGA} architecture and design flow},
booktitle = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
2004},
pages = {499--502},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ICECS.2004.1399727},
doi = {10.1109/ICECS.2004.1399727},
timestamp = {Thu, 13 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/JonesHKFKFBM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/LucasHKJ04,
author = {Joshua M. Lucas and
Raymond R. Hoare and
Ivan S. Kourtev and
Alex K. Jones},
title = {{LURU:} global-scope {FPGA} technology mapping with content-addressable
memories},
booktitle = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
2004},
pages = {599--602},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ICECS.2004.1399752},
doi = {10.1109/ICECS.2004.1399752},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/LucasHKJ04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/TaskinK04,
author = {Baris Taskin and
Ivan S. Kourtev},
title = {Advanced timing of level-sensitive sequential circuits},
booktitle = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
2004},
pages = {603--606},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ICECS.2004.1399753},
doi = {10.1109/ICECS.2004.1399753},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/TaskinK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/TaskinK04a,
author = {Baris Taskin and
Ivan S. Kourtev},
title = {Performance improvement of edge-triggered sequential circuits},
booktitle = {Proceedings of the 2004 11th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2004, Tel Aviv, Israel, December 13-15,
2004},
pages = {607--610},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ICECS.2004.1399754},
doi = {10.1109/ICECS.2004.1399754},
timestamp = {Tue, 23 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/TaskinK04a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ParthasarthyK04,
author = {Rajani Parthasarthy and
Ivan S. Kourtev},
title = {Performance metrics for asynchronous digital circuits applicable to
computer-aided design},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {301--304},
publisher = {{IEEE}},
year = {2004},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ParthasarthyK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TaskinK04,
author = {Baris Taskin and
Ivan S. Kourtev},
title = {Time borrowing and clock skew scheduling effects on multi-phase level-sensitive
circuits},
booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems,
{ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
pages = {617--620},
publisher = {{IEEE}},
year = {2004},
timestamp = {Fri, 20 May 2016 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TaskinK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaderK03,
author = {Roy Mader and
Ivan S. Kourtev},
editor = {Mircea R. Stan and
David Garrett and
Kazuo Nakajima},
title = {Reduced dynamic swing domino logic},
booktitle = {Proceedings of the 13th {ACM} Great Lakes Symposium on {VLSI} 2003,
Washington, DC, USA, April 28-29, 2003},
pages = {33--36},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/764808.764817},
doi = {10.1145/764808.764817},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MaderK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/SchmitKKKVL03,
author = {Herman Schmit and
Thomas Kroll and
Max Khusid and
Ivan S. Kourtev and
Narayanan Vijaykrishnan and
David L. Landis},
title = {The Sandbox Design Experience Course},
booktitle = {2003 International Conference on Microelectronics Systems Education,
{MSE} 2003, Educating Tomorrow's Microsystems Designers, Anaheim,
CA, USA, June 1-2, 2003},
pages = {39--40},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/MSE.2003.1205245},
doi = {10.1109/MSE.2003.1205245},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mse/SchmitKKKVL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/KourtevHLCCCL03,
author = {Ivan S. Kourtev and
Raymond R. Hoare and
Steven P. Levitan and
Tom Cain and
Bruce R. Childers and
Donald M. Chiarulli and
David L. Landis},
title = {Short Courses in System-on-a-Chip (SoC) Design},
booktitle = {2003 International Conference on Microelectronics Systems Education,
{MSE} 2003, Educating Tomorrow's Microsystems Designers, Anaheim,
CA, USA, June 1-2, 2003},
pages = {126--127},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/MSE.2003.1205285},
doi = {10.1109/MSE.2003.1205285},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mse/KourtevHLCCCL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jcsc/VelenisTKABF02,
author = {Dimitrios Velenis and
Kevin T. Tang and
Ivan S. Kourtev and
Victor Adler and
Franklin Baez and
Eby G. Friedman},
title = {Demonstration of Speed and Power Enhancements on an Industrial Circuit
Through Application of Clock Skew Scheduling},
journal = {J. Circuits Syst. Comput.},
volume = {11},
number = {3},
pages = {231--246},
year = {2002},
url = {https://doi.org/10.1142/S0218126602000410},
doi = {10.1142/S0218126602000410},
timestamp = {Mon, 18 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jcsc/VelenisTKABF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MaderFLK02,
author = {Roy Mader and
Eby G. Friedman and
Ami Litman and
Ivan S. Kourtev},
title = {Large scale clock skew scheduling techniques for improved reliability
of digital synchronous {VLSI} circuits},
booktitle = {Proceedings of the 2002 International Symposium on Circuits and Systems,
{ISCAS} 2002, Scottsdale, Arizona, USA, May 26-29, 2002},
pages = {357--360},
publisher = {{IEEE}},
year = {2002},
url = {https://doi.org/10.1109/ISCAS.2002.1009851},
doi = {10.1109/ISCAS.2002.1009851},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MaderFLK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/tau/TaskinK02,
author = {Baris Taskin and
Ivan S. Kourtev},
editor = {David P. LaPotin and
Charles J. Alpert and
John Lillis},
title = {Performance optimization of single-phase level-sensitive circuits
using time borrowing and non-zero clock skew},
booktitle = {Proceedings of the 8th {ACM/IEEE} International Workshop on Timing
Issues in the Specification and Synthesis of Digital Systems, Monterey,
California, USA, December 2-3, 2002},
pages = {111--118},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/589411.589437},
doi = {10.1145/589411.589437},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/tau/TaskinK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/JohnsonK01,
author = {Troy A. Johnson and
Ivan S. Kourtev},
title = {A single latch, high speed double-edge triggered flip-flop {(DETFF)}},
booktitle = {Proceedings of the 2001 8th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2001, Malta, September 2-5, 2001},
pages = {189--192},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ICECS.2001.957712},
doi = {10.1109/ICECS.2001.957712},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/JohnsonK01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/VelenisTKABF01,
author = {Dimitrios Velenis and
Kevin T. Tang and
Ivan S. Kourtev and
Victor Adler and
Franklin Baez and
Eby G. Friedman},
title = {Demonstration of speed enhancements on an industrial circuit through
application of non-zero clock skew scheduling},
booktitle = {Proceedings of the 2001 8th {IEEE} International Conference on Electronics,
Circuits and Systems, {ICECS} 2001, Malta, September 2-5, 2001},
pages = {1021--1025},
publisher = {{IEEE}},
year = {2001},
url = {https://doi.org/10.1109/ICECS.2001.957650},
doi = {10.1109/ICECS.2001.957650},
timestamp = {Mon, 18 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/VelenisTKABF01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SecareanuKBWMSTF99,
author = {Radu M. Secareanu and
Ivan S. Kourtev and
Juan Becerra and
Thomas E. Watrobski and
Christopher Morton and
William Staub and
Thomas Tellier and
Eby G. Friedman},
title = {Noise Immunity of Digital Circuits in Mixed-Signal Smart Power Systems},
booktitle = {9th Great Lakes Symposium on {VLSI} {(GLS-VLSI} '99), 4-6 March 1999,
Ann Arbor, MI, {USA}},
pages = {314--317},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/GLSV.1999.757441},
doi = {10.1109/GLSV.1999.757441},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SecareanuKBWMSTF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/KourtevF99,
author = {Ivan S. Kourtev and
Eby G. Friedman},
editor = {Jacob K. White and
Ellen Sentovich},
title = {Clock skew scheduling for improved reliability via quadratic programming},
booktitle = {Proceedings of the 1999 {IEEE/ACM} International Conference on Computer-Aided
Design, 1999, San Jose, California, USA, November 7-11, 1999},
pages = {239--243},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICCAD.1999.810655},
doi = {10.1109/ICCAD.1999.810655},
timestamp = {Mon, 08 May 2023 21:43:38 +0200},
biburl = {https://dblp.org/rec/conf/iccad/KourtevF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:reference/vlsi/KourtevF99,
author = {Ivan S. Kourtev and
Eby G. Friedman},
editor = {Wai{-}Kai Chen},
title = {System Timing},
booktitle = {The {VLSI} Handbook},
publisher = {{CRC} Press},
year = {1999},
url = {https://doi.org/10.1201/9781420049671.ch47},
doi = {10.1201/9781420049671.CH47},
timestamp = {Wed, 12 Jul 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/reference/vlsi/KourtevF99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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