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ORCIDBibTeX records: Masaya Kibune
@inproceedings{DBLP:conf/iconip/KibuneL17,
author = {Masaya Kibune and
Michael G. Lee},
editor = {Derong Liu and
Shengli Xie and
Yuanqing Li and
Dongbin Zhao and
El{-}Sayed M. El{-}Alfy},
title = {Efficient Learning Algorithm Using Compact Data Representation in
Neural Networks},
booktitle = {Neural Information Processing - 24th International Conference, {ICONIP}
2017, Guangzhou, China, November 14-18, 2017, Proceedings, Part {II}},
series = {Lecture Notes in Computer Science},
volume = {10635},
pages = {315--324},
publisher = {Springer},
year = {2017},
url = {https://doi.org/10.1007/978-3-319-70096-0\_33},
doi = {10.1007/978-3-319-70096-0\_33},
timestamp = {Tue, 14 May 2019 10:00:42 +0200},
biburl = {https://dblp.org/rec/conf/iconip/KibuneL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LiangJSKT15,
author = {Joshua Liang and
Mohammad Sadegh Jalali and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {On-Chip Measurement of Clock and Data Jitter With Sub-Picosecond Accuracy
for 10 Gb/s Multilane CDRs},
journal = {{IEEE} J. Solid State Circuits},
volume = {50},
number = {4},
pages = {845--855},
year = {2015},
url = {https://doi.org/10.1109/JSSC.2014.2378280},
doi = {10.1109/JSSC.2014.2378280},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LiangJSKT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/JalaliSKT15,
author = {Mohammad Sadegh Jalali and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {A Reference-Less Single-Loop Half-Rate Binary {CDR}},
journal = {{IEEE} J. Solid State Circuits},
volume = {50},
number = {9},
pages = {2037--2047},
year = {2015},
url = {https://doi.org/10.1109/JSSC.2015.2429714},
doi = {10.1109/JSSC.2015.2429714},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/JalaliSKT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/JalaliTLSKT15,
author = {Mohammad Sadegh Jalali and
Clifford Ting and
Joshua Liang and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {A 3x blind ADC-based {CDR} for a 20 dB loss channel},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {62-I},
number = {6},
pages = {1658--1667},
year = {2015},
url = {https://doi.org/10.1109/TCSI.2015.2418839},
doi = {10.1109/TCSI.2015.2418839},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/JalaliTLSKT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ChenKTHASEIAATS15,
author = {Yanfei Chen and
Masaya Kibune and
Asako Toda and
Akinori Hayakawa and
Tomoyuki Akiyama and
Shigeaki Sekiguchi and
Hiroji Ebe and
Nobuhiro Imaizumi and
Tomoyuki Akahoshi and
Suguru Akiyama and
Shinsuke Tanaka and
Takasi Simoyama and
Ken Morito and
Takuji Yamamoto and
Toshihiko Mori and
Yoichi Koyanagi and
Hirotaka Tamura},
title = {22.2 {A} 25Gb/s hybrid integrated silicon photonic transceiver in
28nm {CMOS} and {SOI}},
booktitle = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
2015, Digest of Technical Papers, San Francisco, CA, USA, February
22-26, 2015},
pages = {1--3},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ISSCC.2015.7063096},
doi = {10.1109/ISSCC.2015.7063096},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/ChenKTHASEIAATS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ofc/HayakawaKTTSCAO15,
author = {Akinori Hayakawa and
Masaya Kibune and
Asako Toda and
Shinsuke Tanaka and
Takasi Simoyama and
Yanfei Chen and
Tomoyuki Akiyama and
Shigekazu Okumura and
Takeshi Baba and
Tomoyuki Akahoshi and
Seiji Ueno and
Kazunori Maruyama and
Masahiko Imai and
Jian Hong Jiang and
Pradip Thachile and
Tamer Riad and
Shigeaki Sekiguchi and
Suguru Akiyama and
Yu Tanaka and
Ken Morito and
Daisuke Mizutani and
Toshihiko Mori and
Takuji Yamamoto and
Hiroji Ebe},
title = {A 25 Gbps silicon photonic transmitter and receiver with a bridge
structure for {CPU} interconnects},
booktitle = {Optical Fiber Communications Conference and Exhibition, {OFC} 2015,
Los Angeles, CA, USA, March 22-26, 2015},
pages = {1--3},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1364/OFC.2015.Th1G.2},
doi = {10.1364/OFC.2015.TH1G.2},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/ofc/HayakawaKTTSCAO15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/ShivnaraineJSKT14,
author = {Ravi Shivnaraine and
Mohammad Sadegh Jalali and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {An 8-11 Gb/s Reference-Less Bang-Bang {CDR} Enabled by "Phase
Reset"},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {61-I},
number = {7},
pages = {2129--2138},
year = {2014},
url = {https://doi.org/10.1109/TCSI.2014.2304668},
doi = {10.1109/TCSI.2014.2304668},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/ShivnaraineJSKT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/TingJSKT14,
author = {Clifford Ting and
Mohammad Sadegh Jalali and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {A blind ADC-based {CDR} with digital data interpolation and adaptive
{CTLE} and {DFE}},
booktitle = {Proceedings of the {IEEE} 2014 Custom Integrated Circuits Conference,
{CICC} 2014, San Jose, CA, USA, September 15-17, 2014},
pages = {1--4},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/CICC.2014.6946102},
doi = {10.1109/CICC.2014.6946102},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/TingJSKT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsic/LiangJSKT14,
author = {Joshua Liang and
Mohammad Sadegh Jalali and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {On-chip measurement of data jitter with sub-picosecond accuracy for
10Gb/s multilane CDRs},
booktitle = {Symposium on {VLSI} Circuits, {VLSIC} 2014, Digest of Technical Papers,
Honolulu, HI, USA, June 10-13, 2014},
pages = {1--2},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/VLSIC.2014.6858401},
doi = {10.1109/VLSIC.2014.6858401},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/vlsic/LiangJSKT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TingLSKT13,
author = {Clifford Ting and
Joshua Liang and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {A Blind Baud-Rate ADC-Based {CDR}},
journal = {{IEEE} J. Solid State Circuits},
volume = {48},
number = {12},
pages = {3285--3295},
year = {2013},
url = {https://doi.org/10.1109/JSSC.2013.2279023},
doi = {10.1109/JSSC.2013.2279023},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TingLSKT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/JalaliSSKT13,
author = {Mohammad Sadegh Jalali and
Ravi Shivnaraine and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {An 8mW frequency detector for 10Gb/s half-rate {CDR} using clock phase
selection},
booktitle = {Proceedings of the {IEEE} 2013 Custom Integrated Circuits Conference,
{CICC} 2013, San Jose, CA, USA, September 22-25, 2013},
pages = {1--8},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/CICC.2013.6658407},
doi = {10.1109/CICC.2013.6658407},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/JalaliSSKT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TingLSKT13,
author = {Clifford Ting and
Joshua Liang and
Ali Sheikholeslami and
Masaya Kibune and
Hirotaka Tamura},
title = {A blind baud-rate ADC-based {CDR}},
booktitle = {2013 {IEEE} International Solid-State Circuits Conference - Digest
of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
17-21, 2013},
pages = {122--123},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISSCC.2013.6487664},
doi = {10.1109/ISSCC.2013.6487664},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/TingLSKT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/AbiriSTK11,
author = {Behrooz Abiri and
Ali Sheikholeslami and
Hirotaka Tamura and
Masaya Kibune},
title = {An Adaptation Engine for a 2x Blind ADC-Based {CDR} in 65 nm {CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {46},
number = {12},
pages = {3140--3149},
year = {2011},
url = {https://doi.org/10.1109/JSSC.2011.2169183},
doi = {10.1109/JSSC.2011.2169183},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/AbiriSTK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/AbiriSSTK11,
author = {Behrooz Abiri and
Ravi Shivnaraine and
Ali Sheikholeslami and
Hirotaka Tamura and
Masaya Kibune},
title = {A 1-to-6Gb/s phase-interpolator-based burst-mode {CDR} in 65nm {CMOS}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
2011},
pages = {154--156},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSCC.2011.5746261},
doi = {10.1109/ISSCC.2011.5746261},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/AbiriSSTK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/ShahramianTSTK11,
author = {Shayan Shahramian and
Clifford Ting and
Ali Sheikholeslami and
Hirotaka Tamura and
Masaya Kibune},
title = {A pattern-guided adaptive equalizer in 65nm {CMOS}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
2011},
pages = {354--356},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSCC.2011.5746351},
doi = {10.1109/ISSCC.2011.5746351},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/ShahramianTSTK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/AbiriSTK11,
author = {Behrooz Abiri and
Ali Sheikholeslami and
Hirotaka Tamura and
Masaya Kibune},
title = {A 5Gb/s adaptive {DFE} for 2x blind ADC-based {CDR} in 65nm {CMOS}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
2011},
pages = {436--438},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISSCC.2011.5746386},
doi = {10.1109/ISSCC.2011.5746386},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/AbiriSTK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/ChenZTKTHYITOTK10,
author = {Yanfei Chen and
Xiaolei Zhu and
Hirotaka Tamura and
Masaya Kibune and
Yasumoto Tomita and
Takayuki Hamada and
Masato Yoshioka and
Kiyoshi Ishikawa and
Takeshi Takayama and
Junji Ogawa and
Sanroku Tsukamoto and
Tadahiro Kuroda},
title = {Split Capacitor {DAC} Mismatch Calibration in Successive Approximation
{ADC}},
journal = {{IEICE} Trans. Electron.},
volume = {93-C},
number = {3},
pages = {295--302},
year = {2010},
url = {https://doi.org/10.1587/transele.E93.C.295},
doi = {10.1587/TRANSELE.E93.C.295},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/ChenZTKTHYITOTK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/ZhuCKTHTTK10,
author = {Xiaolei Zhu and
Yanfei Chen and
Masaya Kibune and
Yasumoto Tomita and
Takayuki Hamada and
Hirotaka Tamura and
Sanroku Tsukamoto and
Tadahiro Kuroda},
title = {A Dynamic Offset Control Technique for Comparator Design in Scaled
{CMOS} Technology},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {93-A},
number = {12},
pages = {2456--2462},
year = {2010},
url = {https://doi.org/10.1587/transfun.E93.A.2456},
doi = {10.1587/TRANSFUN.E93.A.2456},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/ZhuCKTHTTK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TyshchenkoSTKYO10,
author = {Oleksiy Tyshchenko and
Ali Sheikholeslami and
Hirotaka Tamura and
Masaya Kibune and
Hisakatsu Yamaguchi and
Junji Ogawa},
title = {A 5-Gb/s ADC-Based Feed-Forward {CDR} in 65 nm {CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {45},
number = {6},
pages = {1091--1098},
year = {2010},
url = {https://doi.org/10.1109/JSSC.2010.2047156},
doi = {10.1109/JSSC.2010.2047156},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TyshchenkoSTKYO10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/NedovicKPRMTKYMKDITYSTHSIKTOW10,
author = {Nikola Nedovic and
Anders Kristensson and
Samir Parikh and
Subodh M. Reddy and
Scott McLeod and
Nestoras Tzartzanis and
Kouichi Kanda and
Takuji Yamamoto and
Satoshi Matsubara and
Masaya Kibune and
Yoshiyasu Doi and
Satoshi Ide and
Yukito Tsunoda and
Tetsuji Yamabana and
Takayuki Shibasaki and
Yasumoto Tomita and
Takayuki Hamada and
Mariko Sugawara and
Tadashi Ikeuchi and
Naoki Kuwata and
Hirotaka Tamura and
Junji Ogawa and
William W. Walker},
title = {A 3 Watt 39.8-44.6 Gb/s Dual-Mode {SFI5.2} SerDes Chip Set in 65 nm
{CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {45},
number = {10},
pages = {2016--2029},
year = {2010},
url = {https://doi.org/10.1109/JSSC.2010.2057970},
doi = {10.1109/JSSC.2010.2057970},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/NedovicKPRMTKYMKDITYSTHSIKTOW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/TahmoureszadehSSTTK10,
author = {Tina Tahmoureszadeh and
Siamak Sarvari and
Ali Sheikholeslami and
Hirotaka Tamura and
Yasumoto Tomita and
Masaya Kibune},
editor = {Jacqueline Snyder and
Rakesh Patel and
Tom Andre},
title = {A combined anti-aliasing filter and 2-tap {FFE} in 65-nm {CMOS} for
2{\texttimes} blind 2-;10 Gb/s ADC-based receivers},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2010, San Jose,
California, USA, 19-22 September, 2010, Proceedings},
pages = {1--4},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/CICC.2010.5617602},
doi = {10.1109/CICC.2010.5617602},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/TahmoureszadehSSTTK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TyshchenkoSTTYKY10,
author = {Oleksiy Tyshchenko and
Ali Sheikholeslami and
Hirotaka Tamura and
Yasumoto Tomita and
Hisakatsu Yamaguchi and
Masaya Kibune and
Takuji Yamamoto},
title = {A fractional-sampling-rate ADC-based {CDR} with feedforward architecture
in 65nm {CMOS}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
2010},
pages = {166--167},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISSCC.2010.5434004},
doi = {10.1109/ISSCC.2010.5434004},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/TyshchenkoSTTYKY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/YamaguchiTDTHKOTTSHOSIG10,
author = {Hisakatsu Yamaguchi and
Hirotaka Tamura and
Yoshiyasu Doi and
Yasumoto Tomita and
Takayuki Hamada and
Masaya Kibune and
Shuhei Ohmoto and
Keita Tateishi and
Oleksiy Tyshchenko and
Ali Sheikholeslami and
Tomokazu Higuchi and
Junji Ogawa and
Tamio Saito and
Hideki Ishida and
Kohtaroh Gotoh},
title = {A 5Gb/s transceiver with an ADC-based feedforward {CDR} and {CMA}
adaptive equalizer in 65nm {CMOS}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
2010},
pages = {168--169},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/ISSCC.2010.5434001},
doi = {10.1109/ISSCC.2010.5434001},
timestamp = {Wed, 17 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isscc/YamaguchiTDTHKOTTSHOSIG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KandaTYMKDSTKPI09,
author = {Kouichi Kanda and
Hirotaka Tamura and
Takuji Yamamoto and
Satoshi Matsubara and
Masaya Kibune and
Yoshiyasu Doi and
Takayuki Shibasaki and
Nestoras Tzartzanis and
Anders Kristensson and
Samir Parikh and
Satoshi Ide and
Yukito Tsunoda and
Tetsuji Yamabana and
Mariko Sugawara and
Naoki Kuwata and
Tadashi Ikeuchi and
Junji Ogawa and
William W. Walker},
title = {A Single-40 Gb/s Dual-20 Gb/s Serializer {IC} With {SFI-5.2} Interface
in 65 nm {CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {44},
number = {12},
pages = {3580--3589},
year = {2009},
url = {https://doi.org/10.1109/JSSC.2009.2031030},
doi = {10.1109/JSSC.2009.2031030},
timestamp = {Sun, 30 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/KandaTYMKDSTKPI09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/ChenZTKTHYITOTK09,
author = {Yanfei Chen and
Xiaolei Zhu and
Hirotaka Tamura and
Masaya Kibune and
Yasumoto Tomita and
Takayuki Hamada and
Masato Yoshioka and
Kiyoshi Ishikawa and
Takeshi Takayama and
Junji Ogawa and
Sanroku Tsukamoto and
Tadahiro Kuroda},
title = {Split capacitor {DAC} mismatch calibration in successive approximation
{ADC}},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2009, San Jose,
California, USA, 13-16 September, 2009, Proceedings},
pages = {279--282},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/CICC.2009.5280859},
doi = {10.1109/CICC.2009.5280859},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/ChenZTKTHYITOTK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/KandaTYMKDSTKPIYYSKIOW09,
author = {Kouichi Kanda and
Hirotaka Tamura and
Takuji Yamamoto and
Satoshi Matsubara and
Masaya Kibune and
Yoshiyasu Doi and
Takayuki Shibasaki and
Nestoras Tzartzanis and
Anders Kristensson and
Samir Parikh and
Satoshi Ide and
Yukito Tsunoda and
Tetsuji Yamabana and
Mariko Sugawara and
Naoki Kuwata and
Tadashi Ikeuchi and
Junji Ogawa and
William W. Walker},
title = {A single-40Gb/s dual-20Gb/s serializer {IC} with {SFI-5.2} interface
in 65nm {CMOS}},
booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
2009},
pages = {360--361},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/ISSCC.2009.4977457},
doi = {10.1109/ISSCC.2009.4977457},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isscc/KandaTYMKDSTKPIYYSKIOW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/ZhuCKTHTTK08,
author = {Xiaolei Zhu and
Yanfei Chen and
Masaya Kibune and
Yasumoto Tomita and
Takayuki Hamada and
Hirotaka Tamura and
Sanroku Tsukamoto and
Tadahiro Kuroda},
title = {A dynamic offset control technique for comparator design in scaled
{CMOS} technology},
booktitle = {Proceedings of the {IEEE} 2008 Custom Integrated Circuits Conference,
{CICC} 2008, DoubleTree Hotel, San Jose, California, USA, September
21-24, 2008},
pages = {495--498},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/CICC.2008.4672130},
doi = {10.1109/CICC.2008.4672130},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/cicc/ZhuCKTHTTK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TomitaTKOGK07,
author = {Yasumoto Tomita and
Hirotaka Tamura and
Masaya Kibune and
Junji Ogawa and
Kohtaroh Gotoh and
Tadahiro Kuroda},
title = {A 20-Gb/s Simultaneous Bidirectional Transceiver Using a Resistor-Transconductor
Hybrid in 0.11-{\(\mathrm{\mu}\)}m {CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {42},
number = {3},
pages = {627--636},
year = {2007},
url = {https://doi.org/10.1109/JSSC.2006.891719},
doi = {10.1109/JSSC.2006.891719},
timestamp = {Sat, 31 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TomitaTKOGK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieicet/TamuraKYKGIO06,
author = {Hirotaka Tamura and
Masaya Kibune and
Hisakatsu Yamaguchi and
Kouichi Kanda and
Kohtaroh Gotoh and
Hideki Ishida and
Junji Ogawa},
title = {Circuits for {CMOS} High-Speed {I/O} in Sub-100 nm Technologies},
journal = {{IEICE} Trans. Electron.},
volume = {89-C},
number = {3},
pages = {300--313},
year = {2006},
url = {https://doi.org/10.1093/ietele/e89-c.3.300},
doi = {10.1093/IETELE/E89-C.3.300},
timestamp = {Sat, 11 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieicet/TamuraKYKGIO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/TomitaTKOGK06,
author = {Yasumoto Tomita and
Hirotaka Tamura and
Masaya Kibune and
Junji Ogawa and
Kohtaroh Gotoh and
Tadahiro Kuroda},
title = {A 20Gb/s Bidirectional Transceiver Using a Resistor-Transconductor
Hybrid},
booktitle = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
2006, Digest of Technical Papers, an Francisco, CA, USA, February
6-9, 2006},
pages = {2102--2111},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISSCC.2006.1696270},
doi = {10.1109/ISSCC.2006.1696270},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/isscc/TomitaTKOGK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/HigashiMKMCDYTI05,
author = {Hirohito Higashi and
Syunitirou Masaki and
Masaya Kibune and
Satoshi Matsubara and
Takaya Chiba and
Yoshiyasu Doi and
Hisakatsu Yamaguchi and
Hideki Takauchi and
Hideki Ishida and
Kohtaroh Gotoh and
Hirotaka Tamura},
title = {A 5-6.4-Gb/s 12-channel transceiver with pre-emphasis and equalization},
journal = {{IEEE} J. Solid State Circuits},
volume = {40},
number = {4},
pages = {978--985},
year = {2005},
url = {https://doi.org/10.1109/JSSC.2005.845562},
doi = {10.1109/JSSC.2005.845562},
timestamp = {Wed, 02 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/HigashiMKMCDYTI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TomitaKOWTK05,
author = {Yasumoto Tomita and
Masaya Kibune and
Junji Ogawa and
William W. Walker and
Hirotaka Tamura and
Tadahiro Kuroda},
title = {A 10-Gb/s receiver with series equalizer and on-chip {ISI} monitor
in 0.11-{\(\mu\)}m {CMOS}},
journal = {{IEEE} J. Solid State Circuits},
volume = {40},
number = {4},
pages = {986--993},
year = {2005},
url = {https://doi.org/10.1109/JSSC.2005.845563},
doi = {10.1109/JSSC.2005.845563},
timestamp = {Mon, 14 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/TomitaKOWTK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/OkaniwaTKYCOTWK05,
author = {Yusuke Okaniwa and
Hirotaka Tamura and
Masaya Kibune and
Daisuke Yamazaki and
Tsz{-}Shing Cheung and
Junji Ogawa and
Nestoras Tzartzanis and
William W. Walker and
Tadahiro Kuroda},
title = {A 40-Gb/s {CMOS} clocked comparator with bandwidth modulation technique},
journal = {{IEEE} J. Solid State Circuits},
volume = {40},
number = {8},
pages = {1680--1687},
year = {2005},
url = {https://doi.org/10.1109/JSSC.2005.852014},
doi = {10.1109/JSSC.2005.852014},
timestamp = {Wed, 02 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/OkaniwaTKYCOTWK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TakauchiTMKDCAY03,
author = {Hideki Takauchi and
Hirotaka Tamura and
Satoshi Matsubara and
Masaya Kibune and
Yoshiyasu Doi and
Takaya Chiba and
Hideaki Anbutsu and
Hisakatsu Yamaguchi and
Toshihiko Mori and
Motomu Takatsu and
Kohtaroh Gotoh and
Toshiaki Sakai and
Takeshi Yamamura},
title = {A {CMOS} multichannel 10-Gb/s transceiver},
journal = {{IEEE} J. Solid State Circuits},
volume = {38},
number = {12},
pages = {2094--2100},
year = {2003},
url = {https://doi.org/10.1109/JSSC.2003.818577},
doi = {10.1109/JSSC.2003.818577},
timestamp = {Wed, 20 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/TakauchiTMKDCAY03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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