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ORCIDBibTeX records: Norman P. Jouppi
@inproceedings{DBLP:conf/asplos/LiACCGHLLLLLLNP23,
author = {Sheng Li and
Garrett Andersen and
Tao Chen and
Liqun Cheng and
Julian Grady and
Da Huang and
Quoc V. Le and
Andrew Li and
Xin Li and
Yang Li and
Chen Liang and
Yifeng Lu and
Yun Ni and
Ruoming Pang and
Mingxing Tan and
Martin Wicke and
Gang Wu and
Shengqi Zhu and
Parthasarathy Ranganathan and
Norman P. Jouppi},
editor = {Tor M. Aamodt and
Natalie D. Enright Jerger and
Michael M. Swift},
title = {Hyperscale Hardware Optimized Neural Architecture Search},
booktitle = {Proceedings of the 28th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 3,
{ASPLOS} 2023, Vancouver, BC, Canada, March 25-29, 2023},
pages = {343--358},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3582016.3582049},
doi = {10.1145/3582016.3582049},
timestamp = {Wed, 10 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/LiACCGHLLLLLLNP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/JouppiS23,
author = {Norman P. Jouppi and
Andy Swing},
title = {A Machine Learning Supercomputer with an Optically Reconfigurable
Interconnect and Embeddings Support},
booktitle = {35th {IEEE} Hot Chips Symposium, {HCS} 2023, Palo Alto, CA, USA, August
27-29, 2023},
pages = {1--24},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/HCS59251.2023.10254691},
doi = {10.1109/HCS59251.2023.10254691},
timestamp = {Tue, 03 Oct 2023 19:13:28 +0200},
biburl = {https://dblp.org/rec/conf/hotchips/JouppiS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/JouppiK0MNNPSST23,
author = {Norman P. Jouppi and
George Kurian and
Sheng Li and
Peter C. Ma and
Rahul Nagarajan and
Lifeng Nai and
Nishant Patil and
Suvinay Subramanian and
Andy Swing and
Brian Towles and
Cliff Young and
Xiang Zhou and
Zongwei Zhou and
David A. Patterson},
editor = {Yan Solihin and
Mark A. Heinrich},
title = {{TPU} v4: An Optically Reconfigurable Supercomputer for Machine Learning
with Hardware Support for Embeddings},
booktitle = {Proceedings of the 50th Annual International Symposium on Computer
Architecture, {ISCA} 2023, Orlando, FL, USA, June 17-21, 2023},
pages = {82:1--82:14},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3579371.3589350},
doi = {10.1145/3579371.3589350},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/JouppiK0MNNPSST23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sigcomm/LiuUYZBBDJL0MNP23,
author = {Hong Liu and
Ryohei Urata and
Kevin Yasumura and
Xiang Zhou and
Roy Bannon and
Jill Berger and
Pedram Dashti and
Norm Jouppi and
Cedric F. Lam and
Sheng Li and
Erji Mao and
Daniel Nelson and
George Papen and
Muhammad Mukarram Bin Tariq and
Amin Vahdat},
editor = {Henning Schulzrinne and
Vishal Misra and
Eddie Kohler and
David A. Maltz},
title = {Lightwave Fabrics: At-Scale Optical Circuit Switching for Datacenter
and Machine Learning Systems},
booktitle = {Proceedings of the {ACM} {SIGCOMM} 2023 Conference, {ACM} {SIGCOMM}
2023, New York, NY, USA, 10-14 September 2023},
pages = {499--515},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3603269.3604836},
doi = {10.1145/3603269.3604836},
timestamp = {Sun, 24 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sigcomm/LiuUYZBBDJL0MNP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2304-01433,
author = {Norman P. Jouppi and
George Kurian and
Sheng Li and
Peter C. Ma and
Rahul Nagarajan and
Lifeng Nai and
Nishant Patil and
Suvinay Subramanian and
Andy Swing and
Brian Towles and
Cliff Young and
Xiang Zhou and
Zongwei Zhou and
David A. Patterson},
title = {{TPU} v4: An Optically Reconfigurable Supercomputer for Machine Learning
with Hardware Support for Embeddings},
journal = {CoRR},
volume = {abs/2304.01433},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2304.01433},
doi = {10.48550/ARXIV.2304.01433},
eprinttype = {arXiv},
eprint = {2304.01433},
timestamp = {Mon, 17 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2304-01433.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2306-15688,
author = {Dana Vantrease and
Robert Schreiber and
Matteo Monchiero and
Moray McLaren and
Norman P. Jouppi and
Marco Fiorentino and
Al Davis and
Nathan L. Binkert and
Raymond G. Beausoleil and
Jung Ho Ahn},
title = {{RETROSPECTIVE:} Corona: System Implications of Emerging Nanophotonic
Technology},
journal = {CoRR},
volume = {abs/2306.15688},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2306.15688},
doi = {10.48550/ARXIV.2306.15688},
eprinttype = {arXiv},
eprint = {2306.15688},
timestamp = {Fri, 30 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2306-15688.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2307-06294,
author = {Dana Vantrease and
Robert Schreiber and
Matteo Monchiero and
Moray McLaren and
Norman P. Jouppi and
Marco Fiorentino and
Al Davis and
Nathan L. Binkert and
Raymond G. Beausoleil and
Jung Ho Ahn},
title = {Corona: System Implications of Emerging Nanophotonic Technology},
journal = {CoRR},
volume = {abs/2307.06294},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2307.06294},
doi = {10.48550/ARXIV.2307.06294},
eprinttype = {arXiv},
eprint = {2307.06294},
timestamp = {Mon, 24 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2307-06294.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2308-03290,
author = {Jordan Dotzel and
Gang Wu and
Andrew Li and
Muhammad Umar and
Yun Ni and
Mohamed S. Abdelfattah and
Zhiru Zhang and
Liqun Cheng and
Martin G. Dixon and
Norman P. Jouppi and
Quoc V. Le and
Sheng Li},
title = {{FLIQS:} One-Shot Mixed-Precision Floating-Point and Integer Quantization
Search},
journal = {CoRR},
volume = {abs/2308.03290},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2308.03290},
doi = {10.48550/ARXIV.2308.03290},
eprinttype = {arXiv},
eprint = {2308.03290},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2308-03290.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/NorriePYKLLYJP21,
author = {Thomas Norrie and
Nishant Patil and
Doe Hyun Yoon and
George Kurian and
Sheng Li and
James Laudon and
Cliff Young and
Norman P. Jouppi and
David A. Patterson},
title = {The Design Process for Google's Training Chips: TPUv2 and TPUv3},
journal = {{IEEE} Micro},
volume = {41},
number = {2},
pages = {56--63},
year = {2021},
url = {https://doi.org/10.1109/MM.2021.3058217},
doi = {10.1109/MM.2021.3058217},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/NorriePYKLLYJP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cvpr/0007TPLCLJ21,
author = {Sheng Li and
Mingxing Tan and
Ruoming Pang and
Andrew Li and
Liqun Cheng and
Quoc V. Le and
Norman P. Jouppi},
title = {Searching for Fast Model Families on Datacenter Accelerators},
booktitle = {{IEEE} Conference on Computer Vision and Pattern Recognition, {CVPR}
2021, virtual, June 19-25, 2021},
pages = {8085--8095},
publisher = {Computer Vision Foundation / {IEEE}},
year = {2021},
url = {https://openaccess.thecvf.com/content/CVPR2021/html/Li\_Searching\_for\_Fast\_Model\_Families\_on\_Datacenter\_Accelerators\_CVPR\_2021\_paper.html},
doi = {10.1109/CVPR46437.2021.00799},
timestamp = {Mon, 18 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cvpr/0007TPLCLJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/TangLNJX21,
author = {Tianqi Tang and
Sheng Li and
Lifeng Nai and
Norman P. Jouppi and
Yuan Xie},
title = {NeuroMeter: An Integrated Power, Area, and Timing Modeling Framework
for Machine Learning Accelerators Industry Track Paper},
booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture,
{HPCA} 2021, Seoul, South Korea, February 27 - March 3, 2021},
pages = {841--853},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/HPCA51647.2021.00075},
doi = {10.1109/HPCA51647.2021.00075},
timestamp = {Tue, 11 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/TangLNJX21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/JouppiYAGJKLLMM21,
author = {Norman P. Jouppi and
Doe Hyun Yoon and
Matthew Ashcraft and
Mark Gottscho and
Thomas B. Jablin and
George Kurian and
James Laudon and
Sheng Li and
Peter C. Ma and
Xiaoyu Ma and
Thomas Norrie and
Nishant Patil and
Sushma Prasad and
Cliff Young and
Zongwei Zhou and
David A. Patterson},
title = {Ten Lessons From Three Generations Shaped Google's TPUv4i : Industrial
Product},
booktitle = {48th {ACM/IEEE} Annual International Symposium on Computer Architecture,
{ISCA} 2021, Virtual Event / Valencia, Spain, June 14-18, 2021},
pages = {1--14},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCA52012.2021.00010},
doi = {10.1109/ISCA52012.2021.00010},
timestamp = {Mon, 19 Feb 2024 07:32:07 +0100},
biburl = {https://dblp.org/rec/conf/isca/JouppiYAGJKLLMM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2102-05610,
author = {Sheng Li and
Mingxing Tan and
Ruoming Pang and
Andrew Li and
Liqun Cheng and
Quoc V. Le and
Norman P. Jouppi},
title = {Searching for Fast Model Families on Datacenter Accelerators},
journal = {CoRR},
volume = {abs/2102.05610},
year = {2021},
url = {https://arxiv.org/abs/2102.05610},
eprinttype = {arXiv},
eprint = {2102.05610},
timestamp = {Thu, 18 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2102-05610.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/JouppiYKLPLYP20,
author = {Norman P. Jouppi and
Doe Hyun Yoon and
George Kurian and
Sheng Li and
Nishant Patil and
James Laudon and
Cliff Young and
David A. Patterson},
title = {A domain-specific supercomputer for training deep neural networks},
journal = {Commun. {ACM}},
volume = {63},
number = {7},
pages = {67--78},
year = {2020},
url = {https://doi.org/10.1145/3360307},
doi = {10.1145/3360307},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cacm/JouppiYKLPLYP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hotchips/NorriePYKLLYJP20,
author = {Thomas Norrie and
Nishant Patil and
Doe Hyun Yoon and
George Kurian and
Sheng Li and
James Laudon and
Cliff Young and
Norman P. Jouppi and
David A. Patterson},
title = {Google's Training Chips Revealed: TPUv2 and TPUv3},
booktitle = {{IEEE} Hot Chips 32 Symposium, {HCS} 2020, Palo Alto, CA, USA, August
16-18, 2020},
pages = {1--70},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/HCS49909.2020.9220735},
doi = {10.1109/HCS49909.2020.9220735},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hotchips/NorriePYKLLYJP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2011-03605,
author = {Sameer Kumar and
Norm Jouppi},
title = {Highly Available Data Parallel {ML} training on Mesh Networks},
journal = {CoRR},
volume = {abs/2011.03605},
year = {2020},
url = {https://arxiv.org/abs/2011.03605},
eprinttype = {arXiv},
eprint = {2011.03605},
timestamp = {Thu, 12 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2011-03605.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/JouppiYPP18,
author = {Norman P. Jouppi and
Cliff Young and
Nishant Patil and
David A. Patterson},
title = {A domain-specific architecture for deep neural networks},
journal = {Commun. {ACM}},
volume = {61},
number = {9},
pages = {50--59},
year = {2018},
url = {https://doi.org/10.1145/3154484},
doi = {10.1145/3154484},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cacm/JouppiYPP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/JouppiYPP18,
author = {Norman P. Jouppi and
Cliff Young and
Nishant Patil and
David A. Patterson},
title = {Motivation for and Evaluation of the First Tensor Processing Unit},
journal = {{IEEE} Micro},
volume = {38},
number = {3},
pages = {10--19},
year = {2018},
url = {https://doi.org/10.1109/MM.2018.032271057},
doi = {10.1109/MM.2018.032271057},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/JouppiYPP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/JouppiYPPABBBBB17,
author = {Norman P. Jouppi and
Cliff Young and
Nishant Patil and
David A. Patterson and
Gaurav Agrawal and
Raminder Bajwa and
Sarah Bates and
Suresh Bhatia and
Nan Boden and
Al Borchers and
Rick Boyle and
Pierre{-}luc Cantin and
Clifford Chao and
Chris Clark and
Jeremy Coriell and
Mike Daley and
Matt Dau and
Jeffrey Dean and
Ben Gelb and
Tara Vazir Ghaemmaghami and
Rajendra Gottipati and
William Gulland and
Robert Hagmann and
C. Richard Ho and
Doug Hogberg and
John Hu and
Robert Hundt and
Dan Hurt and
Julian Ibarz and
Aaron Jaffey and
Alek Jaworski and
Alexander Kaplan and
Harshit Khaitan and
Daniel Killebrew and
Andy Koch and
Naveen Kumar and
Steve Lacy and
James Laudon and
James Law and
Diemthu Le and
Chris Leary and
Zhuyuan Liu and
Kyle Lucke and
Alan Lundin and
Gordon MacKean and
Adriana Maggiore and
Maire Mahony and
Kieran Miller and
Rahul Nagarajan and
Ravi Narayanaswami and
Ray Ni and
Kathy Nix and
Thomas Norrie and
Mark Omernick and
Narayana Penukonda and
Andy Phelps and
Jonathan Ross and
Matt Ross and
Amir Salek and
Emad Samadiani and
Chris Severn and
Gregory Sizikov and
Matthew Snelham and
Jed Souter and
Dan Steinberg and
Andy Swing and
Mercedes Tan and
Gregory Thorson and
Bo Tian and
Horia Toma and
Erick Tuttle and
Vijay Vasudevan and
Richard Walter and
Walter Wang and
Eric Wilcox and
Doe Hyun Yoon},
title = {In-Datacenter Performance Analysis of a Tensor Processing Unit},
booktitle = {Proceedings of the 44th Annual International Symposium on Computer
Architecture, {ISCA} 2017, Toronto, ON, Canada, June 24-28, 2017},
pages = {1--12},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3079856.3080246},
doi = {10.1145/3079856.3080246},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/JouppiYPPABBBBB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/JouppiYPPABBBBB17,
author = {Norman P. Jouppi and
Cliff Young and
Nishant Patil and
David A. Patterson and
Gaurav Agrawal and
Raminder Bajwa and
Sarah Bates and
Suresh Bhatia and
Nan Boden and
Al Borchers and
Rick Boyle and
Pierre{-}luc Cantin and
Clifford Chao and
Chris Clark and
Jeremy Coriell and
Mike Daley and
Matt Dau and
Jeffrey Dean and
Ben Gelb and
Tara Vazir Ghaemmaghami and
Rajendra Gottipati and
William Gulland and
Robert Hagmann and
C. Richard Ho and
Doug Hogberg and
John Hu and
Robert Hundt and
Dan Hurt and
Julian Ibarz and
Aaron Jaffey and
Alek Jaworski and
Alexander Kaplan and
Harshit Khaitan and
Andy Koch and
Naveen Kumar and
Steve Lacy and
James Laudon and
James Law and
Diemthu Le and
Chris Leary and
Zhuyuan Liu and
Kyle Lucke and
Alan Lundin and
Gordon MacKean and
Adriana Maggiore and
Maire Mahony and
Kieran Miller and
Rahul Nagarajan and
Ravi Narayanaswami and
Ray Ni and
Kathy Nix and
Thomas Norrie and
Mark Omernick and
Narayana Penukonda and
Andy Phelps and
Jonathan Ross and
Amir Salek and
Emad Samadiani and
Chris Severn and
Gregory Sizikov and
Matthew Snelham and
Jed Souter and
Dan Steinberg and
Andy Swing and
Mercedes Tan and
Gregory Thorson and
Bo Tian and
Horia Toma and
Erick Tuttle and
Vijay Vasudevan and
Richard Walter and
Walter Wang and
Eric Wilcox and
Doe Hyun Yoon},
title = {In-Datacenter Performance Analysis of a Tensor Processing Unit},
journal = {CoRR},
volume = {abs/1704.04760},
year = {2017},
url = {http://arxiv.org/abs/1704.04760},
eprinttype = {arXiv},
eprint = {1704.04760},
timestamp = {Thu, 13 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/JouppiYPPABBBBB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/MutluBGJHPRPHMS16,
author = {Onur Mutlu and
Rich Belgard and
Thomas R. Gross and
Norman P. Jouppi and
John L. Hennessy and
Steven A. Przybylski and
Chris Rowen and
Yale N. Patt and
Wen{-}mei W. Hwu and
Stephen W. Melvin and
Michael Shebanow and
Tse{-}Yu Yeh and
Andy Wolfe},
title = {Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed
Code {RISC} Processor},
journal = {{IEEE} Micro},
volume = {36},
number = {4},
pages = {70--85},
year = {2016},
url = {https://doi.org/10.1109/MM.2016.66},
doi = {10.1109/MM.2016.66},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/MutluBGJHPRPHMS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/JouppiKMS15,
author = {Norman P. Jouppi and
Andrew B. Kahng and
Naveen Muralimanohar and
Vaishnav Srinivas},
title = {{CACTI-IO:} {CACTI} With OFF-Chip Power-Area-Timing Models},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {23},
number = {7},
pages = {1254--1267},
year = {2015},
url = {https://doi.org/10.1109/TVLSI.2014.2334635},
doi = {10.1109/TVLSI.2014.2334635},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/JouppiKMS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/ChenLAMZXO0BJ15,
author = {Ke Chen and
Sheng Li and
Jung Ho Ahn and
Naveen Muralimanohar and
Jishen Zhao and
Cong Xu and
Seongil O and
Yuan Xie and
Jay B. Brockman and
Norman P. Jouppi},
editor = {Laxmi N. Bhuyan and
Fred Chong and
Vivek Sarkar},
title = {History-Assisted Adaptive-Granularity Caches (HAAG{\textdollar}) for
High Performance 3D {DRAM} Architectures},
booktitle = {Proceedings of the 29th {ACM} on International Conference on Supercomputing,
ICS'15, Newport Beach/Irvine, CA, USA, June 08 - 11, 2015},
pages = {251--261},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2751205.2751227},
doi = {10.1145/2751205.2751227},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ics/ChenLAMZXO0BJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/WangDXJ14,
author = {Jue Wang and
Xiangyu Dong and
Yuan Xie and
Norman P. Jouppi},
title = {Endurance-aware cache line management for non-volatile caches},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {11},
number = {1},
pages = {4:1--4:25},
year = {2014},
url = {https://doi.org/10.1145/2579671},
doi = {10.1145/2579671},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/WangDXJ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/YoonMMJM14,
author = {HanBin Yoon and
Justin Meza and
Naveen Muralimanohar and
Norman P. Jouppi and
Onur Mutlu},
title = {Efficient Data Mapping and Buffering Techniques for Multilevel Cell
Phase-Change Memories},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {11},
number = {4},
pages = {40:1--40:25},
year = {2014},
url = {https://doi.org/10.1145/2669365},
doi = {10.1145/2669365},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/YoonMMJM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/LiASBTJ13,
author = {Sheng Li and
Jung Ho Ahn and
Richard D. Strong and
Jay B. Brockman and
Dean M. Tullsen and
Norman P. Jouppi},
title = {The McPAT Framework for Multicore and Manycore Architectures: Simultaneously
Modeling Power, Area, and Timing},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {10},
number = {1},
pages = {5:1--5:29},
year = {2013},
url = {https://doi.org/10.1145/2445572.2445577},
doi = {10.1145/2445572.2445577},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taco/LiASBTJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/DongJX13,
author = {Xiangyu Dong and
Norman P. Jouppi and
Yuan Xie},
title = {A circuit-architecture co-optimization framework for exploring nonvolatile
memory hierarchies},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {10},
number = {4},
pages = {23:1--23:22},
year = {2013},
url = {https://doi.org/10.1145/2541228.2541230},
doi = {10.1145/2541228.2541230},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/DongJX13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/XuNMJX13,
author = {Cong Xu and
Dimin Niu and
Naveen Muralimanohar and
Norman P. Jouppi and
Yuan Xie},
title = {Understanding the trade-offs in multi-level cell ReRAM memory design},
booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
TX, USA, May 29 - June 07, 2013},
pages = {108:1--108:6},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2463209.2488867},
doi = {10.1145/2463209.2488867},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/XuNMJX13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WangDXJ13,
author = {Jue Wang and
Xiangyu Dong and
Yuan Xie and
Norman P. Jouppi},
title = {i\({}^{\mbox{2}}\)WAP: Improving non-volatile cache lifetime by reducing
inter- and intra-set write variations},
booktitle = {19th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2013, Shenzhen, China, February 23-27, 2013},
pages = {234--245},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/HPCA.2013.6522322},
doi = {10.1109/HPCA.2013.6522322},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/WangDXJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/NiuXMJX13,
author = {Dimin Niu and
Cong Xu and
Naveen Muralimanohar and
Norman P. Jouppi and
Yuan Xie},
editor = {J{\"{o}}rg Henkel},
title = {Design of cross-point metal-oxide ReRAM emphasizing reliability and
cost},
booktitle = {The {IEEE/ACM} International Conference on Computer-Aided Design,
ICCAD'13, San Jose, CA, USA, November 18-21, 2013},
pages = {17--23},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ICCAD.2013.6691092},
doi = {10.1109/ICCAD.2013.6691092},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iccad/NiuXMJX13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/AhnLSJ13,
author = {Jung Ho Ahn and
Sheng Li and
Seongil O and
Norman P. Jouppi},
title = {McSimA+: {A} manycore simulator with application-level+ simulation
and detailed microarchitecture modeling},
booktitle = {2012 {IEEE} International Symposium on Performance Analysis of Systems
{\&} Software, Austin, TX, USA, 21-23 April, 2013},
pages = {74--85},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ISPASS.2013.6557148},
doi = {10.1109/ISPASS.2013.6557148},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/AhnLSJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/DongJX13,
author = {Xiangyu Dong and
Norman P. Jouppi and
Yuan Xie},
title = {A circuit-architecture co-optimization framework for evaluating emerging
memory hierarchies},
booktitle = {2012 {IEEE} International Symposium on Performance Analysis of Systems
{\&} Software, Austin, TX, USA, 21-23 April, 2013},
pages = {140--141},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ISPASS.2013.6557163},
doi = {10.1109/ISPASS.2013.6557163},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/DongJX13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/ZhaoLYXJ13,
author = {Jishen Zhao and
Sheng Li and
Doe Hyun Yoon and
Yuan Xie and
Norman P. Jouppi},
editor = {Matthew K. Farrens and
Christos Kozyrakis},
title = {Kiln: closing the performance gap between systems with and without
persistence support},
booktitle = {The 46th Annual {IEEE/ACM} International Symposium on Microarchitecture,
MICRO-46, Davis, CA, USA, December 7-11, 2013},
pages = {421--432},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2540708.2540744},
doi = {10.1145/2540708.2540744},
timestamp = {Wed, 11 Aug 2021 11:51:26 +0200},
biburl = {https://dblp.org/rec/conf/micro/ZhaoLYXJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/YoonCSJ13,
author = {Doe Hyun Yoon and
Jichuan Chang and
Robert S. Schreiber and
Norman P. Jouppi},
editor = {William Gropp and
Satoshi Matsuoka},
title = {Practical nonvolatile multilevel-cell phase change memory},
booktitle = {International Conference for High Performance Computing, Networking,
Storage and Analysis, SC'13, Denver, CO, {USA} - November 17 - 21,
2013},
pages = {21:1--21:12},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2503210.2503221},
doi = {10.1145/2503210.2503221},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/sc/YoonCSJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/YoonMCRJE12,
author = {Doe Hyun Yoon and
Naveen Muralimanohar and
Jichuan Chang and
Parthasarathy Ranganathan and
Norman P. Jouppi and
Mattan Erez},
title = {Free-p: {A} Practical End-to-End Nonvolatile Memory Protection Mechanism},
journal = {{IEEE} Micro},
volume = {32},
number = {3},
pages = {79--87},
year = {2012},
url = {https://doi.org/10.1109/MM.2012.15},
doi = {10.1109/MM.2012.15},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/micro/YoonMCRJE12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/BinkertDJMMSA12,
author = {Nathan L. Binkert and
Al Davis and
Norman P. Jouppi and
Moray McLaren and
Naveen Muralimanohar and
Robert Schreiber and
Jung Ho Ahn},
title = {Optical High Radix Switch Design},
journal = {{IEEE} Micro},
volume = {32},
number = {3},
pages = {100--109},
year = {2012},
url = {https://doi.org/10.1109/MM.2012.24},
doi = {10.1109/MM.2012.24},
timestamp = {Tue, 06 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/BinkertDJMMSA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/AhnJKLS12,
author = {Jung Ho Ahn and
Norman P. Jouppi and
Christos Kozyrakis and
Jacob Leverich and
Robert S. Schreiber},
title = {Improving System Energy Efficiency with Memory Rank Subsetting},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {9},
number = {1},
pages = {4:1--4:28},
year = {2012},
url = {https://doi.org/10.1145/2133382.2133386},
doi = {10.1145/2133382.2133386},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/AhnJKLS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DongXXJ12,
author = {Xiangyu Dong and
Cong Xu and
Yuan Xie and
Norman P. Jouppi},
title = {NVSim: {A} Circuit-Level Performance, Energy, and Area Model for Emerging
Nonvolatile Memory},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {31},
number = {7},
pages = {994--1007},
year = {2012},
url = {https://doi.org/10.1109/TCAD.2012.2185930},
doi = {10.1109/TCAD.2012.2185930},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DongXXJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ChenLMABJ12,
author = {Ke Chen and
Sheng Li and
Naveen Muralimanohar and
Jung Ho Ahn and
Jay B. Brockman and
Norman P. Jouppi},
editor = {Wolfgang Rosenstiel and
Lothar Thiele},
title = {{CACTI-3DD:} Architecture-level modeling for 3D die-stacked {DRAM}
main memory},
booktitle = {2012 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2012, Dresden, Germany, March 12-16, 2012},
pages = {33--38},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/DATE.2012.6176428},
doi = {10.1109/DATE.2012.6176428},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ChenLMABJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChatterjeeMBDJ12,
author = {Niladrish Chatterjee and
Naveen Muralimanohar and
Rajeev Balasubramonian and
Al Davis and
Norman P. Jouppi},
title = {Staged Reads: Mitigating the impact of {DRAM} writes on {DRAM} reads},
booktitle = {18th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2012, New Orleans, LA, USA, 25-29 February, 2012},
pages = {41--52},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/HPCA.2012.6168943},
doi = {10.1109/HPCA.2012.6168943},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/ChatterjeeMBDJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/JouppiKMS12,
author = {Norman P. Jouppi and
Andrew B. Kahng and
Naveen Muralimanohar and
Vaishnav Srinivas},
editor = {Alan J. Hu},
title = {{CACTI-IO:} {CACTI} with off-chip power-area-timing models},
booktitle = {2012 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2012, San Jose, CA, USA, November 5-8, 2012},
pages = {294--301},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2429384.2429446},
doi = {10.1145/2429384.2429446},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/JouppiKMS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/UdipiMBDJ12,
author = {Aniruddha N. Udipi and
Naveen Muralimanohar and
Rajeev Balasubramonian and
Al Davis and
Norman P. Jouppi},
title = {{LOT-ECC:} Localized and tiered reliability mechanisms for commodity
memory systems},
booktitle = {39th International Symposium on Computer Architecture {(ISCA} 2012),
June 9-13, 2012, Portland, OR, {USA}},
pages = {285--296},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ISCA.2012.6237025},
doi = {10.1109/ISCA.2012.6237025},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/UdipiMBDJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/NiuXMJX12,
author = {Dimin Niu and
Cong Xu and
Naveen Muralimanohar and
Norman P. Jouppi and
Yuan Xie},
editor = {Naresh R. Shanbhag and
Massimo Poncino and
Pai H. Chou and
Ajith Amerasekera},
title = {Design trade-offs for high density cross-point resistive memory},
booktitle = {International Symposium on Low Power Electronics and Design, ISLPED'12,
Redondo Beach, CA, {USA} - July 30 - August 01, 2012},
pages = {209--214},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2333660.2333712},
doi = {10.1145/2333660.2333712},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/NiuXMJX12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/LiYCZABXJ12,
author = {Sheng Li and
Doe Hyun Yoon and
Ke Chen and
Jishen Zhao and
Jung Ho Ahn and
Jay B. Brockman and
Yuan Xie and
Norman P. Jouppi},
editor = {Jeffrey K. Hollingsworth},
title = {{MAGE:} adaptive granularity and {ECC} for resilient and power efficient
memory systems},
booktitle = {{SC} Conference on High Performance Computing Networking, Storage
and Analysis, {SC} '12, Salt Lake City, UT, {USA} - November 11 -
15, 2012},
pages = {33},
publisher = {{IEEE/ACM}},
year = {2012},
url = {https://doi.org/10.1109/SC.2012.73},
doi = {10.1109/SC.2012.73},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/LiYCZABXJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@book{DBLP:series/synthesis/2011Balasubramonian,
author = {Rajeev Balasubramonian and
Norman P. Jouppi and
Naveen Muralimanohar},
title = {Multi-Core Cache Hierarchies},
series = {Synthesis Lectures on Computer Architecture},
publisher = {Morgan {\&} Claypool Publishers},
year = {2011},
url = {https://doi.org/10.2200/S00365ED1V01Y201105CAC017},
doi = {10.2200/S00365ED1V01Y201105CAC017},
isbn = {978-3-031-00606-7},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/series/synthesis/2011Balasubramonian.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/Jouppi11,
author = {Norman P. Jouppi},
title = {{DRAM} errors in the wild: technical perspective},
journal = {Commun. {ACM}},
volume = {54},
number = {2},
pages = {99},
year = {2011},
url = {https://doi.org/10.1145/1897816.1897843},
doi = {10.1145/1897816.1897843},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cacm/Jouppi11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/DongXMJ11,
author = {Xiangyu Dong and
Yuan Xie and
Naveen Muralimanohar and
Norman P. Jouppi},
title = {Hybrid checkpointing using emerging nonvolatile memories for future
exascale systems},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {8},
number = {2},
pages = {6:1--6:29},
year = {2011},
url = {https://doi.org/10.1145/1970386.1970387},
doi = {10.1145/1970386.1970387},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/DongXMJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/XuDJX11,
author = {Cong Xu and
Xiangyu Dong and
Norman P. Jouppi and
Yuan Xie},
title = {Design implications of memristor-based {RRAM} cross-point structures},
booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France,
March 14-18, 2011},
pages = {734--739},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/DATE.2011.5763125},
doi = {10.1109/DATE.2011.5763125},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/XuDJX11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/YoonMCRJE11,
author = {Doe Hyun Yoon and
Naveen Muralimanohar and
Jichuan Chang and
Parthasarathy Ranganathan and
Norman P. Jouppi and
Mattan Erez},
title = {FREE-p: Protecting non-volatile memory against both hard and soft
errors},
booktitle = {17th International Conference on High-Performance Computer Architecture
{(HPCA-17} 2011), February 12-16 2011, San Antonio, Texas, {USA}},
pages = {466--477},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/HPCA.2011.5749752},
doi = {10.1109/HPCA.2011.5749752},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/YoonMCRJE11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LiCABJ11,
author = {Sheng Li and
Ke Chen and
Jung Ho Ahn and
Jay B. Brockman and
Norman P. Jouppi},
editor = {Joel R. Phillips and
Alan J. Hu and
Helmut Graeb},
title = {{CACTI-P:} Architecture-level modeling for SRAM-based structures with
advanced leakage reduction techniques},
booktitle = {2011 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2011, San Jose, California, USA, November 7-10, 2011},
pages = {694--701},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICCAD.2011.6105405},
doi = {10.1109/ICCAD.2011.6105405},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/LiCABJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/UdipiMBDJ11,
author = {Aniruddha N. Udipi and
Naveen Muralimanohar and
Rajeev Balasubramonian and
Al Davis and
Norman P. Jouppi},
editor = {Ravi R. Iyer and
Qing Yang and
Antonio Gonz{\'{a}}lez},
title = {Combining memory and a controller with photonics through 3D-stacking
to enable scalable and energy-efficient systems},
booktitle = {38th International Symposium on Computer Architecture {(ISCA} 2011),
June 4-8, 2011, San Jose, CA, {USA}},
pages = {425--436},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2000064.2000115},
doi = {10.1145/2000064.2000115},
timestamp = {Mon, 15 May 2023 22:11:15 +0200},
biburl = {https://dblp.org/rec/conf/isca/UdipiMBDJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BinkertDJMMSA11,
author = {Nathan L. Binkert and
Al Davis and
Norman P. Jouppi and
Moray McLaren and
Naveen Muralimanohar and
Robert Schreiber and
Jung Ho Ahn},
editor = {Ravi R. Iyer and
Qing Yang and
Antonio Gonz{\'{a}}lez},
title = {The role of optics in future high radix switch design},
booktitle = {38th International Symposium on Computer Architecture {(ISCA} 2011),
June 4-8, 2011, San Jose, CA, {USA}},
pages = {437--448},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2000064.2000116},
doi = {10.1145/2000064.2000116},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/BinkertDJMMSA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LiLFCRJ11,
author = {Sheng Li and
Kevin T. Lim and
Paolo Faraboschi and
Jichuan Chang and
Parthasarathy Ranganathan and
Norman P. Jouppi},
editor = {Carlo Galuzzi and
Luigi Carro and
Andreas Moshovos and
Milos Prvulovic},
title = {System-level integrated server architectures for scale-out datacenters},
booktitle = {44rd Annual {IEEE/ACM} International Symposium on Microarchitecture,
{MICRO} 2011, Porto Alegre, Brazil, December 3-7, 2011},
pages = {260--271},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2155620.2155651},
doi = {10.1145/2155620.2155651},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/LiLFCRJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/LiCHMKBRJ11,
author = {Sheng Li and
Ke Chen and
Ming{-}yu Hsieh and
Naveen Muralimanohar and
Chad D. Kersey and
Jay B. Brockman and
Arun F. Rodrigues and
Norman P. Jouppi},
editor = {Scott A. Lathrop and
Jim Costa and
William Kramer},
title = {System implications of memory reliability in exascale computing},
booktitle = {Conference on High Performance Computing Networking, Storage and Analysis,
{SC} 2011, Seattle, WA, USA, November 12-18, 2011},
pages = {46:1--46:12},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2063384.2063445},
doi = {10.1145/2063384.2063445},
timestamp = {Thu, 05 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/LiCHMKBRJ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@incollection{DBLP:books/sp/11/AhnBBDFJMMMSV11,
author = {Jung Ho Ahn and
Raymond G. Beausoleil and
Nathan L. Binkert and
Al Davis and
Marco Fiorentino and
Norman P. Jouppi and
Moray McLaren and
Matteo Monchiero and
Naveen Muralimanohar and
Robert Schreiber and
Dana Vantrease},
editor = {Cristina Silvano and
Marcello Lajolo and
Gianluca Palermo},
title = {{CMOS} Nanophotonics: Technology, System Implications, and a {CMP}
Case Study},
booktitle = {Low Power Networks-on-Chip},
pages = {223--254},
publisher = {Springer},
year = {2011},
url = {https://doi.org/10.1007/978-1-4419-6911-8\_9},
doi = {10.1007/978-1-4419-6911-8\_9},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/books/sp/11/AhnBBDFJMMMSV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/UdipiMCBDJ10,
author = {Aniruddha N. Udipi and
Naveen Muralimanohar and
Niladrish Chatterjee and
Rajeev Balasubramonian and
Al Davis and
Norman P. Jouppi},
editor = {Andr{\'{e}} Seznec and
Uri C. Weiser and
Ronny Ronen},
title = {Rethinking {DRAM} design and organization for energy-constrained multi-cores},
booktitle = {37th International Symposium on Computer Architecture {(ISCA} 2010),
June 19-23, 2010, Saint-Malo, France},
pages = {175--186},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1815961.1815983},
doi = {10.1145/1815961.1815983},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/UdipiMCBDJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/DongXMJ10,
author = {Xiangyu Dong and
Yuan Xie and
Naveen Muralimanohar and
Norman P. Jouppi},
title = {Simple but Effective Heterogeneous Main Memory with On-Chip Memory
Controller Support},
booktitle = {Conference on High Performance Computing Networking, Storage and Analysis,
{SC} 2010, New Orleans, LA, USA, November 13-19, 2010},
pages = {1--11},
publisher = {{IEEE}},
year = {2010},
url = {https://doi.org/10.1109/SC.2010.50},
doi = {10.1109/SC.2010.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/DongXMJ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cacm/Jouppi09,
author = {Norman P. Jouppi},
title = {Technical perspective - Software and hardware support for deterministic
replay of parallel programs},
journal = {Commun. {ACM}},
volume = {52},
number = {6},
pages = {92},
year = {2009},
url = {https://doi.org/10.1145/1516046.1516067},
doi = {10.1145/1516046.1516067},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cacm/Jouppi09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AhnLSJ09,
author = {Jung Ho Ahn and
Jacob Leverich and
Robert S. Schreiber and
Norman P. Jouppi},
title = {Multicore {DIMM:} an Energy Efficient Memory Module with Independently
Controlled DRAMs},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {8},
number = {1},
pages = {5--8},
year = {2009},
url = {https://doi.org/10.1109/L-CA.2008.13},
doi = {10.1109/L-CA.2008.13},
timestamp = {Sun, 15 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/AhnLSJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/TanRYMMMKSJW09,
author = {Michael R. T. Tan and
Paul Rosenberg and
Jong Souk Yeo and
Moray McLaren and
Sagi Mathai and
Terry Morris and
Huei Pei Kuo and
Joseph Straznicky and
Norman P. Jouppi and
Shih{-}Yuan Wang},
title = {A High-Speed Optical Multidrop Bus for Computer Interconnections},
journal = {{IEEE} Micro},
volume = {29},
number = {4},
pages = {62--73},
year = {2009},
url = {https://doi.org/10.1109/MM.2009.57},
doi = {10.1109/MM.2009.57},
timestamp = {Tue, 06 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/TanRYMMMKSJW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/JouppiKT09,
author = {Norman P. Jouppi and
Rakesh Kumar and
Dean M. Tullsen},
title = {Introduction to the special issue on the 2008 workshop on design,
analysis, and simulation of chip multiprocessors (dasCMP'08)},
journal = {{SIGARCH} Comput. Archit. News},
volume = {37},
number = {2},
pages = {1},
year = {2009},
url = {https://doi.org/10.1145/1577129.1577131},
doi = {10.1145/1577129.1577131},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/JouppiKT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/Jouppi09,
author = {Norman P. Jouppi},
editor = {Dimitris Gizopoulos and
Susumu Horiguchi and
Spyros Tragoudas and
Mohammad Tehranipoor},
title = {Resilience Challenges for Exascale Systems},
booktitle = {24th {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} Systems, {DFT} 2009, Chicago, Illinois, USA, October 7-9,
2009},
pages = {379--379},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/DFT.2009.52},
doi = {10.1109/DFT.2009.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Jouppi09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/DongJX09,
author = {Xiangyu Dong and
Norman P. Jouppi and
Yuan Xie},
editor = {Jaijeet S. Roychowdhury},
title = {PCRAMsim: System-level performance, energy, and area modeling for
Phase-Change {RAM}},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {269--275},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687449},
doi = {10.1145/1687399.1687449},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/DongJX09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/JouppiX09,
author = {Norman P. Jouppi and
Yuan Xie},
editor = {J{\"{o}}rg Henkel and
Ali Keshavarzi and
Naehyuck Chang and
Tahir Ghani},
title = {Emerging technologies and their impact on system design},
booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics
and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
pages = {427--428},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1594233.1594343},
doi = {10.1145/1594233.1594343},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/JouppiX09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LiASBTJ09,
author = {Sheng Li and
Jung Ho Ahn and
Richard D. Strong and
Jay B. Brockman and
Dean M. Tullsen and
Norman P. Jouppi},
editor = {David H. Albonesi and
Margaret Martonosi and
David I. August and
Jos{\'{e}} F. Mart{\'{\i}}nez},
title = {McPAT: an integrated power, area, and timing modeling framework for
multicore and manycore architectures},
booktitle = {42st Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-42} 2009), December 12-16, 2009, New York, New York, {USA}},
pages = {469--480},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1669112.1669172},
doi = {10.1145/1669112.1669172},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/LiASBTJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/AhnJKLS09,
author = {Jung Ho Ahn and
Norman P. Jouppi and
Christos Kozyrakis and
Jacob Leverich and
Robert S. Schreiber},
title = {Future scaling of processor-memory interfaces},
booktitle = {Proceedings of the {ACM/IEEE} Conference on High Performance Computing,
{SC} 2009, November 14-20, 2009, Portland, Oregon, {USA}},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1654059.1654102},
doi = {10.1145/1654059.1654102},
timestamp = {Tue, 06 Nov 2018 16:59:29 +0100},
biburl = {https://dblp.org/rec/conf/sc/AhnJKLS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/DongMJKX09,
author = {Xiangyu Dong and
Naveen Muralimanohar and
Norman P. Jouppi and
Richard Kaufmann and
Yuan Xie},
title = {Leveraging 3D {PCRAM} technologies to reduce checkpoint overhead for
future exascale systems},
booktitle = {Proceedings of the {ACM/IEEE} Conference on High Performance Computing,
{SC} 2009, November 14-20, 2009, Portland, Oregon, {USA}},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1654059.1654117},
doi = {10.1145/1654059.1654117},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/DongMJKX09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/MuralimanoharBJ08,
author = {Naveen Muralimanohar and
Rajeev Balasubramonian and
Norman P. Jouppi},
title = {Architecting Efficient Interconnects for Large Caches with {CACTI}
6.0},
journal = {{IEEE} Micro},
volume = {28},
number = {1},
pages = {69--79},
year = {2008},
url = {https://doi.org/10.1109/MM.2008.2},
doi = {10.1109/MM.2008.2},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/MuralimanoharBJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/JouppiKT08,
author = {Norman P. Jouppi and
Rakesh Kumar and
Dean M. Tullsen},
title = {Introduction to the special issue on the 2007 workshop on design,
analysis, and simulation of chip multiprocessors (dasCMP'07)},
journal = {{SIGARCH} Comput. Archit. News},
volume = {36},
number = {2},
pages = {1},
year = {2008},
url = {https://doi.org/10.1145/1399972.1399975},
doi = {10.1145/1399972.1399975},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/JouppiKT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hoti/TanRYMMMSJKWLKMBOS08,
author = {Michael R. T. Tan and
Paul Rosenberg and
Jong Souk Yeo and
Moray McLaren and
Sagi Mathai and
Terry Morris and
Joseph Straznicky and
Norman P. Jouppi and
Huei Pei Kuo and
Shih{-}Yuan Wang and
Scott Lerner and
Pavel Kornilovich and
Neal Meyer and
Robert Bicknell and
Charles Otis and
Len Seals},
title = {A High-Speed Optical Multi-Drop Bus for Computer Interconnections},
booktitle = {16th Annual {IEEE} Symposium on High Performance Interconnects {(HOTI}
2008), 26-28 August 2008, Stanford, CA, {USA}},
pages = {3--10},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/HOTI.2008.15},
doi = {10.1109/HOTI.2008.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hoti/TanRYMMMSJKWLKMBOS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hoti/BeausoleilABDFFJMSSSVX08,
author = {Raymond G. Beausoleil and
Jung Ho Ahn and
Nathan L. Binkert and
Al Davis and
David Fattal and
Marco Fiorentino and
Norman P. Jouppi and
Moray McLaren and
Charles M. Santori and
Robert S. Schreiber and
S. M. Spillane and
Dana Vantrease and
Qianfan Xu},
title = {A Nanophotonic Interconnect for High-Performance Many-Core Computation},
booktitle = {16th Annual {IEEE} Symposium on High Performance Interconnects {(HOTI}
2008), 26-28 August 2008, Stanford, CA, {USA}},
pages = {182--189},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/HOTI.2008.32},
doi = {10.1109/HOTI.2008.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hoti/BeausoleilABDFFJMSSSVX08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ThoziyoorAMBJ08,
author = {Shyamkumar Thoziyoor and
Jung Ho Ahn and
Matteo Monchiero and
Jay B. Brockman and
Norman P. Jouppi},
title = {A Comprehensive Memory Modeling Tool and Its Application to the Design
and Analysis of Future Memory Hierarchies},
booktitle = {35th International Symposium on Computer Architecture {(ISCA} 2008),
June 21-25, 2008, Beijing, China},
pages = {51--62},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISCA.2008.16},
doi = {10.1109/ISCA.2008.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ThoziyoorAMBJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/VantreaseSMMJFDBBA08,
author = {Dana Vantrease and
Robert Schreiber and
Matteo Monchiero and
Moray McLaren and
Norman P. Jouppi and
Marco Fiorentino and
Al Davis and
Nathan L. Binkert and
Raymond G. Beausoleil and
Jung Ho Ahn},
title = {Corona: System Implications of Emerging Nanophotonic Technology},
booktitle = {35th International Symposium on Computer Architecture {(ISCA} 2008),
June 21-25, 2008, Beijing, China},
pages = {153--164},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISCA.2008.35},
doi = {10.1109/ISCA.2008.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/VantreaseSMMJFDBBA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/Jouppi08,
author = {Norman P. Jouppi},
editor = {Vijaykrishnan Narayanan and
C. P. Ravikumar and
J{\"{o}}rg Henkel and
Ali Keshavarzi and
Vojin G. Oklobdzija and
Barry M. Pangrle},
title = {System implications of integrated photonics},
booktitle = {Proceedings of the 2008 International Symposium on Low Power Electronics
and Design, 2008, Bangalore, India, August 11-13, 2008},
pages = {183--184},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1393921.1393923},
doi = {10.1145/1393921.1393923},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/Jouppi08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/AggarwalSSJR08,
author = {Nidhi Aggarwal and
James E. Smith and
Kewal K. Saluja and
Norman P. Jouppi and
Parthasarathy Ranganathan},
title = {Implementing high availability memory with a duplication cache},
booktitle = {41st Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-41} 2008), November 8-12, 2008, Lake Como, Italy},
pages = {71--82},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/MICRO.2008.4771780},
doi = {10.1109/MICRO.2008.4771780},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/AggarwalSSJR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/AggarwalRJS07,
author = {Nidhi Aggarwal and
Parthasarathy Ranganathan and
Norman P. Jouppi and
James E. Smith},
title = {Isolation in Commodity Multicore Processors},
journal = {Computer},
volume = {40},
number = {6},
pages = {49--59},
year = {2007},
url = {https://doi.org/10.1109/MC.2007.213},
doi = {10.1109/MC.2007.213},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/AggarwalRJS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/TullsenKJ07,
author = {Dean M. Tullsen and
Rakesh Kumar and
Norman P. Jouppi},
title = {Introduction to the special issue on the 2006 workshop on design,
analysis, and simulation of chip multiprocessors: (dasCMP'06)},
journal = {{SIGARCH} Comput. Archit. News},
volume = {35},
number = {1},
pages = {2},
year = {2007},
url = {https://doi.org/10.1145/1241601.1241605},
doi = {10.1145/1241601.1241605},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/TullsenKJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BorkarJS07,
author = {Shekhar Borkar and
Norman P. Jouppi and
Per Stenstr{\"{o}}m},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Microprocessors in the era of terascale integration},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {237--242},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://doi.org/10.1109/DATE.2007.364597},
doi = {10.1109/DATE.2007.364597},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BorkarJS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/AggarwalRJS07,
author = {Nidhi Aggarwal and
Parthasarathy Ranganathan and
Norman P. Jouppi and
James E. Smith},
editor = {Dean M. Tullsen and
Brad Calder},
title = {Configurable isolation: building high availability systems with commodity
multi-core processors},
booktitle = {34th International Symposium on Computer Architecture {(ISCA} 2007),
June 9-13, 2007, San Diego, California, {USA}},
pages = {470--481},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1250662.1250720},
doi = {10.1145/1250662.1250720},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/AggarwalRJS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/MuralimanoharBJ07,
author = {Naveen Muralimanohar and
Rajeev Balasubramonian and
Norman P. Jouppi},
title = {Optimizing {NUCA} Organizations and Wiring Alternatives for Large
Caches with {CACTI} 6.0},
booktitle = {40th Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-40} 2007), 1-5 December 2007, Chicago, Illinois, {USA}},
pages = {3--14},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/MICRO.2007.33},
doi = {10.1109/MICRO.2007.33},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/MuralimanoharBJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/SchlanskerCOSRBCMBJ07,
author = {Michael S. Schlansker and
Nagabhushan Chitlur and
Erwin Oertli and
Paul M. Stillwell Jr. and
Linda Rankin and
Dennis Bradford and
Richard J. Carter and
Jayaram Mudigonda and
Nathan L. Binkert and
Norman P. Jouppi},
editor = {Becky Verastegui},
title = {High-performance ethernet-based communications for future multi-core
processors},
booktitle = {Proceedings of the {ACM/IEEE} Conference on High Performance Networking
and Computing, {SC} 2007, November 10-16, 2007, Reno, Nevada, {USA}},
pages = {37},
publisher = {{ACM} Press},
year = {2007},
url = {https://doi.org/10.1145/1362622.1362672},
doi = {10.1145/1362622.1362672},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/sc/SchlanskerCOSRBCMBJ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/KumarTJ06,
author = {Rakesh Kumar and
Dean M. Tullsen and
Norman P. Jouppi},
editor = {Erik R. Altman and
Kevin Skadron and
Benjamin G. Zorn},
title = {Core architecture optimization for heterogeneous chip multiprocessors},
booktitle = {15th International Conference on Parallel Architectures and Compilation
Techniques {(PACT} 2006), Seattle, Washington, USA, September 16-20,
2006},
pages = {23--32},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1152154.1152162},
doi = {10.1145/1152154.1152162},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/KumarTJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/ShayestehRJSS06,
author = {Anahita Shayesteh and
Glenn Reinman and
Norman P. Jouppi and
Timothy Sherwood and
Suleyman Sair},
editor = {Seongsoo Hong and
Wayne H. Wolf and
Kriszti{\'{a}}n Flautner and
Taewhan Kim},
title = {Improving the performance and power efficiency of shared helpers in
CMPs},
booktitle = {Proceedings of the 2006 International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems, {CASES} 2006, Seoul, Korea, October
22-25, 2006},
pages = {345--356},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1176760.1176802},
doi = {10.1145/1176760.1176802},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/ShayestehRJSS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/SampsonGCJSC06,
author = {Jack Sampson and
Rub{\'{e}}n Gonz{\'{a}}lez and
Jean{-}Francois Collard and
Norman P. Jouppi and
Michael S. Schlansker and
Brad Calder},
title = {Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors
and Fast Barriers},
booktitle = {39th Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-39} 2006), 9-13 December 2006, Orlando, Florida, {USA}},
pages = {235--246},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/MICRO.2006.23},
doi = {10.1109/MICRO.2006.23},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/SampsonGCJSC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sc/LemuetSCJ06,
author = {Christophe Lemuet and
Jack Sampson and
Jean{-}Francois Collard and
Norman P. Jouppi},
title = {Architecture - The potential energy efficiency of vector acceleration},
booktitle = {Proceedings of the {ACM/IEEE} {SC2006} Conference on High Performance
Networking and Computing, November 11-17, 2006, Tampa, FL, {USA}},
pages = {77},
publisher = {{ACM} Press},
year = {2006},
url = {https://doi.org/10.1145/1188455.1188537},
doi = {10.1145/1188455.1188537},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sc/LemuetSCJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/KumarTJR05,
author = {Rakesh Kumar and
Dean M. Tullsen and
Norman P. Jouppi and
Parthasarathy Ranganathan},
title = {Heterogeneous Chip Multiprocessors},
journal = {Computer},
volume = {38},
number = {11},
pages = {32--38},
year = {2005},
url = {https://doi.org/10.1109/MC.2005.379},
doi = {10.1109/MC.2005.379},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/KumarTJR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/JouppiKT05,
author = {Norman P. Jouppi and
Rakesh Kumar and
Dean M. Tullsen},
title = {Introduction to the special issue on the 2005 workshop on design,
analysis, and simulation of chip multiprocessors (dasCMP'05)},
journal = {{SIGARCH} Comput. Archit. News},
volume = {33},
number = {4},
pages = {4},
year = {2005},
url = {https://doi.org/10.1145/1105734.1105736},
doi = {10.1145/1105734.1105736},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/JouppiKT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/SampsonGCJS05,
author = {Jack Sampson and
Rub{\'{e}}n Gonz{\'{a}}lez and
Jean{-}Francois Collard and
Norman P. Jouppi and
Michael S. Schlansker},
title = {Fast synchronization for chip multiprocessors},
journal = {{SIGARCH} Comput. Archit. News},
volume = {33},
number = {4},
pages = {64--69},
year = {2005},
url = {https://doi.org/10.1145/1105734.1105743},
doi = {10.1145/1105734.1105743},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/SampsonGCJS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/ShayestehRJSS05,
author = {Anahita Shayesteh and
Glenn Reinman and
Norman P. Jouppi and
Suleyman Sair and
Timothy Sherwood},
title = {Dynamically configurable shared {CMP} helper engines for improved
performance},
journal = {{SIGARCH} Comput. Archit. News},
volume = {33},
number = {4},
pages = {70--79},
year = {2005},
url = {https://doi.org/10.1145/1105734.1105744},
doi = {10.1145/1105734.1105744},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/ShayestehRJSS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RanganathanJ05,
author = {Parthasarathy Ranganathan and
Norman P. Jouppi},
title = {Enterprise {IT} Trends and Implications for Architecture Research},
booktitle = {11th International Conference on High-Performance Computer Architecture
{(HPCA-11} 2005), 12-16 February 2005, San Francisco, CA, {USA}},
pages = {253--256},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/HPCA.2005.14},
doi = {10.1109/HPCA.2005.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/RanganathanJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icra/JouppiT05,
author = {Norman P. Jouppi and
Stan Thomas},
title = {Telepresence Systems With Automatic Preservation of User Head Height,
Local Rotation, and Remote Translation},
booktitle = {Proceedings of the 2005 {IEEE} International Conference on Robotics
and Automation, {ICRA} 2005, April 18-22, 2005, Barcelona, Spain},
pages = {62--68},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ROBOT.2005.1570097},
doi = {10.1109/ROBOT.2005.1570097},
timestamp = {Mon, 22 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icra/JouppiT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/Jouppi05,
author = {Norman P. Jouppi},
title = {The Future Evolution of High-Performance Microprocessors},
booktitle = {38th Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-38} 2005), 12-16 November 2005, Barcelona, Spain},
pages = {155},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/MICRO.2005.34},
doi = {10.1109/MICRO.2005.34},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/Jouppi05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ppopp/CollardJY05,
author = {Jean{-}Francois Collard and
Norman P. Jouppi and
Sami Yehia},
editor = {Keshav Pingali and
Katherine A. Yelick and
Andrew S. Grimshaw},
title = {System-wide performance monitors and their application to the optimization
of coherent memory accesses},
booktitle = {Proceedings of the {ACM} {SIGPLAN} Symposium on Principles and Practice
of Parallel Programming, {PPOPP} 2005, June 15-17, 2005, Chicago,
IL, {USA}},
pages = {247--254},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1065944.1065977},
doi = {10.1145/1065944.1065977},
timestamp = {Sun, 12 Jun 2022 19:46:08 +0200},
biburl = {https://dblp.org/rec/conf/ppopp/CollardJY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipc/Jouppi04,
author = {Norman P. Jouppi},
editor = {Luc Boug{\'{e}} and
Viktor K. Prasanna},
title = {The Future Evolution of High-Performance Microprocessors},
booktitle = {High Performance Computing - HiPC 2004, 11th International Conference,
Bangalore, India, December 19-22, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3296},
pages = {5},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30474-6\_4},
doi = {10.1007/978-3-540-30474-6\_4},
timestamp = {Tue, 14 May 2019 10:00:50 +0200},
biburl = {https://dblp.org/rec/conf/hipc/Jouppi04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/AugustineRNJI04,
author = {Jacob Augustine and
Shivarama Rao and
Norman P. Jouppi and
Subu Iyer},
title = {Region of interest editing of {MPEG-2} video streams in the compressed
domain},
booktitle = {Proceedings of the 2004 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2004, 27-30 June 2004, Taipei, Taiwan},
pages = {559--562},
publisher = {{IEEE} Computer Society},
year = {2004},
timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
biburl = {https://dblp.org/rec/conf/icmcs/AugustineRNJI04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icra/JouppiIMMT04,
author = {Norman P. Jouppi and
Subu Iyer and
Wayne Mack and
April Slayden Mitchell and
Stan Thomas},
title = {A First Generation Mutually-Immersive Mobile Telepresence Surrogate
with Automatic Backtracking},
booktitle = {Proceedings of the 2004 {IEEE} International Conference on Robotics
and Automation, {ICRA} 2004, April 26 - May 1, 2004, New Orleans,
LA, {USA}},
pages = {1670--1675},
publisher = {{IEEE}},
year = {2004},
url = {https://doi.org/10.1109/ROBOT.2004.1308064},
doi = {10.1109/ROBOT.2004.1308064},
timestamp = {Mon, 22 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icra/JouppiIMMT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/KumarTRJF04,
author = {Rakesh Kumar and
Dean M. Tullsen and
Parthasarathy Ranganathan and
Norman P. Jouppi and
Keith I. Farkas},
title = {Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded
Workload Performance},
booktitle = {31st International Symposium on Computer Architecture {(ISCA} 2004),
19-23 June 2004, Munich, Germany},
pages = {64--75},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ISCA.2004.1310764},
doi = {10.1109/ISCA.2004.1310764},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isca/KumarTRJF04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KumarJT04,
author = {Rakesh Kumar and
Norman P. Jouppi and
Dean M. Tullsen},
title = {Conjoined-Core Chip Multiprocessing},
booktitle = {37th Annual International Symposium on Microarchitecture {(MICRO-37}
2004), 4-8 December 2004, Portland, OR, {USA}},
pages = {195--206},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/MICRO.2004.12},
doi = {10.1109/MICRO.2004.12},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KumarJT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mm/JouppiITS04,
author = {Norman P. Jouppi and
Subu Iyer and
Stan Thomas and
April Slayden},
editor = {Henning Schulzrinne and
Nevenka Dimitrova and
Martina Angela Sasse and
Sue B. Moon and
Rainer Lienhart},
title = {BiReality: mutually-immersive telepresence},
booktitle = {Proceedings of the 12th {ACM} International Conference on Multimedia,
New York, NY, USA, October 10-16, 2004},
pages = {860--867},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1027527.1027725},
doi = {10.1145/1027527.1027725},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mm/JouppiITS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KumarFJRT03,
author = {Rakesh Kumar and
Keith I. Farkas and
Norman P. Jouppi and
Parthasarathy Ranganathan and
Dean M. Tullsen},
title = {Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core
Architectures},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {2},
year = {2003},
url = {https://doi.org/10.1109/L-CA.2003.6},
doi = {10.1109/L-CA.2003.6},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cal/KumarFJRT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/KumarFJRT03,
author = {Rakesh Kumar and
Keith I. Farkas and
Norman P. Jouppi and
Parthasarathy Ranganathan and
Dean M. Tullsen},
title = {Single-ISA Heterogeneous Multi-Core Architectures: The Potential for
Processor Power Reduction},
booktitle = {Proceedings of the 36th Annual International Symposium on Microarchitecture,
San Diego, CA, USA, December 3-5, 2003},
pages = {81--92},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/MICRO.2003.1253185},
doi = {10.1109/MICRO.2003.1253185},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/KumarFJRT03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cscw/JouppiMITS02,
author = {Norman P. Jouppi and
Wayne Mack and
Subu Iyer and
Stan Thomas and
April Slayden},
editor = {Elizabeth F. Churchill and
Joe McCarthy},
title = {First steps towards mutually-immersive mobile telepresence},
booktitle = {Proceedings of the 2002 {ACM} on Computer supported cooperative work
video program, {CSCW} '02, New Orleans, Louisiana, USA, November 16-20,
2002},
pages = {1},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/616706.616708},
doi = {10.1145/616706.616708},
timestamp = {Wed, 30 Sep 2020 09:16:09 +0200},
biburl = {https://dblp.org/rec/conf/cscw/JouppiMITS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cscw/Jouppi02,
author = {Norman P. Jouppi},
editor = {Elizabeth F. Churchill and
Joseph F. McCarthy and
Christine Neuwirth and
Tom Rodden},
title = {First steps towards mutually-immersive mobile telepresence},
booktitle = {{CSCW} 2002, Proceeding on the {ACM} 2002 Conference on Computer Supported
Cooperative Work, New Orleans, Louisiana, USA, November 16-20, 2002},
pages = {354--363},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/587078.587128},
doi = {10.1145/587078.587128},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cscw/Jouppi02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HrishikeshBKSJF02,
author = {M. S. Hrishikesh and
Doug Burger and
Stephen W. Keckler and
Premkishore Shivakumar and
Norman P. Jouppi and
Keith I. Farkas},
editor = {Yale N. Patt and
Dirk Grunwald and
Kevin Skadron},
title = {The Optimal Logic Depth Per Pipeline Stage is 6 to 8 {FO4} Inverter
Delays},
booktitle = {29th International Symposium on Computer Architecture {(ISCA} 2002),
25-29 May 2002, Anchorage, AK, {USA}},
pages = {14--24},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ISCA.2002.1003558},
doi = {10.1109/ISCA.2002.1003558},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HrishikeshBKSJF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/egh/McNamaraMJ00,
author = {Bob McNamara and
Joel McCormack and
Norman P. Jouppi},
editor = {Stephen N. Spencer},
title = {Prefiltered Antialiased Lines Using Half-Plane Distance Functions},
booktitle = {Proceedings of the 2000 {ACM} {SIGGRAPH/EUROGRAPHICS} Workshop on
Graphics Hardware, Interlaken, Switzerland, August 21-22, 2000},
pages = {77--86},
publisher = {The Eurographics Association},
year = {2000},
url = {https://doi.org/10.2312/EGGH/EGGH00/077-086},
doi = {10.2312/EGGH/EGGH00/077-086},
timestamp = {Thu, 28 Sep 2023 09:26:09 +0200},
biburl = {https://dblp.org/rec/conf/egh/McNamaraMJ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RanganathanAJ00,
author = {Parthasarathy Ranganathan and
Sarita V. Adve and
Norman P. Jouppi},
editor = {Alan D. Berenbaum and
Joel S. Emer},
title = {Reconfigurable caches and their application to media processing},
booktitle = {27th International Symposium on Computer Architecture {(ISCA} 2000),
June 10-14, 2000, Vancouver, BC, Canada},
pages = {214--224},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://doi.ieeecomputersociety.org/10.1109/ISCA.2000.854392},
doi = {10.1109/ISCA.2000.854392},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/RanganathanAJ00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/FarkasCJV99,
author = {Keith I. Farkas and
Paul Chow and
Norman P. Jouppi and
Zvonko G. Vranesic},
title = {The Multicluster Architecture: Reducing Processor Cycle Time Through
Partitioning},
journal = {Int. J. Parallel Program.},
volume = {27},
number = {5},
pages = {327--356},
year = {1999},
url = {https://doi.org/10.1023/A:1018782806674},
doi = {10.1023/A:1018782806674},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/FarkasCJV99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/JouppiW99,
author = {Norman P. Jouppi and
John Wawrzynek},
title = {Real products, real technology Guest Editor's Introduction]},
journal = {{IEEE} Micro},
volume = {19},
number = {2},
pages = {10--11},
year = {1999},
url = {https://doi.org/10.1109/MM.1999.755463},
doi = {10.1109/MM.1999.755463},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/JouppiW99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/McCormackMGJDZS99,
author = {Joel McCormack and
Bob McNamara and
Chris Gianos and
Norman P. Jouppi and
Todd A. Dutton and
John H. Zurawski and
Larry Seiler and
Kenneth W. Correll},
title = {Implementing Neon: a 256-bit graphics accelerator},
journal = {{IEEE} Micro},
volume = {19},
number = {2},
pages = {58--69},
year = {1999},
url = {https://doi.org/10.1109/40.755468},
doi = {10.1109/40.755468},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/McCormackMGJDZS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/egh/JouppiC99,
author = {Norman P. Jouppi and
Chun{-}Fa Chang},
editor = {Arie E. Kaufman and
Wolfgang Stra{\ss}er and
Steven Molnar and
Bengt{-}Olaf Schneider},
title = {{Z3:} An Economical Hardware Technique for High-Quality Antialiasing
and Transparency},
booktitle = {Proceedings of the 1999 {ACM} {SIGGRAPH/EUROGRAPHICS} Workshop on
Graphics Hardware, Los Angeles, CA, USA, August 8-9, 1999},
pages = {85--94},
publisher = {The Eurographics Association},
year = {1999},
url = {https://doi.org/10.2312/EGGH/EGGH99/085-094},
doi = {10.2312/EGGH/EGGH99/085-094},
timestamp = {Tue, 06 Nov 2018 11:06:57 +0100},
biburl = {https://dblp.org/rec/conf/egh/JouppiC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/RanganathanAJ99,
author = {Parthasarathy Ranganathan and
Sarita V. Adve and
Norman P. Jouppi},
editor = {Allan Gottlieb and
William J. Dally},
title = {Performance of Image and Video Processing with General-Purpose Processors
and Media {ISA} Extensions},
booktitle = {Proceedings of the 26th Annual International Symposium on Computer
Architecture, {ISCA} 1999, Atlanta, Georgia, USA, May 2-4, 1999},
pages = {124--135},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ISCA.1999.765945},
doi = {10.1109/ISCA.1999.765945},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/RanganathanAJ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/siggraph/McCormackPFJ99,
author = {Joel McCormack and
Ronald N. Perry and
Keith I. Farkas and
Norman P. Jouppi},
editor = {Warren N. Waggenspack},
title = {Feline: Fast Elliptical Lines for Anisotropic Texture Mapping},
booktitle = {Proceedings of the 26th Annual Conference on Computer Graphics and
Interactive Techniques, {SIGGRAPH} 1999, Los Angeles, CA, USA, August
8-13, 1999},
pages = {243--250},
publisher = {{ACM}},
year = {1999},
url = {https://doi.org/10.1145/311535.311562},
doi = {10.1145/311535.311562},
timestamp = {Tue, 06 Nov 2018 16:59:14 +0100},
biburl = {https://dblp.org/rec/conf/siggraph/McCormackPFJ99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/egh/McCormackMGSJC98,
author = {Joel McCormack and
Bob McNamara and
Chris Gianos and
Larry Seiler and
Norman P. Jouppi and
Kenneth W. Correll},
editor = {Arie E. Kaufman and
Wolfgang Stra{\ss}er and
G{\"{u}}nter Knittel and
Hanspeter Pfister and
Stephen N. Spencer},
title = {Neon: {A} Single-Chip 3D Workstation Graphics Accelerator},
booktitle = {Proceedings of the 1998 {ACM} {SIGGRAPH/EUROGRAPHICS} Workshop on
Graphics Hardware, Lisbon, Portugal, August 31 - September 1, 1998},
pages = {123--132},
publisher = {The Eurographics Association},
year = {1998},
url = {https://doi.org/10.2312/EGGH/EGGH98/123-132},
doi = {10.2312/EGGH/EGGH98/123-132},
timestamp = {Tue, 06 Nov 2018 11:06:57 +0100},
biburl = {https://dblp.org/rec/conf/egh/McCormackMGSJC98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Jouppi98,
author = {Norman P. Jouppi},
editor = {Gurindar S. Sohi},
title = {Retrospective: Improving Direct-Mapped Cache Performance by the Addition
of a Small Fully-Associative Cache and Prefetch Buffers},
booktitle = {25 Years of the International Symposia on Computer Architecture (Selected
Papers)},
pages = {71--73},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/285930.285958},
doi = {10.1145/285930.285958},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/Jouppi98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Jouppi98a,
author = {Norman P. Jouppi},
editor = {Gurindar S. Sohi},
title = {Improving Direct-Mapped Cache Performance by the Addition of a Small
Fully-Associative Cache Prefetch Buffers},
booktitle = {25 Years of the International Symposia on Computer Architecture (Selected
Papers)},
pages = {388--397},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/285930.285998},
doi = {10.1145/285930.285998},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Jouppi98a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FarkasCJV97,
author = {Keith I. Farkas and
Paul Chow and
Norman P. Jouppi and
Zvonko G. Vranesic},
editor = {Andrew R. Pleszkun and
Trevor N. Mudge},
title = {Memory-System Design Considerations for Dynamically-Scheduled Processors},
booktitle = {Proceedings of the 24th International Symposium on Computer Architecture,
Denver, Colorado, USA, June 2-4, 1997},
pages = {133--143},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/264107.264156},
doi = {10.1145/264107.264156},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/FarkasCJV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PalacharlaJS97,
author = {Subbarao Palacharla and
Norman P. Jouppi and
James E. Smith},
editor = {Andrew R. Pleszkun and
Trevor N. Mudge},
title = {Complexity-Effective Superscalar Processors},
booktitle = {Proceedings of the 24th International Symposium on Computer Architecture,
Denver, Colorado, USA, June 2-4, 1997},
pages = {206--218},
publisher = {{ACM}},
year = {1997},
url = {https://doi.org/10.1145/264107.264201},
doi = {10.1145/264107.264201},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/PalacharlaJS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/FarkasCJV97,
author = {Keith I. Farkas and
Paul Chow and
Norman P. Jouppi and
Zvonko G. Vranesic},
editor = {Mark Smotherman and
Tom Conte},
title = {The Multicluster Architecture: Reducing Cycle Time Through Partitioning},
booktitle = {Proceedings of the Thirtieth Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 30, Research Triangle Park, North Carolina,
USA, December 1-3, 1997},
pages = {149--159},
publisher = {{ACM/IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/MICRO.1997.645806},
doi = {10.1109/MICRO.1997.645806},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/FarkasCJV97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/JouppiSM96,
author = {Norman P. Jouppi and
Stefanos Sidiropoulos and
Suresh Menon},
title = {A speed, power, and supply noise evaluation of {ECL} driver circuits},
journal = {{IEEE} J. Solid State Circuits},
volume = {31},
number = {1},
pages = {38--45},
year = {1996},
url = {https://doi.org/10.1109/4.485863},
doi = {10.1109/4.485863},
timestamp = {Mon, 18 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/JouppiSM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/WiltonJ96,
author = {Steven J. E. Wilton and
Norman P. Jouppi},
title = {{CACTI:} an enhanced cache access and cycle time model},
journal = {{IEEE} J. Solid State Circuits},
volume = {31},
number = {5},
pages = {677--688},
year = {1996},
url = {https://doi.org/10.1109/4.509850},
doi = {10.1109/4.509850},
timestamp = {Mon, 18 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/WiltonJ96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/FarkasJC96,
author = {Keith I. Farkas and
Norman P. Jouppi and
Paul Chow},
title = {Register File Design Considerations in Dynamically Scheduled Processors},
booktitle = {Proceedings of the Second International Symposium on High-Performance
Computer Architecture, San Jose, CA, USA, February 3-7, 1996},
pages = {40--51},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/HPCA.1996.501172},
doi = {10.1109/HPCA.1996.501172},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/FarkasJC96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/FarkasJC95,
author = {Keith I. Farkas and
Norman P. Jouppi and
Paul Chow},
title = {How Useful Are Non-Blocking Loads, Stream Buffers and Speculative
Execution in Multiple Issue Processors?},
booktitle = {Proceedings of the 1st {IEEE} Symposium on High-Performance Computer
Architecture {(HPCA} 1995), Raleigh, North Carolina, USA, January
22-25, 1995},
pages = {78--89},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/HPCA.1995.386553},
doi = {10.1109/HPCA.1995.386553},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/FarkasJC95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/JouppiBF94,
author = {Norman P. Jouppi and
Patrick D. Boyle and
John S. Fitch},
title = {Designing, packaging, and testing a 300-MHz, 115 {W} {ECL} microprocessor},
journal = {{IEEE} Micro},
volume = {14},
number = {2},
pages = {50--58},
year = {1994},
url = {https://doi.org/10.1109/40.272837},
doi = {10.1109/40.272837},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/JouppiBF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/JouppiW94,
author = {Norman P. Jouppi and
Steven J. E. Wilton},
editor = {David A. Patterson},
title = {Tradeoffs in Two-Level On-Chip Caching},
booktitle = {Proceedings of the 21st Annual International Symposium on Computer
Architecture. Chicago, IL, USA, April 1994},
pages = {34--45},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ISCA.1994.288163},
doi = {10.1109/ISCA.1994.288163},
timestamp = {Thu, 13 Apr 2023 19:55:42 +0200},
biburl = {https://dblp.org/rec/conf/isca/JouppiW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/FarkasJ94,
author = {Keith I. Farkas and
Norman P. Jouppi},
editor = {David A. Patterson},
title = {Complexity/Performance Tradeoffs with Non-Blocking Loads},
booktitle = {Proceedings of the 21st Annual International Symposium on Computer
Architecture. Chicago, IL, USA, April 1994},
pages = {211--222},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ISCA.1994.288148},
doi = {10.1109/ISCA.1994.288148},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/FarkasJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Jouppi93,
author = {Norman P. Jouppi},
editor = {Alan Jay Smith},
title = {Cache Write Policies and Performance},
booktitle = {Proceedings of the 20th Annual International Symposium on Computer
Architecture, San Diego, CA, USA, May 1993},
pages = {191--201},
publisher = {{ACM}},
year = {1993},
url = {https://doi.org/10.1145/165123.165154},
doi = {10.1145/165123.165154},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Jouppi93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/ChenBJ92,
author = {J. Bradley Chen and
Anita Borg and
Norman P. Jouppi},
editor = {Allan Gottlieb},
title = {A Simulation Based Study of {TLB} Performance},
booktitle = {Proceedings of the 19th Annual International Symposium on Computer
Architecture. Gold Coast, Australia, May 1992},
pages = {114--123},
publisher = {{ACM}},
year = {1992},
url = {https://doi.org/10.1145/139669.139708},
doi = {10.1145/139669.139708},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/ChenBJ92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/HennessyJ91,
author = {John L. Hennessy and
Norman P. Jouppi},
title = {Computer Technology and Architecture: An Evolving Interaction},
journal = {Computer},
volume = {24},
number = {9},
pages = {18--29},
year = {1991},
url = {https://doi.org/10.1109/2.84896},
doi = {10.1109/2.84896},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/HennessyJ91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Jouppi90,
author = {Norman P. Jouppi},
editor = {Jean{-}Loup Baer and
Larry Snyder and
James R. Goodman},
title = {Improving Direct-Mapped Cache Performance by the Addition of a Small
Fully-Associative Cache and Prefetch Buffers},
booktitle = {Proceedings of the 17th Annual International Symposium on Computer
Architecture, Seattle, WA, USA, June 1990},
pages = {364--373},
publisher = {{ACM}},
year = {1990},
url = {https://doi.org/10.1145/325164.325162},
doi = {10.1145/325164.325162},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Jouppi90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/Jouppi89,
author = {Norman P. Jouppi},
title = {The Nonuniform Distribution of Instruction-Level and Machine Parallelism
and Its Effect on Performance},
journal = {{IEEE} Trans. Computers},
volume = {38},
number = {12},
pages = {1645--1658},
year = {1989},
url = {https://doi.org/10.1109/12.40844},
doi = {10.1109/12.40844},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/Jouppi89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/JouppiBW89,
author = {Norman P. Jouppi and
Jonathan Bertoni and
David W. Wall},
editor = {Joel S. Emer and
John L. Hennessy},
title = {A Unified Vector/Scalar Floating-Point Architecture},
booktitle = {{ASPLOS-III} Proceedings - Third International Conference on Architectural
Support for Programming Languages and Operating Systems, Boston, Massachusetts,
USA, April 3-6, 1989},
pages = {134--143},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/70082.68195},
doi = {10.1145/70082.68195},
timestamp = {Wed, 07 Jul 2021 13:23:09 +0200},
biburl = {https://dblp.org/rec/conf/asplos/JouppiBW89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/JouppiW89,
author = {Norman P. Jouppi and
David W. Wall},
editor = {Joel S. Emer and
John L. Hennessy},
title = {Available Instruction-Level Parallelism for Superscalar and Superpipelined
Machines},
booktitle = {{ASPLOS-III} Proceedings - Third International Conference on Architectural
Support for Programming Languages and Operating Systems, Boston, Massachusetts,
USA, April 3-6, 1989},
pages = {272--282},
publisher = {{ACM} Press},
year = {1989},
url = {https://doi.org/10.1145/70082.68207},
doi = {10.1145/70082.68207},
timestamp = {Wed, 07 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/JouppiW89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Jouppi89,
author = {Norman P. Jouppi},
title = {Integration and packaging plateaus of processor performance},
booktitle = {Computer Design: {VLSI} in Computers and Processors, {ICCD} 1989.
Proceedings., 1989 {IEEE} International Conference on, Cambridge,
MA, USA, October 2-4, 1989},
pages = {229--232},
publisher = {{IEEE}},
year = {1989},
url = {https://doi.org/10.1109/ICCD.1989.63361},
doi = {10.1109/ICCD.1989.63361},
timestamp = {Mon, 09 Aug 2021 14:54:02 +0200},
biburl = {https://dblp.org/rec/conf/iccd/Jouppi89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/Jouppi89,
author = {Norman P. Jouppi},
editor = {Jean{-}Claude Syre},
title = {Architectural and Organizational Tradeoffs in the Design of the MultiTitan
{CPU}},
booktitle = {Proceedings of the 16th Annual International Symposium on Computer
Architecture. Jerusalem, Israel, June 1989},
pages = {281--289},
publisher = {{ACM}},
year = {1989},
url = {https://doi.org/10.1145/74925.74957},
doi = {10.1145/74925.74957},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/Jouppi89.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/Jouppi88,
author = {Norman P. Jouppi},
title = {Superscalar vs. superpipelined machines},
journal = {{SIGARCH} Comput. Archit. News},
volume = {16},
number = {3},
pages = {71--80},
year = {1988},
url = {https://doi.org/10.1145/48675.48686},
doi = {10.1145/48675.48686},
timestamp = {Fri, 09 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/Jouppi88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Jouppi87,
author = {Norman P. Jouppi},
title = {Derivation of Signal Flow Direction in {MOS} {VLSI}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {6},
number = {3},
pages = {480--490},
year = {1987},
url = {https://doi.org/10.1109/TCAD.1987.1270295},
doi = {10.1109/TCAD.1987.1270295},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Jouppi87.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Jouppi87a,
author = {Norman P. Jouppi},
title = {Timing Analysis and Performance Improvement of {MOS} {VLSI} Designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {6},
number = {4},
pages = {650--665},
year = {1987},
url = {https://doi.org/10.1109/TCAD.1987.1270311},
doi = {10.1109/TCAD.1987.1270311},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Jouppi87a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/Jouppi83,
author = {Norman P. Jouppi},
editor = {Charles E. Radke},
title = {Timing analysis for nMOS {VLSI}},
booktitle = {Proceedings of the 20th Design Automation Conference, {DAC} '83, Miami
Beach, Florida, USA, June 27-29, 1983},
pages = {411--418},
publisher = {{ACM/IEEE}},
year = {1983},
url = {http://dl.acm.org/citation.cfm?id=800700},
timestamp = {Wed, 29 Mar 2017 16:45:25 +0200},
biburl = {https://dblp.org/rec/conf/dac/Jouppi83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/HennessyJBGG82,
author = {John L. Hennessy and
Norman P. Jouppi and
Forest Baskett and
Thomas R. Gross and
John Gill},
editor = {David R. Ditzel and
Lloyd Dickman},
title = {Hardware/Software Tradeoffs for Increased Performance},
booktitle = {Proceedings of the Symposium on Architectural Support for Programming
Languages and Operating Systems, Palo Alto, California, USA, March
1-3, 1982},
pages = {2--11},
publisher = {{ACM} Press},
year = {1982},
url = {https://doi.org/10.1145/800050.801820},
doi = {10.1145/800050.801820},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/HennessyJBGG82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/compcon/HennessyJGBSGRL82,
author = {John L. Hennessy and
Norman P. Jouppi and
John Gill and
Forest Baskett and
Alex Strong and
Thomas R. Gross and
Christopher Rowen and
Judson S. Leonard},
title = {The {MIPS} Machine},
booktitle = {COMPCON'82, Digest of Papers, Twenty-Fourth {IEEE} Computer Society
International Conference, San Francisco, California, USA, February
22-25, 1982},
pages = {2--7},
publisher = {{IEEE} Computer Society},
year = {1982},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/compcon/HennessyJGBSGRL82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/HennessyJPRGBG82,
author = {John L. Hennessy and
Norman P. Jouppi and
Steven A. Przybylski and
Christopher Rowen and
Thomas R. Gross and
Forest Baskett and
John Gill},
editor = {Joseph A. Fisher and
William J. Tracz and
William C. Hopkins},
title = {{MIPS:} {A} microprocessor architecture},
booktitle = {Proceedings of the 15th annual workshop on Microprogramming, {MICRO}
1982, Palo Alto, California, USA, October 5-7, 1982},
pages = {17--22},
publisher = {{ACM/IEEE}},
year = {1982},
url = {http://dl.acm.org/citation.cfm?id=800930},
timestamp = {Thu, 25 Sep 2014 17:21:53 +0200},
biburl = {https://dblp.org/rec/conf/micro/HennessyJPRGBG82.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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