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BibTeX records: Jer-Min Jou
@inproceedings{DBLP:conf/intcompsymp/ChenLJ14, author = {Chun{-}Yu Chen and Yun{-}Lung Lee and Jer{-}Min Jou}, editor = {William Cheng{-}Chung Chu and Han{-}Chieh Chao and Stephen Jenn{-}Hwa Yang}, title = {A Transaction-based Design Model and Its {MPEG-2} Encoder Design}, booktitle = {Intelligent Systems and Applications - Proceedings of the International Computer Symposium {(ICS)} held at Taichung, Taiwan, December 12-14, 2014}, series = {Frontiers in Artificial Intelligence and Applications}, volume = {274}, pages = {205--214}, publisher = {{IOS} Press}, year = {2014}, url = {https://doi.org/10.3233/978-1-61499-484-8-205}, doi = {10.3233/978-1-61499-484-8-205}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/intcompsymp/ChenLJ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/intcompsymp/HsiehJ14, author = {Cheng{-}Hung Hsieh and Jer{-}Min Jou}, editor = {William Cheng{-}Chung Chu and Han{-}Chieh Chao and Stephen Jenn{-}Hwa Yang}, title = {A Run-time Manager for Multithreading of Multi-core Systems}, booktitle = {Intelligent Systems and Applications - Proceedings of the International Computer Symposium {(ICS)} held at Taichung, Taiwan, December 12-14, 2014}, series = {Frontiers in Artificial Intelligence and Applications}, volume = {274}, pages = {1456--1465}, publisher = {{IOS} Press}, year = {2014}, url = {https://doi.org/10.3233/978-1-61499-484-8-1456}, doi = {10.3233/978-1-61499-484-8-1456}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/intcompsymp/HsiehJ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/JouLW11, author = {Jer{-}Min Jou and Yun{-}Lung Lee and Sih{-}Sian Wu}, title = {Model-Driven Design and Generation of New Multi-Facet Arbiters: From the Design Model to the Hardware Synthesis}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {30}, number = {8}, pages = {1184--1196}, year = {2011}, url = {https://doi.org/10.1109/TCAD.2011.2139211}, doi = {10.1109/TCAD.2011.2139211}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/JouLW11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jise/JouL10, author = {Jer{-}Min Jou and Yun{-}Lung Lee}, title = {An Optimal Round-Robin Arbiter Design for NoC}, journal = {J. Inf. Sci. Eng.}, volume = {26}, number = {6}, pages = {2047--2058}, year = {2010}, url = {http://www.iis.sinica.edu.tw/page/jise/2010/201011\_07.html}, timestamp = {Fri, 16 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jise/JouL10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/JouWLCJ10, author = {Jer{-}Min Jou and Sih{-}Sian Wu and Yun{-}Lung Lee and Cheng Chou and Yuan{-}Long Jeang}, editor = {Sachin S. Sapatnekar}, title = {New model-driven design and generation of multi-facet arbiters part {I:} from the design model to the architecture model}, booktitle = {Proceedings of the 47th Design Automation Conference, {DAC} 2010, Anaheim, California, USA, July 13-18, 2010}, pages = {258--261}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1837274.1837340}, doi = {10.1145/1837274.1837340}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/JouWLCJ10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/sasp/JouLW10, author = {Jer{-}Min Jou and Yun{-}Lung Lee and Sih{-}Sian Wu}, title = {Efficient design and generation of a multi-facet arbiter}, booktitle = {{IEEE} 8th Symposium on Application Specific Processors, {SASP} 2010, Anaheim, CA, USA, June 13-14, 2010}, pages = {111--114}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/SASP.2010.5521137}, doi = {10.1109/SASP.2010.5521137}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/sasp/JouLW10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aiccsa/LeeJC09, author = {Yun{-}Lung Lee and Jer{-}Min Jou and Yen{-}Yu Chen}, editor = {El Mostapha Aboulhamid and Jos{\'{e}} Luis Sevillano}, title = {A high-speed and decentralized arbiter design for NoC}, booktitle = {The 7th {IEEE/ACS} International Conference on Computer Systems and Applications, {AICCSA} 2009, Rabat, Morocco, May 10-13, 2009}, pages = {350--353}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/AICCSA.2009.5069347}, doi = {10.1109/AICCSA.2009.5069347}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aiccsa/LeeJC09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/JouLLS07, author = {Jer{-}Min Jou and Yun{-}Lung Lee and Chen{-}Yen Lin and Chien{-}Ming Sun}, title = {A Novel Reconfigurable Computation Unit for {DSP} Applications}, booktitle = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI} 2007), May 9-11, 2007, Porto Alegre, Brazil}, pages = {439--444}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/ISVLSI.2007.12}, doi = {10.1109/ISVLSI.2007.12}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/JouLLS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/JeangJH05, author = {Yuan{-}Long Jeang and Jer{-}Min Jou and Win{-}Hsien Huang}, title = {A Binary Tree Based Methodology for Designing an Application Specific Network-on-Chip {(ASNOC)}}, journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.}, volume = {88-A}, number = {12}, pages = {3531--3538}, year = {2005}, url = {https://doi.org/10.1093/ietfec/e88-a.12.3531}, doi = {10.1093/IETFEC/E88-A.12.3531}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/JeangJH05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ieicet/ShiauJL04, author = {Yeu{-}Horng Shiau and Jer{-}Min Jou and Chin{-}Chi Liu}, title = {Efficient Architectures for the Biorthogonal Wavelet Transform by Filter Bank and Lifting Scheme}, journal = {{IEICE} Trans. Inf. Syst.}, volume = {87-D}, number = {7}, pages = {1867--1877}, year = {2004}, url = {http://search.ieice.org/bin/summary.php?id=e87-d\_7\_1867}, timestamp = {Sat, 11 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ieicet/ShiauJL04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/JouKSC02, author = {Jer{-}Min Jou and Shiann{-}Rong Kuang and Yeu{-}Horng Shiau and Ren{-}Der Chen}, title = {Design of a dynamic pipelined architecture for fuzzy color correction}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {10}, number = {6}, pages = {924--929}, year = {2002}, url = {https://doi.org/10.1109/TVLSI.2002.808458}, doi = {10.1109/TVLSI.2002.808458}, timestamp = {Wed, 11 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/JouKSC02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tsmc/ChenJ01, author = {Pei{-}Yin Chen and Jer{-}Min Jou}, title = {An efficient blocking-matching algorithm based on fuzzy reasoning}, journal = {{IEEE} Trans. Syst. Man Cybern. Part {B}}, volume = {31}, number = {2}, pages = {253--259}, year = {2001}, url = {https://doi.org/10.1109/3477.915349}, doi = {10.1109/3477.915349}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tsmc/ChenJ01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/JouSH01, author = {Jer{-}Min Jou and Yeu{-}Horng Shiau and Chen{-}Jen Huang}, title = {An efficient {VLSI} architecture for HMM-based speech recognition}, booktitle = {Proceedings of the 2001 8th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 2001, Malta, September 2-5, 2001}, pages = {469--472}, publisher = {{IEEE}}, year = {2001}, url = {https://doi.org/10.1109/ICECS.2001.957780}, doi = {10.1109/ICECS.2001.957780}, timestamp = {Mon, 09 Aug 2021 14:54:04 +0200}, biburl = {https://dblp.org/rec/conf/icecsys/JouSH01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/JouSL01, author = {Jer{-}Min Jou and Yeu{-}Horng Shiau and Chin{-}Chi Liu}, title = {Efficient {VLSI} architectures for the biorthogonal wavelet transform by filter bank and lifting scheme}, booktitle = {Proceedings of the 2001 International Symposium on Circuits and Systems, {ISCAS} 2001, Sydney, Australia, May 6-9, 2001}, pages = {529--532}, publisher = {{IEEE}}, year = {2001}, url = {https://doi.org/10.1109/ISCAS.2001.921124}, doi = {10.1109/ISCAS.2001.921124}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/JouSL01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/fss/ChenJ00, author = {Pei{-}Yin Chen and Jer{-}Min Jou}, title = {Adaptive arithmetic coding using fuzzy reasoning and grey prediction}, journal = {Fuzzy Sets Syst.}, volume = {114}, number = {2}, pages = {239--254}, year = {2000}, url = {https://doi.org/10.1016/S0165-0114(98)00148-1}, doi = {10.1016/S0165-0114(98)00148-1}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/fss/ChenJ00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tvlsi/JouCY00, author = {Jer{-}Min Jou and Pei{-}Yin Chen and Sheng{-}Fu Yang}, title = {An adaptive fuzzy logic controller: its {VLSI} architecture and applications}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {8}, number = {1}, pages = {52--60}, year = {2000}, url = {https://doi.org/10.1109/92.820761}, doi = {10.1109/92.820761}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/JouCY00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcom/JouC99, author = {Jer{-}Min Jou and Pei{-}Yin Chen}, title = {A fast and efficient lossless data-compression method}, journal = {{IEEE} Trans. Commun.}, volume = {47}, number = {9}, pages = {1278--1283}, year = {1999}, url = {https://doi.org/10.1109/26.789659}, doi = {10.1109/26.789659}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcom/JouC99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcsv/JouCS99, author = {Jer{-}Min Jou and Pei{-}Yin Chen and Jian{-}Ming Sun}, title = {The gray prediction search algorithm for block motion estimation}, journal = {{IEEE} Trans. Circuits Syst. Video Technol.}, volume = {9}, number = {6}, pages = {843--848}, year = {1999}, url = {https://doi.org/10.1109/76.785721}, doi = {10.1109/76.785721}, timestamp = {Thu, 23 Jun 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcsv/JouCS99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/ChenJS99, author = {Ren{-}Der Chen and Jer{-}Min Jou and Yeu{-}Horng Shiau}, title = {Hazard-Free Synthesis and Decomposition of Asynchronous Circuits}, booktitle = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999}, pages = {185--188}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ASPDAC.1999.759991}, doi = {10.1109/ASPDAC.1999.759991}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/ChenJS99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/JouCSL99, author = {Jer{-}Min Jou and Pei{-}Yin Chen and Yeu{-}Horng Shiau and Ming{-}Shiang Liang}, title = {A Scalable Pipelined Architecture for Separable 2-D Discrete Wavelet Transform}, booktitle = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999}, pages = {205--208}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ASPDAC.1999.759996}, doi = {10.1109/ASPDAC.1999.759996}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/JouCSL99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/JouKS99, author = {Jer{-}Min Jou and Shiann{-}Rong Kuang and Yeu{-}Horng Shiau}, title = {A New Pipelined Architecture for Fuzzy Color Correction}, booktitle = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999}, pages = {209}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ASPDAC.1999.759997}, doi = {10.1109/ASPDAC.1999.759997}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/JouKS99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/ChenJS99, author = {Ren{-}Der Chen and Jer{-}Min Jou and Yeu{-}Horng Shiau}, title = {An efficient method for the decomposition and resynthesis of speed-independent circuits}, booktitle = {6th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 1999, Pafos, Cyprus, September 5-8, 1999}, pages = {339--342}, publisher = {{IEEE}}, year = {1999}, url = {https://doi.org/10.1109/ICECS.1999.812292}, doi = {10.1109/ICECS.1999.812292}, timestamp = {Mon, 09 Aug 2021 14:54:04 +0200}, biburl = {https://dblp.org/rec/conf/icecsys/ChenJS99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icecsys/JouCSS99, author = {Jer{-}Min Jou and Pei{-}Yin Chen and Yeu{-}Horng Shiau and Jian{-}Ming Sun}, title = {A grey prediction motion estimator for digital image processing}, booktitle = {6th {IEEE} International Conference on Electronics, Circuits and Systems, {ICECS} 1999, Pafos, Cyprus, September 5-8, 1999}, pages = {701--704}, publisher = {{IEEE}}, year = {1999}, url = {https://doi.org/10.1109/ICECS.1999.813205}, doi = {10.1109/ICECS.1999.813205}, timestamp = {Tue, 02 Feb 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/icecsys/JouCSS99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/ChenJ97, author = {Shung{-}Chih Chen and Jer{-}Min Jou}, title = {Serial diagnostic fault simulation for synchronous sequential circuits}, journal = {Integr.}, volume = {23}, number = {2}, pages = {157--170}, year = {1997}, url = {https://doi.org/10.1016/S0167-9260(97)00020-5}, doi = {10.1016/S0167-9260(97)00020-5}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/ChenJ97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tcad/ChenJ97, author = {Shung{-}Chih Chen and Jer{-}Min Jou}, title = {Diagnostic fault simulation for synchronous sequential circuits}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {16}, number = {3}, pages = {299--308}, year = {1997}, url = {https://doi.org/10.1109/43.594835}, doi = {10.1109/43.594835}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/ChenJ97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/JouC95, author = {Jer{-}Min Jou and Shung{-}Chih Chen}, title = {Distributed Diagnostic Fault Simulation for Synchronous Sequential Circuits by Dynamic Fault Partitioning}, booktitle = {1995 {IEEE} International Symposium on Circuits and Systems, {ISCAS} 1995, Seattle, Washington, USA, April 30 - May 3, 1995}, pages = {2004--2007}, publisher = {{IEEE}}, year = {1995}, url = {https://doi.org/10.1109/ISCAS.1995.523815}, doi = {10.1109/ISCAS.1995.523815}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/JouC95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccad/JouC94, author = {Jer{-}Min Jou and Shung{-}Chih Chen}, editor = {Jochen A. G. Jess and Richard L. Rudell}, title = {A fast and memory-efficient diagnostic fault simulation for sequential circuits}, booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994}, pages = {723--726}, publisher = {{IEEE} Computer Society / {ACM}}, year = {1994}, url = {https://doi.org/10.1109/ICCAD.1994.629903}, doi = {10.1109/ICCAD.1994.629903}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccad/JouC94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/JouCK94, author = {Jer{-}Min Jou and Ren{-}Der Chen and Shiann{-}Rong Kuang}, title = {Multiport Memory Based Data Path Allocation Focusing on Interconnection Optimization}, booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS} 1994, London, England, UK, May 30 - June 2, 1994}, pages = {45--48}, publisher = {{IEEE}}, year = {1994}, url = {https://doi.org/10.1109/ISCAS.1994.408751}, doi = {10.1109/ISCAS.1994.408751}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/JouCK94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/JouCC94, author = {Jer{-}Min Jou and Shung{-}Chih Chen and Ren{-}Der Chen}, title = {A Super Fast {\&} Memory Efficient Diagnostic Simulation Algorithm for Combinatorial Circuits}, booktitle = {1994 {IEEE} International Symposium on Circuits and Systems, {ISCAS} 1994, London, England, UK, May 30 - June 2, 1994}, pages = {85--88}, publisher = {{IEEE}}, year = {1994}, url = {https://doi.org/10.1109/ISCAS.1994.408761}, doi = {10.1109/ISCAS.1994.408761}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/iscas/JouCC94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/JouK93, author = {Jer{-}Min Jou and Shiann{-}Rong Kuang}, title = {Library-Adaptively Integrated Data Path Synthesis for {DSP} Systems}, booktitle = {Proceedings 1993 International Conference on Computer Design: {VLSI} in Computers {\&} Processors, {ICCD} '93, Cambridge, MA, USA, October 3-6, 1993}, pages = {379--382}, publisher = {{IEEE} Computer Society}, year = {1993}, url = {https://doi.org/10.1109/ICCD.1993.393348}, doi = {10.1109/ICCD.1993.393348}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/JouK93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/JouLSW90, author = {Jer{-}Min Jou and Jau{-}Yien Lee and Yachyang Sun and Jhing{-}Fa Wang}, title = {An Efficient {VLSI} Switch-Box Router}, journal = {{IEEE} Des. Test Comput.}, volume = {7}, number = {4}, pages = {52--65}, year = {1990}, url = {https://doi.org/10.1109/54.57914}, doi = {10.1109/54.57914}, timestamp = {Sun, 17 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/dt/JouLSW90.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/integration/JouL89, author = {Jer{-}Min Jou and Jau{-}Yien Lee}, title = {A new 3-layer rectilinear area router with obstacle avoidance}, journal = {Integr.}, volume = {7}, number = {1}, pages = {1--20}, year = {1989}, url = {https://doi.org/10.1016/0167-9260(89)90056-4}, doi = {10.1016/0167-9260(89)90056-4}, timestamp = {Thu, 20 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/integration/JouL89.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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