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BibTeX records: Chris R. Jesshope
@article{DBLP:journals/jsa/UddinPJ14, author = {Muhammad Irfan Uddin and Raphael Poss and Chris R. Jesshope}, title = {Cache-based high-level simulation of microthreaded many-core architectures}, journal = {J. Syst. Archit.}, volume = {60}, number = {7}, pages = {529--552}, year = {2014}, url = {https://doi.org/10.1016/j.sysarc.2014.05.003}, doi = {10.1016/J.SYSARC.2014.05.003}, timestamp = {Mon, 11 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/UddinPJ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tecs/0006FPJ14, author = {Qiang Yang and Jian Fu and Raphael Poss and Chris R. Jesshope}, title = {On-chip traffic regulation to reduce coherence protocol cost on a microthreaded many-core architecture with distributed caches}, journal = {{ACM} Trans. Embed. Comput. Syst.}, volume = {13}, number = {3s}, pages = {103:1--103:21}, year = {2014}, url = {https://doi.org/10.1145/2567931}, doi = {10.1145/2567931}, timestamp = {Tue, 08 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tecs/0006FPJ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/IEEEares/Fu0PJZ14, author = {Jian Fu and Qiang Yang and Raphael Poss and Chris R. Jesshope and Chunyuan Zhang}, title = {Rethread: {A} Low-Cost Transient Fault Recovery Scheme for Multithreaded Processors}, booktitle = {Ninth International Conference on Availability, Reliability and Security, {ARES} 2014, Fribourg, Switzerland, September 8-12, 2014}, pages = {88--93}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ARES.2014.18}, doi = {10.1109/ARES.2014.18}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/IEEEares/Fu0PJZ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/Fu0PJZ14, author = {Jian Fu and Qiang Yang and Raphael Poss and Chris R. Jesshope and Chunyuan Zhang}, editor = {Gerhard P. Fettweis and Wolfgang Nebel}, title = {A fault detection mechanism in a Data-flow scheduled Multithreaded processor}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2014, Dresden, Germany, March 24-28, 2014}, pages = {1--4}, publisher = {European Design and Automation Association}, year = {2014}, url = {https://doi.org/10.7873/DATE.2014.076}, doi = {10.7873/DATE.2014.076}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/date/Fu0PJZ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/pdp/UddinPJ14, author = {Muhammad Irfan Uddin and Raphael Poss and Chris R. Jesshope}, title = {Analytical-Based High-Level Simulation of the Microthreaded Many-Core Architectures}, booktitle = {22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, {PDP} 2014, Torino, Italy, February 12-14, 2014}, pages = {344--351}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/PDP.2014.81}, doi = {10.1109/PDP.2014.81}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/pdp/UddinPJ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/simultech/UddinPJ14, author = {Muhammad Irfan Uddin and Raphael Poss and Chris R. Jesshope}, title = {Signature-based high-level simulation of microthreaded many-core architectures}, booktitle = {4th International Conference On Simulation And Modeling Methodologies, Technologies And Applications, {SIMULTECH} 2014, Vienna, Austria, August 28-30, 2014}, pages = {509--516}, publisher = {{IEEE}}, year = {2014}, url = {https://ieeexplore.ieee.org/document/7095069/}, timestamp = {Wed, 11 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/simultech/UddinPJ14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/PossLYFTUJ13, author = {Raphael Poss and Mike Lankamp and Qiang Yang and Jian Fu and Michiel W. van Tol and Muhammad Irfan Uddin and Chris R. Jesshope}, title = {Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management}, journal = {Microprocess. Microsystems}, volume = {37}, number = {8-C}, pages = {1090--1101}, year = {2013}, url = {https://doi.org/10.1016/j.micpro.2013.05.004}, doi = {10.1016/J.MICPRO.2013.05.004}, timestamp = {Mon, 11 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/PossLYFTUJ13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/PossLYFUJ13, author = {Raphael Poss and Mike Lankamp and Qiang Yang and Jian Fu and Muhammad Irfan Uddin and Chris R. Jesshope}, title = {MGSim - {A} simulation environment for multi-core research and education}, booktitle = {2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2013, Agios Konstantinos, Samos Island, Greece, July 15-18, 2013}, pages = {80--87}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/SAMOS.2013.6621109}, doi = {10.1109/SAMOS.2013.6621109}, timestamp = {Mon, 11 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/samos/PossLYFUJ13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/Fu0PJZ13, author = {Jian Fu and Qiang Yang and Raphael Poss and Chris R. Jesshope and Chunyuan Zhang}, title = {On-demand thread-level fault detection in a concurrent programming environment}, booktitle = {2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, {SAMOS} 2013, Agios Konstantinos, Samos Island, Greece, July 15-18, 2013}, pages = {255--262}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/SAMOS.2013.6621132}, doi = {10.1109/SAMOS.2013.6621132}, timestamp = {Thu, 25 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/samos/Fu0PJZ13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/corr/abs-1302-1390, author = {Mike Lankamp and Raphael 'kena' Poss and Qiang Yang and Jian Fu and Muhammad Irfan Uddin and Chris R. Jesshope}, title = {MGSim - Simulation tools for multi-core processor architectures}, journal = {CoRR}, volume = {abs/1302.1390}, year = {2013}, url = {http://arxiv.org/abs/1302.1390}, eprinttype = {arXiv}, eprint = {1302.1390}, timestamp = {Mon, 11 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/corr/abs-1302-1390.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/PossLYFTJ12, author = {Raphael Poss and Mike Lankamp and Qiang Yang and Jian Fu and Michiel W. van Tol and Chris R. Jesshope}, title = {Apple-CORE: Microgrids of {SVP} Cores - Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management}, booktitle = {15th Euromicro Conference on Digital System Design, {DSD} 2012, Cesme, Izmir, Turkey, September 5-8, 2012}, pages = {501--508}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/DSD.2012.25}, doi = {10.1109/DSD.2012.25}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/PossLYFTJ12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/rapido/UddinJTP12, author = {Muhammad Irfan Uddin and Chris R. Jesshope and Michiel W. van Tol and Raphael Poss}, editor = {Daniel Gracia P{\'{e}}rez and Sma{\"{\i}}l Niar and Cristina Silvano and Morteza Biglari{-}Abhari}, title = {Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores}, booktitle = {Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, {RAPIDO} '12, 23 January, 2012, Paris, France}, pages = {1--8}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2162131.2162132}, doi = {10.1145/2162131.2162132}, timestamp = {Mon, 11 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/rapido/UddinJTP12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ppl/UddinTJ11, author = {Muhammad Irfan Uddin and Michiel W. van Tol and Chris R. Jesshope}, title = {High Level Simulation of {SVP} Many-Core Systems}, journal = {Parallel Process. Lett.}, volume = {21}, number = {4}, pages = {413--438}, year = {2011}, url = {https://doi.org/10.1142/S0129626411000308}, doi = {10.1142/S0129626411000308}, timestamp = {Mon, 11 Jan 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ppl/UddinTJ11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ipps/YangJF11, author = {Qiang Yang and Chris R. Jesshope and Jian Fu}, title = {A Micro Threading Based Concurrency Model for Parallel Computing}, booktitle = {25th {IEEE} International Symposium on Parallel and Distributed Processing, {IPDPS} 2011, Anchorage, Alaska, USA, 16-20 May 2011 - Workshop Proceedings}, pages = {1668--1674}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/IPDPS.2011.323}, doi = {10.1109/IPDPS.2011.323}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ipps/YangJF11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/marc/TolBVGJ11, author = {Michiel W. van Tol and Roy Bakker and Merijn Verstraaten and Clemens Grelck and Chris R. Jesshope}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner and J{\"{u}}rgen Becker}, title = {Efficient Memory Copy Operations on the 48-core Intel {SCC} Processor}, booktitle = {3rd Many-core Applications Research Community {(MARC)} Symposium. Proceedings of the 3rd {MARC} Symposium, Ettlingen, Germany, July 5-6, 2011}, pages = {13--18}, publisher = {{KIT} Scientific Publishing, Karlsruhe}, year = {2011}, url = {http://digbib.ubka.uni-karlsruhe.de/volltexte/1000023937}, timestamp = {Wed, 28 Apr 2021 16:06:57 +0200}, biburl = {https://dblp.org/rec/conf/marc/TolBVGJ11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/marc/VerstraatenGTBJ11, author = {Merijn Verstraaten and Clemens Grelck and Michiel W. van Tol and Roy Bakker and Chris R. Jesshope}, editor = {Diana G{\"{o}}hringer and Michael H{\"{u}}bner and J{\"{u}}rgen Becker}, title = {Mapping Distributed S-Net on the 48-core Intel {SCC} processor}, booktitle = {3rd Many-core Applications Research Community {(MARC)} Symposium. Proceedings of the 3rd {MARC} Symposium, Ettlingen, Germany, July 5-6, 2011}, pages = {41--46}, publisher = {{KIT} Scientific Publishing, Karlsruhe}, year = {2011}, url = {http://digbib.ubka.uni-karlsruhe.de/volltexte/1000023937}, timestamp = {Fri, 11 Nov 2011 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/marc/VerstraatenGTBJ11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/parco/GrelckHHHJKSSBW11, author = {Clemens Grelck and Kevin Hammond and Heinz Hertlein and Philip K. F. H{\"{o}}lzenspies and Chris R. Jesshope and Raimund Kirner and Bernd Scheuermann and Alexander V. Shafarenko and Iraneus te Boekhorst and Volkmar Wieser}, editor = {Koen De Bosschere and Erik H. D'Hollander and Gerhard R. Joubert and David A. Padua and Frans J. Peters and Mark Sawyer}, title = {Engineering Concurrent Software Guided by Statistical Performance Analysis}, booktitle = {Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August - 3 September 2011, Ghent, Belgium}, series = {Advances in Parallel Computing}, volume = {22}, pages = {385--394}, publisher = {{IOS} Press}, year = {2011}, url = {https://doi.org/10.3233/978-1-61499-041-3-385}, doi = {10.3233/978-1-61499-041-3-385}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/parco/GrelckHHHJKSSBW11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ppl/BernardGJ10, author = {Thomas A. M. Bernard and Clemens Grelck and Chris R. Jesshope}, title = {On the Compilation of a Language for General Concurrent Target Architectures}, journal = {Parallel Process. Lett.}, volume = {20}, number = {1}, pages = {51--69}, year = {2010}, url = {https://doi.org/10.1142/S0129626410000053}, doi = {10.1142/S0129626410000053}, timestamp = {Tue, 24 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ppl/BernardGJ10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/europar/BernardGHJP10, author = {Thomas A. M. Bernard and Clemens Grelck and Michael A. Hicks and Chris R. Jesshope and Raphael Poss}, editor = {Mario R. Guarracino and Fr{\'{e}}d{\'{e}}ric Vivien and Jesper Larsson Tr{\"{a}}ff and Mario Cannataro and Marco Danelutto and Anders Hast and Francesca Perla and Andreas Kn{\"{u}}pfer and Beniamino Di Martino and Michael Alexander}, title = {Resource-Agnostic Programming for Many-Core Microgrids}, booktitle = {Euro-Par 2010 Parallel Processing Workshops - HeteroPar, HPCC, HiBB, CoreGrid, UCHPC, HPCF, PROPER, CCPI, VHPC, Ischia, Italy, August 31-September 3, 2010, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {6586}, pages = {109--116}, publisher = {Springer}, year = {2010}, url = {https://doi.org/10.1007/978-3-642-21878-1\_14}, doi = {10.1007/978-3-642-21878-1\_14}, timestamp = {Wed, 23 Jun 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/europar/BernardGHJP10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpc/TolJ10, author = {Michiel W. van Tol and Chris R. Jesshope}, editor = {Ian T. Foster and Wolfgang Gentzsch and Lucio Grandinetti and Gerhard R. Joubert}, title = {An Operating System Strategy for General-purpose Parallel Computing on Many-core Architectures}, booktitle = {High Performance Computing: From Grids and Clouds to Exascale - Selected Papers from the High Performance Computing Workshop, Cetraro, Italy, June 21-25, 2010}, series = {Advances in Parallel Computing}, volume = {20}, pages = {157--181}, publisher = {{IOS} Press}, year = {2010}, url = {https://doi.org/10.3233/978-1-60750-803-8-157}, doi = {10.3233/978-1-60750-803-8-157}, timestamp = {Sun, 21 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hpc/TolJ10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/HicksTJ10, author = {Michael A. Hicks and Michiel W. van Tol and Chris R. Jesshope}, editor = {Fadi J. Kurdahi and Jarmo Takala}, title = {Towards scalable {I/O} on a many-core architecture}, booktitle = {Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2010), Samos, Greece, July 19-22, 2010}, pages = {341--348}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ICSAMOS.2010.5642045}, doi = {10.1109/ICSAMOS.2010.5642045}, timestamp = {Wed, 23 Jun 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/samos/HicksTJ10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/BousiasGJL09, author = {Kostas Bousias and Liang Guang and Chris R. Jesshope and Mike Lankamp}, title = {Implementation and evaluation of a microthread architecture}, journal = {J. Syst. Archit.}, volume = {55}, number = {3}, pages = {149--161}, year = {2009}, url = {https://doi.org/10.1016/j.sysarc.2008.07.001}, doi = {10.1016/J.SYSARC.2008.07.001}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/BousiasGJL09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/TolJLP09, author = {Michiel W. van Tol and Chris R. Jesshope and Mike Lankamp and Simon Polstra}, title = {An implementation of the {SANE} Virtual Processor using {POSIX} threads}, journal = {J. Syst. Archit.}, volume = {55}, number = {3}, pages = {162--169}, year = {2009}, url = {https://doi.org/10.1016/j.sysarc.2008.09.006}, doi = {10.1016/J.SYSARC.2008.09.006}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jsa/TolJLP09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/sigarch/JesshopeLZ09, author = {Chris R. Jesshope and Mike Lankamp and Li Zhang}, title = {The implementation of an {SVP} many-core processor and the evaluation of its memory architecture}, journal = {{SIGARCH} Comput. Archit. News}, volume = {37}, number = {2}, pages = {38--45}, year = {2009}, url = {https://doi.org/10.1145/1577129.1577136}, doi = {10.1145/1577129.1577136}, timestamp = {Thu, 30 Jul 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/sigarch/JesshopeLZ09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/arcs/JesshopeLZ09, author = {Chris R. Jesshope and Mike Lankamp and Li Zhang}, editor = {Mladen Berekovic and Christian M{\"{u}}ller{-}Schloer and Christian Hochberger and Stephan Wong}, title = {Evaluating CMPs and Their Memory Architecture}, booktitle = {Architecture of Computing Systems - {ARCS} 2009, 22nd International Conference, Delft, The Netherlands, March 10-13, 2009. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {5455}, pages = {246--257}, publisher = {Springer}, year = {2009}, url = {https://doi.org/10.1007/978-3-642-00454-4\_24}, doi = {10.1007/978-3-642-00454-4\_24}, timestamp = {Tue, 14 May 2019 10:00:52 +0200}, biburl = {https://dblp.org/rec/conf/arcs/JesshopeLZ09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/europar/ForsellHJJVT09, author = {Martti Forsell and H. Peter Hofstee and Ahmed Jerraya and Chris R. Jesshope and Uzi Vishkin and Jesper Larsson Tr{\"{a}}ff}, editor = {Hai{-}Xiang Lin and Michael Alexander and Martti Forsell and Andreas Kn{\"{u}}pfer and Radu Prodan and Leonel Sousa and Achim Streit}, title = {{HPPC} 2009 Panel: Are Many-Core Computer Vendors on Track?}, booktitle = {Euro-Par 2009 - Parallel Processing Workshops, HPPC, HeteroPar, PROPER, ROIA, UNICORE, VHPC, Delft, The Netherlands, August 25-28, 2009, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {6043}, pages = {9--15}, publisher = {Springer}, year = {2009}, url = {https://doi.org/10.1007/978-3-642-14122-5\_4}, doi = {10.1007/978-3-642-14122-5\_4}, timestamp = {Tue, 30 Mar 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/europar/ForsellHJJVT09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/parco/JesshopeHLPZ09, author = {Chris R. Jesshope and Michael A. Hicks and Mike Lankamp and Raphael 'kena' Poss and Li Zhang}, editor = {Barbara M. Chapman and Fr{\'{e}}d{\'{e}}ric Desprez and Gerhard R. Joubert and Alain Lichnewsky and Frans J. Peters and Thierry Priol}, title = {Making multi-cores mainstream - from security to scalability}, booktitle = {Parallel Computing: From Multicores and GPU's to Petascale, Proceedings of the conference ParCo 2009, 1-4 September 2009, Lyon, France}, series = {Advances in Parallel Computing}, volume = {19}, pages = {16--31}, publisher = {{IOS} Press}, year = {2009}, url = {https://doi.org/10.3233/978-1-60750-530-3-16}, doi = {10.3233/978-1-60750-530-3-16}, timestamp = {Wed, 23 Jun 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/parco/JesshopeHLPZ09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ppl/Jesshope08, author = {Chris R. Jesshope}, title = {Operating Systems in silicon and the Dynamic Management of Resources in Many-Core Chips}, journal = {Parallel Process. Lett.}, volume = {18}, number = {2}, pages = {257--274}, year = {2008}, url = {https://doi.org/10.1142/S0129626408003375}, doi = {10.1142/S0129626408003375}, timestamp = {Tue, 24 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ppl/Jesshope08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aPcsac/JesshopeS08, author = {Chris R. Jesshope and Alexander V. Shafarenko}, title = {Concurrency engineering}, booktitle = {13th Asia-Pacific Computer Systems Architecture Conference, {ACSAC} 2008, Hsinchu, China, August 4-6, 2008}, pages = {1--8}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/APCSAC.2008.4625426}, doi = {10.1109/APCSAC.2008.4625426}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aPcsac/JesshopeS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/amast/VuZJ08, author = {Thuy Duong Vu and Li Zhang and Chris R. Jesshope}, editor = {Jos{\'{e}} Meseguer and Grigore Rosu}, title = {The Verification of the On-Chip {COMA} Cache Coherence Protocol}, booktitle = {Algebraic Methodology and Software Technology, 12th International Conference, {AMAST} 2008, Urbana, IL, USA, July 28-31, 2008, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {5140}, pages = {413--429}, publisher = {Springer}, year = {2008}, url = {https://doi.org/10.1007/978-3-540-79980-1\_31}, doi = {10.1007/978-3-540-79980-1\_31}, timestamp = {Thu, 21 Sep 2023 09:08:34 +0200}, biburl = {https://dblp.org/rec/conf/amast/VuZJ08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/europar/Jesshope08, author = {Chris R. Jesshope}, editor = {Eduardo C{\'{e}}sar and Michael Alexander and Achim Streit and Jesper Larsson Tr{\"{a}}ff and Christophe C{\'{e}}rin and Andreas Kn{\"{u}}pfer and Dieter Kranzlm{\"{u}}ller and Shantenu Jha}, title = {Building a Concurrency and Resource Allocation Model into a Processor's {ISA}}, booktitle = {Euro-Par 2008 Workshops - Parallel Processing, {VHPC} 2008, {UNICORE} 2008, {HPPC} 2008, {SGS} 2008, {PROPER} 2008, {ROIA} 2008, and {DPA} 2008, Las Palmas de Gran Canaria, Spain, August 25-26, 2008, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {5415}, pages = {129--130}, publisher = {Springer}, year = {2008}, url = {https://doi.org/10.1007/978-3-642-00955-6\_17}, doi = {10.1007/978-3-642-00955-6\_17}, timestamp = {Tue, 14 May 2019 10:00:46 +0200}, biburl = {https://dblp.org/rec/conf/europar/Jesshope08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/BernardBGJLTZ08, author = {Thomas A. M. Bernard and Kostas Bousias and Liang Guang and Chris R. Jesshope and Mike Lankamp and Michiel W. van Tol and Li Zhang}, editor = {Walid A. Najjar and Holger Blume}, title = {A general model of concurrency and its implementation as many-core dynamic {RISC} processors}, booktitle = {Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation {(IC-SAMOS} 2008), Samos, Greece, July 21-24, 2008}, pages = {1--9}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/ICSAMOS.2008.4664840}, doi = {10.1109/ICSAMOS.2008.4664840}, timestamp = {Fri, 22 Feb 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/samos/BernardBGJLTZ08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/Jesshope08, author = {Chris R. Jesshope}, editor = {Mladen Berekovic and Nikitas J. Dimopoulos and Stephan Wong}, title = {Introduction to Programming Multicores}, booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation, 8th International Workshop, {SAMOS} 2008, Samos, Greece, July 21-24, 2008. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {5114}, pages = {207}, publisher = {Springer}, year = {2008}, url = {https://doi.org/10.1007/978-3-540-70550-5\_23}, doi = {10.1007/978-3-540-70550-5\_23}, timestamp = {Tue, 14 May 2019 10:00:45 +0200}, biburl = {https://dblp.org/rec/conf/samos/Jesshope08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/JesshopePT08, author = {Chris R. Jesshope and Jean{-}Marc Philippe and Michiel W. van Tol}, editor = {Mladen Berekovic and Nikitas J. Dimopoulos and Stephan Wong}, title = {An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the {SVP} Model of Concurrency}, booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation, 8th International Workshop, {SAMOS} 2008, Samos, Greece, July 21-24, 2008. Proceedings}, series = {Lecture Notes in Computer Science}, volume = {5114}, pages = {218--228}, publisher = {Springer}, year = {2008}, url = {https://doi.org/10.1007/978-3-540-70550-5\_25}, doi = {10.1007/978-3-540-70550-5\_25}, timestamp = {Thu, 25 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/samos/JesshopePT08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/HasasnehBJ07, author = {Nabil Hasasneh and Ian M. Bell and Chris R. Jesshope}, title = {Asynchronous arbiter for micro-threaded chip multiprocessors}, journal = {J. Syst. Archit.}, volume = {53}, number = {5-6}, pages = {253--262}, year = {2007}, url = {https://doi.org/10.1016/j.sysarc.2006.10.004}, doi = {10.1016/J.SYSARC.2006.10.004}, timestamp = {Tue, 19 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jsa/HasasnehBJ07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aiccsa/HasasnehBJ07, author = {Nabil Hasasneh and Ian M. Bell and Chris R. Jesshope}, title = {High Level Modelling and Design For a Microthreaded Scheduler to Support Microgrids}, booktitle = {2007 {IEEE/ACS} International Conference on Computer Systems and Applications {(AICCSA} 2007), 13-16 May 2007, Amman, Jordan}, pages = {301--308}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/AICCSA.2007.370898}, doi = {10.1109/AICCSA.2007.370898}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aiccsa/HasasnehBJ07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/europar/ZhangJ07, author = {Li Zhang and Chris R. Jesshope}, editor = {Luc Boug{\'{e}} and Martti Forsell and Jesper Larsson Tr{\"{a}}ff and Achim Streit and Wolfgang Ziegler and Michael Alexander and Stephen Childs}, title = {On-Chip {COMA} Cache-Coherence Protocol for Microgrids of Microthreaded Cores}, booktitle = {Euro-Par 2007 Workshops: Parallel Processing, {HPPC} 2007, {UNICORE} Summit 2007, and {VHPC} 2007, Rennes, France, August 28-31, 2007, Revised Selected Papers}, series = {Lecture Notes in Computer Science}, volume = {4854}, pages = {38--48}, publisher = {Springer}, year = {2007}, url = {https://doi.org/10.1007/978-3-540-78474-6\_7}, doi = {10.1007/978-3-540-78474-6\_7}, timestamp = {Tue, 14 May 2019 10:00:46 +0200}, biburl = {https://dblp.org/rec/conf/europar/ZhangJ07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icfem/VuJ07, author = {Thuy Duong Vu and Chris R. Jesshope}, editor = {Michael J. Butler and Michael G. Hinchey and Mar{\'{\i}}a M. Larrondo{-}Petrie}, title = {Formalizing {SANE} Virtual Processor in Thread Algebra}, booktitle = {Formal Methods and Software Engineering, 9th International Conference on Formal Engineering Methods, {ICFEM} 2007, Boca Raton, FL, USA, November 14-15, 2007, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {4789}, pages = {345--365}, publisher = {Springer}, year = {2007}, url = {https://doi.org/10.1007/978-3-540-76650-6\_20}, doi = {10.1007/978-3-540-76650-6\_20}, timestamp = {Sat, 19 Oct 2019 20:19:23 +0200}, biburl = {https://dblp.org/rec/conf/icfem/VuJ07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/BernardJK07, author = {Thomas A. M. Bernard and Chris R. Jesshope and Peter M. W. Knijnenburg}, editor = {Stamatis Vassiliadis and Mladen Berekovic and Timo D. H{\"{a}}m{\"{a}}l{\"{a}}inen}, title = {Strategies for Compiling {\(\mathrm{\mu}\)} {TC} to Novel Chip Multiprocessors}, booktitle = {Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, {SAMOS} 2007, Samos, Greece, July 16-19, 2007, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {4599}, pages = {127--138}, publisher = {Springer}, year = {2007}, url = {https://doi.org/10.1007/978-3-540-73625-7\_15}, doi = {10.1007/978-3-540-73625-7\_15}, timestamp = {Tue, 14 May 2019 10:00:45 +0200}, biburl = {https://dblp.org/rec/conf/samos/BernardJK07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/npc/2007, editor = {Keqiu Li and Chris R. Jesshope and Hai Jin and Jean{-}Luc Gaudiot}, title = {Network and Parallel Computing, {IFIP} International Conference, {NPC} 2007, Dalian, China, September 18-21, 2007, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {4672}, publisher = {Springer}, year = {2007}, url = {https://doi.org/10.1007/978-3-540-74784-0}, doi = {10.1007/978-3-540-74784-0}, isbn = {978-3-540-74783-3}, timestamp = {Tue, 14 May 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/npc/2007.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cj/BousiasHJ06, author = {Kostas Bousias and Nabil Hasasneh and Chris R. Jesshope}, title = {Instruction Level Parallelism through Microthreading - {A} Scalable Approach to Chip Multiprocessors}, journal = {Comput. J.}, volume = {49}, number = {2}, pages = {211--233}, year = {2006}, url = {https://doi.org/10.1093/comjnl/bxh157}, doi = {10.1093/COMJNL/BXH157}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/cj/BousiasHJ06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijpp/JesshopeS06, author = {Chris R. Jesshope and Alexander V. Shafarenko}, title = {Special issue on Micro-grids - Guest Editor Introduction}, journal = {Int. J. Parallel Program.}, volume = {34}, number = {3}, pages = {189--192}, year = {2006}, url = {https://doi.org/10.1007/s10766-006-0013-2}, doi = {10.1007/S10766-006-0013-2}, timestamp = {Wed, 01 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijpp/JesshopeS06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijpp/JesshopeS06a, author = {Chris R. Jesshope and Alexander V. Shafarenko}, title = {Guest Editor's Introduction (Part 2)}, journal = {Int. J. Parallel Program.}, volume = {34}, number = {4}, pages = {319--322}, year = {2006}, url = {https://doi.org/10.1007/s10766-006-0020-3}, doi = {10.1007/S10766-006-0020-3}, timestamp = {Wed, 01 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijpp/JesshopeS06a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ijpp/BellHJ06, author = {Ian M. Bell and Nabil Hasasneh and Chris R. Jesshope}, title = {Supporting Microthread Scheduling and Synchronisation in CMPs}, journal = {Int. J. Parallel Program.}, volume = {34}, number = {4}, pages = {343--381}, year = {2006}, url = {https://doi.org/10.1007/s10766-006-0017-y}, doi = {10.1007/S10766-006-0017-Y}, timestamp = {Wed, 01 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ijpp/BellHJ06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ppl/Jesshope06, author = {Chris R. Jesshope}, title = {Microthreading a Model for Distributed Instruction-level Concurrency}, journal = {Parallel Process. Lett.}, volume = {16}, number = {2}, pages = {209--228}, year = {2006}, url = {https://doi.org/10.1142/S0129626406002587}, doi = {10.1142/S0129626406002587}, timestamp = {Tue, 24 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ppl/Jesshope06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aPcsac/Jesshope06, author = {Chris R. Jesshope}, editor = {Chris R. Jesshope and Colin Egan}, title = {muTC - An Intermediate Language for Programming Chip Multiprocessors}, booktitle = {Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, {ACSAC} 2006, Shanghai, China, September 6-8, 2006, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {4186}, pages = {147--160}, publisher = {Springer}, year = {2006}, url = {https://doi.org/10.1007/11859802\_13}, doi = {10.1007/11859802\_13}, timestamp = {Tue, 14 May 2019 10:00:42 +0200}, biburl = {https://dblp.org/rec/conf/aPcsac/Jesshope06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/arcs/HasasnehBJ06, author = {Nabil Hasasneh and Ian M. Bell and Chris R. Jesshope}, editor = {Werner Grass and Bernhard Sick and Klaus Waldschmidt}, title = {Scalable and Partitionable Asynchronous Arbiter for Micro-threaded Chip Multiprocessors}, booktitle = {Architecture of Computing Systems - {ARCS} 2006, 19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {3894}, pages = {252--267}, publisher = {Springer}, year = {2006}, url = {https://doi.org/10.1007/11682127\_18}, doi = {10.1007/11682127\_18}, timestamp = {Tue, 14 May 2019 10:00:52 +0200}, biburl = {https://dblp.org/rec/conf/arcs/HasasnehBJ06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpc/Jesshope06, author = {Chris R. Jesshope}, editor = {Lucio Grandinetti}, title = {A Model for the Design and Programming of Multi-cores}, booktitle = {High Performance Computing and Grids in Action - Selected Papers from the 2006 International Advanced Research Workshop on High Performance Computing and Grids, Cetraro, Italy, 2006}, series = {Advances in Parallel Computing}, volume = {16}, pages = {37--55}, publisher = {{IOS} Press}, year = {2006}, timestamp = {Mon, 03 Jun 2013 17:31:05 +0200}, biburl = {https://dblp.org/rec/conf/hpc/Jesshope06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/aPcsac/2006, editor = {Chris R. Jesshope and Colin Egan}, title = {Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, {ACSAC} 2006, Shanghai, China, September 6-8, 2006, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {4186}, publisher = {Springer}, year = {2006}, url = {https://doi.org/10.1007/11859802}, doi = {10.1007/11859802}, isbn = {3-540-40056-7}, timestamp = {Tue, 14 May 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/aPcsac/2006.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aPcsac/BousiasJ05, author = {Kostas Bousias and Chris R. Jesshope}, editor = {Thambipillai Srikanthan and Jingling Xue and Chip{-}Hong Chang}, title = {The Challenges of Massive On-Chip Concurrency}, booktitle = {Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, {ACSAC} 2005, Singapore, October 24-26, 2005, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {3740}, pages = {157--170}, publisher = {Springer}, year = {2005}, url = {https://doi.org/10.1007/11572961\_14}, doi = {10.1007/11572961\_14}, timestamp = {Tue, 14 May 2019 10:00:42 +0200}, biburl = {https://dblp.org/rec/conf/aPcsac/BousiasJ05.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpc/Jesshope04, author = {Chris R. Jesshope}, editor = {Lucio Grandinetti}, title = {Microgrids - The exploitation of massive on-chip concurrency}, booktitle = {Grid Computing: The New Frontier of High Performance Computing [post-proceedings of the High Performance Computing Workshop, {HPC} 2004, Cetraro, Italy, 2004]}, series = {Advances in Parallel Computing}, volume = {14}, pages = {203--223}, publisher = {Elsevier}, year = {2004}, url = {https://doi.org/10.1016/S0927-5452(05)80012-7}, doi = {10.1016/S0927-5452(05)80012-7}, timestamp = {Fri, 12 Jul 2019 14:39:18 +0200}, biburl = {https://dblp.org/rec/conf/hpc/Jesshope04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icalt/WenJ04, author = {Lipeng Wen and Chris R. Jesshope}, editor = {Kinshuk and Chee{-}Kit Looi and Erkki Sutinen and Demetrios G. Sampson and Ignacio Aedo and Lorna Uden and Esko K{\"{a}}hk{\"{o}}nen}, title = {A General Learning Management System Based on Schema-driven Methodology}, booktitle = {Proceedings of the {IEEE} International Conference on Advanced Learning Technologies, {ICALT} 2004, Joensuu, Finland, August 30 - September 1, 2004}, publisher = {{IEEE} Computer Society}, year = {2004}, url = {https://doi.org/10.1109/ICALT.2004.1357492}, doi = {10.1109/ICALT.2004.1357492}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/icalt/WenJ04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/samos/Jesshope04, author = {Chris R. Jesshope}, editor = {Andy D. Pimentel and Stamatis Vassiliadis}, title = {Scalable Instruction-Level Parallelism.}, booktitle = {Computer Systems: Architectures, Modeling, and Simulation, Third and Fourth International Workshops, {SAMOS} 2003 and {SAMOS} 2004, Samos, Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {3133}, pages = {383--392}, publisher = {Springer}, year = {2004}, url = {https://doi.org/10.1007/978-3-540-27776-7\_40}, doi = {10.1007/978-3-540-27776-7\_40}, timestamp = {Tue, 14 May 2019 10:00:45 +0200}, biburl = {https://dblp.org/rec/conf/samos/Jesshope04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aPcsac/Jesshope03, author = {Chris R. Jesshope}, editor = {Amos Omondi and Stanislav Sedukhin}, title = {Multi-threaded Microprocessors - Evolution or Revolution}, booktitle = {Advances in Computer Systems Architecture, 8th Asia-Pacific Conference, {ACSAC} 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2823}, pages = {21--45}, publisher = {Springer}, year = {2003}, url = {https://doi.org/10.1007/978-3-540-39864-6\_4}, doi = {10.1007/978-3-540-39864-6\_4}, timestamp = {Tue, 14 May 2019 10:00:42 +0200}, biburl = {https://dblp.org/rec/conf/aPcsac/Jesshope03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icws/WenJ03, author = {Lipeng Wen and Chris R. Jesshope}, editor = {Liang{-}Jie Zhang}, title = {Web Services Technology and Learning Technology- {A} Web-Services Model for Constructing Decentralized Virtual Learning Environments}, booktitle = {Proceedings of the International Conference on Web Services, {ICWS} '03, June 23 - 26, 2003, Las Vegas, Nevada, {USA}}, pages = {507--514}, publisher = {{CSREA} Press}, year = {2003}, timestamp = {Fri, 17 Oct 2003 08:14:28 +0200}, biburl = {https://dblp.org/rec/conf/icws/WenJ03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ets/Jesshope01, author = {Chris R. Jesshope}, title = {Cost-Effective Multimedia in On-line Teaching}, journal = {J. Educ. Technol. Soc.}, volume = {4}, number = {3}, year = {2001}, url = {http://ifets.ieee.org/periodical/vol\_3\_2001/jesshope.html}, timestamp = {Mon, 16 May 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ets/Jesshope01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aPcsac/Jesshope01, author = {Chris R. Jesshope}, title = {Implementing an efficient vector instruction set in a chip multi-processor using micro-threaded pipelines}, booktitle = {6th Australasian Computer Systems Architecture Conference {(ACSAC} 2001), 29-30 January 2001, Gold Coast, Queensland, Australia}, pages = {80--88}, publisher = {{IEEE} Computer Society}, year = {2001}, url = {https://doi.org/10.1109/ACAC.2001.903363}, doi = {10.1109/ACAC.2001.903363}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aPcsac/Jesshope01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/europar/BeivideJRI01, author = {Ram{\'{o}}n Beivide and Chris R. Jesshope and Antonio Robles and Cruz Izu}, editor = {Rizos Sakellariou and John A. Keane and John R. Gurd and Len Freeman}, title = {Topic 12: Routing and Communication in Interconnection Networks}, booktitle = {Euro-Par 2001: Parallel Processing, 7th International Euro-Par Conference Manchester, {UK} August 28-31, 2001, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2150}, pages = {611--612}, publisher = {Springer}, year = {2001}, url = {https://doi.org/10.1007/3-540-44681-8\_87}, doi = {10.1007/3-540-44681-8\_87}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/europar/BeivideJRI01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/imsa/GehneJZ01, author = {Regina Gehne and Chris R. Jesshope and Zhenzi Zhang}, editor = {M. H. Hamza}, title = {Technology Integrated Learning Environment - {A} Web-based Distance Learning System}, booktitle = {Proceedings of the Fifth {IASTED} International Conference Internet and Multimedia Systems and Applications {(IMSA} 2001), August 13-16, 2001, Honolulu, Hawaii, {USA}}, pages = {1--6}, publisher = {{IASTED/ACTA} Press}, year = {2001}, timestamp = {Mon, 23 Oct 2006 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/imsa/GehneJZ01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/www/HongAKHPJ01, author = {Hong Hong and Neena Albi and Kinshuk and Xiaoqin He and Ashok Patel and Chris R. Jesshope}, editor = {Vincent Y. Shen and Nobuo Saito and Michael R. Lyu and Mary Ellen Zurko}, title = {Adaptivity in Web-based Educational System}, booktitle = {Poster Proceedings of the Tenth International World Wide Web Conference, {WWW} 10, Hong Kong, China, May 1-5, 2001}, year = {2001}, url = {http://www10.org/cdrom/posters/1052.pdf}, timestamp = {Thu, 12 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/www/HongAKHPJ01.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aPcsac/JesshopeL00, author = {Chris R. Jesshope and Bing Luo}, title = {Micro-Threading: {A} New Approach to Future {RISC}}, booktitle = {5th Australasian Computer Architecture Conference {(ACAC} 2000), 31 January - 3 February 2000, Canberra, Australia}, pages = {34--41}, publisher = {{IEEE} Computer Society}, year = {2000}, url = {https://doi.org/10.1109/ACAC.2000.824320}, doi = {10.1109/ACAC.2000.824320}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aPcsac/JesshopeL00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ets/Jesshope99, author = {Chris R. Jesshope}, title = {Computers as Tutors: Solving the Crisis in Education}, journal = {J. Educ. Technol. Soc.}, volume = {2}, number = {4}, year = {1999}, url = {http://ifets.ieee.org/periodical/vol\_4\_99/bennett\_book\_review1.html}, timestamp = {Mon, 16 May 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/ets/Jesshope99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/europar/Jesshope99, author = {Chris R. Jesshope}, editor = {Patrick Amestoy and Philippe Berger and Michel J. Dayd{\'{e}} and Iain S. Duff and Val{\'{e}}rie Frayss{\'{e}} and Luc Giraud and Daniel Ruiz}, title = {Parallel Computer Architecture - What Is Its Future? Introduction}, booktitle = {Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31 - September 3, 1999, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {1685}, pages = {695--697}, publisher = {Springer}, year = {1999}, url = {https://doi.org/10.1007/3-540-48311-X\_98}, doi = {10.1007/3-540-48311-X\_98}, timestamp = {Tue, 04 Jun 2019 14:36:07 +0200}, biburl = {https://dblp.org/rec/conf/europar/Jesshope99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/acse/PearsonJ98, author = {Murray Pearson and Chris R. Jesshope}, editor = {David A. Carrington}, title = {Multi-campus teaching using computer networks}, booktitle = {Proceedings of the {ACM} {SIGCSE} 3rd Australasian Conference on Computer Science Education, {ACSE} 1998, The University of Queensland, Brisbane, Queensland, Australia, July 8-10, 1998}, series = {{ACM} International Conference Proceeding Series}, volume = {3}, pages = {106--111}, publisher = {{ACM}}, year = {1998}, url = {https://doi.org/10.1145/289393.289409}, doi = {10.1145/289393.289409}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/acse/PearsonJ98.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jpdc/DinesSDBSJ97, author = {Julian A. B. Dines and John F. Snowdon and Marc P. Y. Desmulliez and Dima B. Barsky and Alexander V. Shafarenko and Chris R. Jesshope}, title = {Optical Interconnectivity in a Scalable Data-Parallel System}, journal = {J. Parallel Distributed Comput.}, volume = {41}, number = {1}, pages = {120--130}, year = {1997}, url = {https://doi.org/10.1006/jpdc.1996.1290}, doi = {10.1006/JPDC.1996.1290}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jpdc/DinesSDBSJ97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/acse/Jesshope97, author = {Chris R. Jesshope}, editor = {Harald S{\o}ndergaard and A. John Hurst}, title = {Web based teaching: a minimalist approach}, booktitle = {Proceedings of the {ACM} {SIGCSE} 2nd Australasian Conference on Computer Science Education, {ACSE} 1997, Melbourne, Victoria, Australia, 1997}, series = {{ACM} International Conference Proceeding Series}, volume = {2}, pages = {16--23}, publisher = {{ACM}}, year = {1997}, url = {https://doi.org/10.1145/299359.299361}, doi = {10.1145/299359.299361}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/acse/Jesshope97.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/pdpta/DinesSDNBSJ96, author = {Julian A. B. Dines and John F. Snowdon and Marc P. Y. Desmulliez and D. T. Nielson and Dima B. Barsky and Alexander V. Shafarenko and Chris R. Jesshope}, editor = {Hamid R. Arabnia}, title = {Optical Interconnection hardware for scalable systems}, booktitle = {Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, {PDPTA} 1996, August 9-11, 1996, Sunnyvale, California, {USA}}, pages = {367--374}, publisher = {{CSREA} Press}, year = {1996}, timestamp = {Mon, 23 Oct 2006 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/pdpta/DinesSDNBSJ96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ppsg/SlusanschiJ96, author = {Horia C. Slusanschi and Chris R. Jesshope}, editor = {Chris R. Jesshope and Shasha Shafarenko}, title = {A {FORTRAN} 90 to F-code Compiler}, booktitle = {{UK} Parallel '96 - Proceedings of the {BCS} {PPSG} Annual Conference, Surrey, UK, July 3-5, 1996}, series = {{BCS} Conference Series}, pages = {40--52}, publisher = {Springer}, year = {1996}, url = {https://doi.org/10.1007/978-1-4471-1504-5\_4}, doi = {10.1007/978-1-4471-1504-5\_4}, timestamp = {Wed, 03 Jun 2020 15:03:29 +0200}, biburl = {https://dblp.org/rec/conf/ppsg/SlusanschiJ96.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/ppsg/1996, editor = {Chris R. Jesshope and Shasha Shafarenko}, title = {{UK} Parallel '96 - Proceedings of the {BCS} {PPSG} Annual Conference, Surrey, UK, July 3-5, 1996}, series = {{BCS} Conference Series}, publisher = {Springer}, year = {1996}, url = {https://doi.org/10.1007/978-1-4471-1504-5}, doi = {10.1007/978-1-4471-1504-5}, isbn = {978-3-540-76068-9}, timestamp = {Wed, 03 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/ppsg/1996.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope95, author = {Chris R. Jesshope}, title = {Multiprocessing: Trade-offs in computation and communication : Vijay {K} Naik Kluwer Academic Publishers, Dordrecht, The Netherlands {(1993)} {ISBN} 0 7923 9370 8, Dfl 180.00, {\textsterling}65.50, pp224}, journal = {Microprocess. Microsystems}, volume = {19}, number = {2}, pages = {107}, year = {1995}, url = {https://doi.org/10.1016/0141-9331(95)90003-9}, doi = {10.1016/0141-9331(95)90003-9}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/Jesshope95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/icannga/AshmanVJP95, author = {I. Ashman and T. Vladimirova and Chris R. Jesshope and R. Peel}, editor = {David W. Pearson and Nigel C. Steele and Rudolf F. Albrecht}, title = {Parallel Boltzmann Machine Topologies for Simulated Annealing Realisation of Combinatorial Problems}, booktitle = {Artificial Neural Nets and Genetic Algorithms, {ICANNGA} 1995, Proceedings of the International Conference in Al{\`{e}}s, France, 1995}, pages = {297--300}, publisher = {Springer}, year = {1995}, url = {https://doi.org/10.1007/978-3-7091-7535-4\_78}, doi = {10.1007/978-3-7091-7535-4\_78}, timestamp = {Tue, 25 May 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/icannga/AshmanVJP95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope94, author = {Chris R. Jesshope}, title = {Mechanized Reasoning and Hardware Design: {C} {A} {R} Hoare and {M} {J} {C} Gordon (Eds) Prentice Hall, Hemel Hempstead, {UK} {(1992)} {ISBN} 0 13 572405 8, {\textsterling}40, pp 151}, journal = {Microprocess. Microsystems}, volume = {18}, number = {1}, pages = {53}, year = {1994}, url = {https://doi.org/10.1016/0141-9331(94)90022-1}, doi = {10.1016/0141-9331(94)90022-1}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/Jesshope94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dimacs/JesshopeN94, author = {Chris R. Jesshope and Ivailo M. Nedelchev}, editor = {D. Frank Hsu and Arnold L. Rosenberg and Dominique Sotteau}, title = {Asynchronous packet routers}, booktitle = {Workshop on Interconnection Networks and Mapping and Scheduling Parallel Computations, Proceedings of a {DIMACS} Workshop, Piscataway, New Jersey, USA, February 7-9, 1994}, series = {{DIMACS} Series in Discrete Mathematics and Theoretical Computer Science}, volume = {21}, pages = {211--227}, publisher = {{DIMACS/AMS}}, year = {1994}, url = {https://doi.org/10.1090/dimacs/021/15}, doi = {10.1090/DIMACS/021/15}, timestamp = {Mon, 22 May 2023 16:07:35 +0200}, biburl = {https://dblp.org/rec/conf/dimacs/JesshopeN94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/glvlsi/NedelchevJ94, author = {Ivailo M. Nedelchev and Chris R. Jesshope}, title = {Basic building blocks for asynchronous packet routers}, booktitle = {Fourth Great Lakes Symposium on Design Automation of High Performance {VLSI} Systems, {GLSV} '94, Notre Dame, IN, USA, March 4-5, 1994}, pages = {184--187}, publisher = {{IEEE}}, year = {1994}, url = {https://doi.org/10.1109/GLSV.1994.289972}, doi = {10.1109/GLSV.1994.289972}, timestamp = {Wed, 16 Oct 2019 14:14:57 +0200}, biburl = {https://dblp.org/rec/conf/glvlsi/NedelchevJ94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/pdp/IzuBJ94, author = {Cruz Izu and Ram{\'{o}}n Beivide and Chris R. Jesshope}, title = {Mad-postman : {A} Look-ahead Message Propagation Method For Static Bidimensional Meshes}, booktitle = {Proceedings of the Second Euromicro Workshop on Parallel and Distributed Processing, {PDP} 1994, January 26-28, 1994, Malaga, Spain}, pages = {117--124}, publisher = {{IEEE}}, year = {1994}, url = {https://doi.org/10.1109/EMPDP.1994.592478}, doi = {10.1109/EMPDP.1994.592478}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/pdp/IzuBJ94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/parcella/1994, editor = {Chris R. Jesshope and Vesselin Jossifov and Wolfgang Wilhelmi}, title = {Parcella 1994, {VI.} International Workshop on Parallel Processing by Cellular Automata and Arrays, Potsdam, Germany, September 21-23, 1994. Proceedings}, series = {Mathematical Research}, volume = {81}, publisher = {Akademie Verlag, Berlin}, year = {1994}, isbn = {3-05-501602-5}, timestamp = {Mon, 18 Jun 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/parcella/1994.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/cj/JesshopeI93, author = {Chris R. Jesshope and Cruz Izu}, title = {The {MP1} Network Chip and its Application to Parallel Computers}, journal = {Comput. J.}, volume = {36}, number = {8}, pages = {763--777}, year = {1993}, url = {https://doi.org/10.1093/comjnl/36.8.763}, doi = {10.1093/COMJNL/36.8.763}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/cj/JesshopeI93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jsa/IzuBJA93, author = {Cruz Izu and Ram{\'{o}}n Beivide and Chris R. Jesshope and Agustin Arruabarrena}, title = {Experimental evaluation of Mad Postman bidimensional routing networks}, journal = {Microprocess. Microprogramming}, volume = {38}, number = {1-5}, pages = {33--41}, year = {1993}, url = {https://doi.org/10.1016/0165-6074(93)90122-2}, doi = {10.1016/0165-6074(93)90122-2}, timestamp = {Tue, 19 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jsa/IzuBJA93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/ppl/Jesshope93, author = {Chris R. Jesshope}, title = {Latency Reduction in {VLSI} Routers}, journal = {Parallel Process. Lett.}, volume = {3}, pages = {485--494}, year = {1993}, url = {https://doi.org/10.1142/S0129626493000502}, doi = {10.1142/S0129626493000502}, timestamp = {Tue, 24 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/ppl/Jesshope93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/pdp/JesshopeI93, author = {Chris R. Jesshope and Cruz Izu}, title = {The {MP1} network chip}, booktitle = {1993 Euromicro Workshop on Parallel and Distributed Processing, {PDP} 1993, Gran Canaria, Spain, 27-29 January 1993}, pages = {338--348}, publisher = {{IEEE}}, year = {1993}, url = {https://doi.org/10.1109/EMPDP.1993.336369}, doi = {10.1109/EMPDP.1993.336369}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/pdp/JesshopeI93.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope91, author = {Chris R. Jesshope}, title = {Computing with parallel architectures: T.node: Gassilloud, {D} and Grossetie, {J} {C} (Eds) Kluwer {(1991)} pp 241, {\textsterling}52, {ISBN} 0792-31225-2}, journal = {Microprocess. Microsystems}, volume = {15}, number = {7}, pages = {395--396}, year = {1991}, url = {https://doi.org/10.1016/0141-9331(91)90103-M}, doi = {10.1016/0141-9331(91)90103-M}, timestamp = {Tue, 25 May 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/mam/Jesshope91.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/edmcc/GetovJ91, author = {Vladimir Getov and Chris R. Jesshope}, editor = {Arndt Bode}, title = {Simulation Facility of Distributed Memory System with "Mad Postman" Communication Network}, booktitle = {Distributed Memory Computing, 2nd European Conference, EDMCC2, Munich, FRG, April 22-24, 1991, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {487}, pages = {224--233}, publisher = {Springer}, year = {1991}, url = {https://doi.org/10.1007/BFb0032939}, doi = {10.1007/BFB0032939}, timestamp = {Fri, 17 Nov 2023 09:27:30 +0100}, biburl = {https://dblp.org/rec/conf/edmcc/GetovJ91.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope90, author = {Chris R. Jesshope}, title = {Distributed computer systems: Zedan, {H} {S} {M} (Ed.) Butterworths, Borough Green, {UK} {(1990)} {\textsterling}48.00, pp 313}, journal = {Microprocess. Microsystems}, volume = {14}, number = {7}, pages = {483--484}, year = {1990}, url = {https://doi.org/10.1016/0141-9331(90)90029-U}, doi = {10.1016/0141-9331(90)90029-U}, timestamp = {Tue, 25 May 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/mam/Jesshope90.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope89, author = {Chris R. Jesshope}, title = {Parallel processing, the transputer and the future}, journal = {Microprocess. Microsystems}, volume = {13}, number = {1}, pages = {33--37}, year = {1989}, url = {https://doi.org/10.1016/0141-9331(89)90032-X}, doi = {10.1016/0141-9331(89)90032-X}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/Jesshope89.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope89a, author = {Chris R. Jesshope}, title = {Editorial}, journal = {Microprocess. Microsystems}, volume = {13}, number = {2}, pages = {66}, year = {1989}, url = {https://doi.org/10.1016/0141-9331(89)90131-2}, doi = {10.1016/0141-9331(89)90131-2}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/Jesshope89a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope89b, author = {Chris R. Jesshope}, title = {Editorial}, journal = {Microprocess. Microsystems}, volume = {13}, number = {3}, pages = {147}, year = {1989}, url = {https://doi.org/10.1016/0141-9331(89)90118-X}, doi = {10.1016/0141-9331(89)90118-X}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/Jesshope89b.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope89c, author = {Chris R. Jesshope}, title = {Parallel program design: a foundation: Chandry, {K} {M} and Misra, {J} Addison-Wesley, Wokingham, {UK} {(1988)} {\textsterling}19.95 pp 516}, journal = {Microprocess. Microsystems}, volume = {13}, number = {7}, pages = {484}, year = {1989}, url = {https://doi.org/10.1016/0141-9331(89)90152-X}, doi = {10.1016/0141-9331(89)90152-X}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/Jesshope89c.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/JesshopeMY89, author = {Chris R. Jesshope and P. R. Miller and Jay T. Yantchev}, editor = {Jean{-}Claude Syre}, title = {High Performance Communications in Processor Networks}, booktitle = {Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, Israel, June 1989}, pages = {150--157}, publisher = {{ACM}}, year = {1989}, url = {https://doi.org/10.1145/74925.74943}, doi = {10.1145/74925.74943}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isca/JesshopeMY89.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/mam/Jesshope88, author = {Chris R. Jesshope}, title = {{MUNAP:} an unusual computer with clear implications: Baba, TMicroprogrammable parallel computers {MIT} Press, Cambridge, MA, {USA} {(1987)} {\textsterling}26.95 pp 290}, journal = {Microprocess. Microsystems}, volume = {12}, number = {2}, pages = {118}, year = {1988}, url = {https://doi.org/10.1016/0141-9331(88)90106-8}, doi = {10.1016/0141-9331(88)90106-8}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/mam/Jesshope88.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/pc/Jesshope88, author = {Chris R. Jesshope}, title = {Transputers and switches as objects in {OCCAM}}, journal = {Parallel Comput.}, volume = {8}, number = {1-3}, pages = {19--30}, year = {1988}, url = {https://doi.org/10.1016/0167-8191(88)90106-8}, doi = {10.1016/0167-8191(88)90106-8}, timestamp = {Sat, 22 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/pc/Jesshope88.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/c3p/Jesshope88, author = {Chris R. Jesshope}, editor = {Geoffrey C. Fox}, title = {Reconfigurable transputer systems}, booktitle = {Proceedings of the Third Conference on Hypercube Concurrent Computers and Applications - Architecture, Software, Computer Systems, and General Issues, C{\({^3}\)}P, Pasadena, California, USA, January 19-20, 1988}, pages = {105--114}, publisher = {{ACM}}, year = {1988}, url = {https://doi.org/10.1145/62297.62311}, doi = {10.1145/62297.62311}, timestamp = {Fri, 29 Apr 2022 13:57:54 +0200}, biburl = {https://dblp.org/rec/conf/c3p/Jesshope88.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/parcella/JesshopeMY88, author = {Chris R. Jesshope and Philip Miller and Jelio Yantchev}, editor = {Gottfried Wolf and Tam{\'{a}}s Legendi and Udo Schendel}, title = {Programming with active data}, booktitle = {Parcella '88, Fourth International Workshop on Parallel Processing by Cellular Automata and Arrays, Berlin, GDR, October 17-21, 1988, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {342}, pages = {111--129}, publisher = {Springer}, year = {1988}, url = {https://doi.org/10.1007/3-540-50647-0\_106}, doi = {10.1007/3-540-50647-0\_106}, timestamp = {Tue, 14 May 2019 10:00:47 +0200}, biburl = {https://dblp.org/rec/conf/parcella/JesshopeMY88.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/spe/JesshopeCL85, author = {Chris R. Jesshope and M. J. Crawley and G. L. Lovegrove}, title = {An Intelligent Pascal Editor for a Graphical Oriented Workstation}, journal = {Softw. Pract. Exp.}, volume = {15}, number = {11}, pages = {1103--1119}, year = {1985}, url = {https://doi.org/10.1002/spe.4380151107}, doi = {10.1002/SPE.4380151107}, timestamp = {Thu, 09 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/spe/JesshopeCL85.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/Jesshope80, author = {Chris R. Jesshope}, title = {The Implementation of Fast Radix 2 Transforms on Array Processors}, journal = {{IEEE} Trans. Computers}, volume = {29}, number = {1}, pages = {20--27}, year = {1980}, url = {https://doi.org/10.1109/TC.1980.1675452}, doi = {10.1109/TC.1980.1675452}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/Jesshope80.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tc/Jesshope80a, author = {Chris R. Jesshope}, title = {Some Results Concerning Data Routing in Array Processors}, journal = {{IEEE} Trans. Computers}, volume = {29}, number = {7}, pages = {659--662}, year = {1980}, url = {https://doi.org/10.1109/TC.1980.1675638}, doi = {10.1109/TC.1980.1675638}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tc/Jesshope80a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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