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BibTeX records: Noriyuki Ito
@article{DBLP:journals/tcad/ZhangYHZSPZCMSIC09, author = {Wanping Zhang and Wenjian Yu and Xiang Hu and Ling Zhang and Rui Shi and He Peng and Zhi Zhu and Lew Chua{-}Eoan and Rajeev Murgai and Toshiyuki Shibuya and Noriyuki Ito and Chung{-}Kuan Cheng}, title = {Efficient Power Network Analysis Considering Multidomain Clock Gating}, journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.}, volume = {28}, number = {9}, pages = {1348--1358}, year = {2009}, url = {https://doi.org/10.1109/TCAD.2009.2024711}, doi = {10.1109/TCAD.2009.2024711}, timestamp = {Thu, 24 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/tcad/ZhangYHZSPZCMSIC09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/ItoKKYTSYNYYYOIKI07, author = {Noriyuki Ito and Hiroaki Komatsu and Akira Kanuma and Akihiro Yoshitake and Yoshiyasu Tanamura and Hiroyuki Sugiyama and Ryoichi Yamashita and Ken{-}ichi Nabeya and Hironobu Yoshino and Hitoshi Yamanaka and Masahiro Yanagida and Yoshitomo Ozeki and Kinya Ishizaka and Takeshi Kono and Yutaka Isoda}, title = {Design Methodology for 2.4GHz Dual-Core Microprocessor}, booktitle = {Proceedings of the 12th Conference on Asia South Pacific Design Automation, {ASP-DAC} 2007, Yokohama, Japan, January 23-26, 2007}, pages = {896--901}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/ASPDAC.2007.358103}, doi = {10.1109/ASPDAC.2007.358103}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/ItoKKYTSYNYYYOIKI07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/ZhangZSPZCMSIC07, author = {Wanping Zhang and Ling Zhang and Rui Shi and He Peng and Zhi Zhu and Lew Chua{-}Eoan and Rajeev Murgai and Toshiyuki Shibuya and Noriyuki Ito and Chung{-}Kuan Cheng}, title = {Fast power network analysis with multiple clock domains}, booktitle = {25th International Conference on Computer Design, {ICCD} 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings}, pages = {456--463}, publisher = {{IEEE}}, year = {2007}, url = {https://doi.org/10.1109/ICCD.2007.4601939}, doi = {10.1109/ICCD.2007.4601939}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/ZhangZSPZCMSIC07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/ItoKMYMSEYKIAHNSN06, author = {Noriyuki Ito and Akira Kanuma and Daisuke Maruyama and Hitoshi Yamanaka and Tsuyoshi Mochizuki and Osamu Sugawara and Chihiro Endoh and Masahiro Yanagida and Takeshi Kono and Yutaka Isoda and Kazunobu Adachi and Takahisa Hiraide and Shigeru Nagasawa and Yaroku Sugiyama and Eizo Ninoi}, editor = {Fumiyasu Hirose}, title = {Delay defect screening for a 2.16GHz {SPARC64} microprocessor}, booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation: {ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006}, pages = {342--347}, publisher = {{IEEE}}, year = {2006}, url = {https://doi.org/10.1109/ASPDAC.2006.1594706}, doi = {10.1109/ASPDAC.2006.1594706}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/aspdac/ItoKMYMSEYKIAHNSN06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/aspdac/ItoKYISKTYNIAMIS06, author = {Noriyuki Ito and Hideaki Katagiri and Ryoichi Yamashita and Hiroshi Ikeda and Hiroyuki Sugiyama and Hiroaki Komatsu and Yoshiyasu Tanamura and Akihiro Yoshitake and Kazuhiro Nonomura and Kinya Ishizaka and Hiroaki Adachi and Yutaka Mori and Yutaka Isoda and Yaroku Sugiyama}, editor = {Fumiyasu Hirose}, title = {Diagonal routing in high performance microprocessor design}, booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation: {ASP-DAC} 2006, Yokohama, Japan, January 24-27, 2006}, pages = {624--629}, publisher = {{IEEE}}, year = {2006}, url = {https://doi.org/10.1109/ASPDAC.2006.1594755}, doi = {10.1109/ASPDAC.2006.1594755}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/ItoKYISKTYNIAMIS06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccad/MaruyamaKMKSI04, author = {Daisuke Maruyama and Akira Kanuma and Takashi Mochiyama and Hiroaki Komatsu and Yaroku Sugiyama and Noriyuki Ito}, title = {Detection of multiple transitions in delay fault test of {SPARC64} microprocessor}, booktitle = {2004 International Conference on Computer-Aided Design, {ICCAD} 2004, San Jose, CA, USA, November 7-11, 2004}, pages = {893--898}, publisher = {{IEEE} Computer Society / {ACM}}, year = {2004}, url = {https://doi.org/10.1109/ICCAD.2004.1382701}, doi = {10.1109/ICCAD.2004.1382701}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccad/MaruyamaKMKSI04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iccd/ItoKTYSSH03, author = {Noriyuki Ito and Hiroaki Komatsu and Yoshiyasu Tanamura and Ryoichi Yamashita and Hiroyuki Sugiyama and Yaroku Sugiyama and Hirofumi Hamamura}, title = {A Physical Design Methodology for 1.3GHz {SPARC64} Microprocessor}, booktitle = {21st International Conference on Computer Design {(ICCD} 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings}, pages = {204--210}, publisher = {{IEEE} Computer Society}, year = {2003}, url = {https://doi.org/10.1109/ICCD.2003.1240896}, doi = {10.1109/ICCD.2003.1240896}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/iccd/ItoKTYSSH03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/Ito90, author = {Noriyuki Ito}, editor = {Richard C. Smith}, title = {Automatic Incorporation of On-Chip Testability Circuits}, booktitle = {Proceedings of the 27th {ACM/IEEE} Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990}, pages = {529--534}, publisher = {{IEEE} Computer Society Press}, year = {1990}, url = {https://doi.org/10.1145/123186.123393}, doi = {10.1145/123186.123393}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/Ito90.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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