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BibTeX records: Jonathan Heathcote
@inproceedings{DBLP:conf/pcs/HeathcoteB21, author = {Jonathan Heathcote and Tim Borer}, title = {Computing Integer Bit Widths for Video Codec Implementations}, booktitle = {Picture Coding Symposium, {PCS} 2021, Bristol, United Kingdom, June 29 - July 2, 2021}, pages = {1--5}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/PCS50896.2021.9477490}, doi = {10.1109/PCS50896.2021.9477490}, timestamp = {Mon, 02 Aug 2021 16:50:17 +0200}, biburl = {https://dblp.org/rec/conf/pcs/HeathcoteB21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/access/PlanaGHPTDLF20, author = {Luis A. Plana and Jim D. Garside and Jonathan Heathcote and Jeffrey Pepper and Steve Temple and Simon Davidson and Mikel Luj{\'{a}}n and Steve B. Furber}, title = {spiNNlink: FPGA-Based Interconnect for the Million-Core SpiNNaker System}, journal = {{IEEE} Access}, volume = {8}, pages = {84918--84928}, year = {2020}, url = {https://doi.org/10.1109/ACCESS.2020.2991038}, doi = {10.1109/ACCESS.2020.2991038}, timestamp = {Tue, 16 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/access/PlanaGHPTDLF20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/simpra/GhasempourHNPGL20, author = {Mohsen Ghasempour and Jonathan Heathcote and Javier Navaridas and Luis A. Plana and Jim D. Garside and Mikel Luj{\'{a}}n}, title = {Analysis of software and hardware-accelerated approaches to the simulation of unconventional interconnection networks}, journal = {Simul. Model. Pract. Theory}, volume = {103}, pages = {102088}, year = {2020}, url = {https://doi.org/10.1016/j.simpat.2020.102088}, doi = {10.1016/J.SIMPAT.2020.102088}, timestamp = {Fri, 14 May 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/simpra/GhasempourHNPGL20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@phdthesis{DBLP:phd/ethos/Heathcote16, author = {Jonathan Heathcote}, title = {Building and operating large-scale SpiNNaker machines}, school = {University of Manchester, {UK}}, year = {2016}, url = {http://www.manchester.ac.uk/escholar/uk-ac-man-scw:305482}, timestamp = {Tue, 05 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/phd/ethos/Heathcote16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpsr/MundyHG16, author = {Andrew Mundy and Jonathan Heathcote and Jim D. Garside}, title = {On-chip order-exploiting routing table minimization for a multicast supercomputer network}, booktitle = {17th {IEEE} International Conference on High Performance Switching and Routing, {HPSR} 2016, Yokohama, Japan, June 14-17, 2016}, pages = {148--154}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/HPSR.2016.7525659}, doi = {10.1109/HPSR.2016.7525659}, timestamp = {Sat, 05 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hpsr/MundyHG16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/fccm/GhasempourHNPGL15, author = {Mohsen Ghasempour and Jonathan Heathcote and Javier Navaridas and Luis A. Plana and Jim D. Garside and Mikel Luj{\'{a}}n}, title = {Accelerating Interconnect Analysis Using High-Level HDLs and FPGA, SpiNNaker as a Case Study}, booktitle = {23rd {IEEE} Annual International Symposium on Field-Programmable Custom Computing Machines, {FCCM} 2015, Vancouver, BC, Canada, May 2-6, 2015}, pages = {96}, publisher = {{IEEE} Computer Society}, year = {2015}, url = {https://doi.org/10.1109/FCCM.2015.47}, doi = {10.1109/FCCM.2015.47}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/fccm/GhasempourHNPGL15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/reconfig/GhasempourHNPGL15, author = {Mohsen Ghasempour and Jonathan Heathcote and Javier Navaridas and Luis A. Plana and Jim D. Garside and Mikel Luj{\'{a}}n}, editor = {Michael H{\"{u}}bner and Maya B. Gokhale and Ren{\'{e}} Cumplido}, title = {Analysis of {FPGA} and software approaches to simulate unconventional computer architectures}, booktitle = {International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, Riviera Maya, Mexico, December 7-9, 2015}, pages = {1--8}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/ReConFig.2015.7393292}, doi = {10.1109/RECONFIG.2015.7393292}, timestamp = {Wed, 28 Apr 2021 16:06:54 +0200}, biburl = {https://dblp.org/rec/conf/reconfig/GhasempourHNPGL15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jet/ArellanoH10, author = {Cristina Arellano and Jonathan Heathcote}, title = {Dollarization and financial integration}, journal = {J. Econ. Theory}, volume = {145}, number = {3}, pages = {944--973}, year = {2010}, url = {https://doi.org/10.1016/j.jet.2009.08.002}, doi = {10.1016/J.JET.2009.08.002}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jet/ArellanoH10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jet/HeathcoteP04, author = {Jonathan Heathcote and Fabrizio Perri}, title = {Financial globalization and real regionalization}, journal = {J. Econ. Theory}, volume = {119}, number = {1}, pages = {207--243}, year = {2004}, url = {https://doi.org/10.1016/j.jet.2003.06.003}, doi = {10.1016/J.JET.2003.06.003}, timestamp = {Mon, 24 Feb 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jet/HeathcoteP04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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