BibTeX records: Robert J. Halstead

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@article{DBLP:journals/vldb/RomanousWABHNT21,
  author       = {Bashar Romanous and
                  Skyler Windh and
                  Ildar Absalyamov and
                  Prerna Budhkar and
                  Robert J. Halstead and
                  Walid A. Najjar and
                  Vassilis J. Tsotras},
  title        = {Efficient local locking for massively multithreaded in-memory hash-based
                  operators},
  journal      = {{VLDB} J.},
  volume       = {30},
  number       = {3},
  pages        = {333--359},
  year         = {2021},
  url          = {https://doi.org/10.1007/s00778-020-00642-5},
  doi          = {10.1007/S00778-020-00642-5},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/vldb/RomanousWABHNT21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/damon/AbsalyamovBWHNT16,
  author       = {Ildar Absalyamov and
                  Prerna Budhkar and
                  Skyler Windh and
                  Robert J. Halstead and
                  Walid A. Najjar and
                  Vassilis J. Tsotras},
  title        = {FPGA-accelerated group-by aggregation using synchronizing caches},
  booktitle    = {Proceedings of the 12th International Workshop on Data Management
                  on New Hardware, DaMoN 2016, San Francisco, CA, USA, June 27, 2016},
  pages        = {11:1--11:9},
  publisher    = {{ACM}},
  year         = {2016},
  url          = {https://doi.org/10.1145/2933349.2933360},
  doi          = {10.1145/2933349.2933360},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/damon/AbsalyamovBWHNT16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@incollection{DBLP:books/daglib/p/NajjarVH16,
  author       = {Walid A. Najjar and
                  Jason R. Villarreal and
                  Robert J. Halstead},
  editor       = {Dirk Koch and
                  Frank Hannig and
                  Daniel Ziener},
  title        = {{ROCCC} 2.0},
  booktitle    = {FPGAs for Software Programmers},
  pages        = {191--204},
  publisher    = {Springer},
  year         = {2016},
  url          = {https://doi.org/10.1007/978-3-319-26408-0\_11},
  doi          = {10.1007/978-3-319-26408-0\_11},
  timestamp    = {Thu, 14 Oct 2021 08:45:49 +0200},
  biburl       = {https://dblp.org/rec/books/daglib/p/NajjarVH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@phdthesis{DBLP:phd/basesearch/Halstead15,
  author       = {Robert J. Halstead},
  title        = {Using Multithreaded Techniques to Mask Memory Latency on {FPGA} Accelerators},
  school       = {University of California, Riverside, {USA}},
  year         = {2015},
  url          = {http://www.escholarship.org/uc/item/45m0d5b0},
  timestamp    = {Thu, 11 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/phd/basesearch/Halstead15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/pieee/WindhMHBLHN15,
  author       = {Skyler Windh and
                  Xiaoyin Ma and
                  Robert J. Halstead and
                  Prerna Budhkar and
                  Zabdiel Luna and
                  Omar Hussaini and
                  Walid A. Najjar},
  title        = {High-Level Language Tools for Reconfigurable Computing},
  journal      = {Proc. {IEEE}},
  volume       = {103},
  number       = {3},
  pages        = {390--408},
  year         = {2015},
  url          = {https://doi.org/10.1109/JPROC.2015.2399275},
  doi          = {10.1109/JPROC.2015.2399275},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/pieee/WindhMHBLHN15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cidr/HalsteadANT15,
  author       = {Robert J. Halstead and
                  Ildar Absalyamov and
                  Walid A. Najjar and
                  Vassilis J. Tsotras},
  title        = {FPGA-based Multithreading for In-Memory Hash Joins},
  booktitle    = {Seventh Biennial Conference on Innovative Data Systems Research, {CIDR}
                  2015, Asilomar, CA, USA, January 4-7, 2015, Online Proceedings},
  publisher    = {www.cidrdb.org},
  year         = {2015},
  url          = {http://cidrdb.org/cidr2015/Papers/CIDR15\_Paper12.pdf},
  timestamp    = {Mon, 18 Jul 2022 17:13:00 +0200},
  biburl       = {https://dblp.org/rec/conf/cidr/HalsteadANT15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijhpcn/HalsteadVN14,
  author       = {Robert J. Halstead and
                  Jason R. Villarreal and
                  Walid A. Najjar},
  title        = {Compiling irregular applications for reconfigurable systems},
  journal      = {Int. J. High Perform. Comput. Netw.},
  volume       = {7},
  number       = {4},
  pages        = {258--268},
  year         = {2014},
  url          = {https://doi.org/10.1504/IJHPCN.2014.062725},
  doi          = {10.1504/IJHPCN.2014.062725},
  timestamp    = {Thu, 09 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijhpcn/HalsteadVN14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tecs/MoussalliSHNT14,
  author       = {Roger Moussalli and
                  Mariam Salloum and
                  Robert J. Halstead and
                  Walid A. Najjar and
                  Vassilis J. Tsotras},
  title        = {A study on parallelizing {XML} path filtering using accelerators},
  journal      = {{ACM} Trans. Embed. Comput. Syst.},
  volume       = {13},
  number       = {4},
  pages        = {93:1--93:28},
  year         = {2014},
  url          = {https://doi.org/10.1145/2560040},
  doi          = {10.1145/2560040},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tecs/MoussalliSHNT14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/cases/HalsteadN13,
  author       = {Robert J. Halstead and
                  Walid A. Najjar},
  title        = {Compiled multithreaded data paths on FPGAs for dynamic workloads},
  booktitle    = {International Conference on Compilers, Architecture and Synthesis
                  for Embedded Systems, {CASES} 2013, Montreal, QC, Canada, September
                  29 - October 4, 2013},
  pages        = {3:1--3:10},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/CASES.2013.6662507},
  doi          = {10.1109/CASES.2013.6662507},
  timestamp    = {Wed, 16 Oct 2019 14:14:51 +0200},
  biburl       = {https://dblp.org/rec/conf/cases/HalsteadN13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fccm/HalsteadSMTDAI13,
  author       = {Robert J. Halstead and
                  Bharat Sukhwani and
                  Hong Min and
                  Mathew Thoennes and
                  Parijat Dube and
                  Sameh W. Asaad and
                  Balakrishna Iyer},
  title        = {Accelerating Join Operation for Relational Databases with FPGAs},
  booktitle    = {21st {IEEE} Annual International Symposium on Field-Programmable Custom
                  Computing Machines, {FCCM} 2013, Seattle, WA, USA, April 28-30, 2013},
  pages        = {17--20},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/FCCM.2013.17},
  doi          = {10.1109/FCCM.2013.17},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fccm/HalsteadSMTDAI13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sc/HalsteadVN11,
  author       = {Robert J. Halstead and
                  Jason R. Villarreal and
                  Walid A. Najjar},
  editor       = {John Feo and
                  Oreste Villa and
                  Antonino Tumeo and
                  Simone Secchi},
  title        = {Exploring irregular memory accesses on FPGAs},
  booktitle    = {Proceedings of the first workshop on Irregular applications: architectures
                  and algorithm, {IA3} 2011, Seattle, WA, USA, November 13, 2011},
  pages        = {31--34},
  publisher    = {{ACM}},
  year         = {2011},
  url          = {https://doi.org/10.1145/2089142.2089151},
  doi          = {10.1145/2089142.2089151},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/sc/HalsteadVN11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vldb/MoussalliHSNT11,
  author       = {Roger Moussalli and
                  Robert J. Halstead and
                  Mariam Salloum and
                  Walid A. Najjar and
                  Vassilis J. Tsotras},
  editor       = {Rajesh Bordawekar and
                  Christian A. Lang},
  title        = {Efficient {XML} Path Filtering Using GPUs},
  booktitle    = {International Workshop on Accelerating Data Management Systems Using
                  Modern Processor and Storage Architectures - {ADMS} 2011, Seattle,
                  WA, USA, September 2, 2011},
  pages        = {9--18},
  year         = {2011},
  url          = {http://www.adms-conf.org/p9-MOUSSALLI.pdf},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vldb/MoussalliHSNT11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fccm/VillarrealPNH10,
  author       = {Jason R. Villarreal and
                  Adrian Park and
                  Walid A. Najjar and
                  Robert J. Halstead},
  editor       = {Ron Sass and
                  Russell Tessier},
  title        = {Designing Modular Hardware Accelerators in {C} with {ROCCC} 2.0},
  booktitle    = {18th {IEEE} Annual International Symposium on Field-Programmable Custom
                  Computing Machines, {FCCM} 2010, Charlotte, North Carolina, USA, 2-4
                  May 2010},
  pages        = {127--134},
  publisher    = {{IEEE} Computer Society},
  year         = {2010},
  url          = {https://doi.org/10.1109/FCCM.2010.28},
  doi          = {10.1109/FCCM.2010.28},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fccm/VillarrealPNH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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