BibTeX records: Holger Gryska

• > Home > Persons > Holger Gryska

@article{DBLP:journals/integration/MullerSGWB06,
  author       = {Matthias M{\"{u}}ller and
                  Sven Simon and
                  Holger Gryska and
                  Andreas Wortmann and
                  Steffen Buch},
  title        = {Low power synthesizable register files for processor and {IP} cores},
  journal      = {Integr.},
  volume       = {39},
  number       = {2},
  pages        = {131--155},
  year         = {2006},
  url          = {https://doi.org/10.1016/j.vlsi.2004.08.001},
  doi          = {10.1016/J.VLSI.2004.08.001},
  timestamp    = {Fri, 27 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/integration/MullerSGWB06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ecctd/KalyanaramanMSS05,
  author       = {Vijayakumar Kalyanaraman and
                  Matthias M{\"{u}}ller and
                  Sven Simon and
                  Mario Steinert and
                  Holger Gryska},
  title        = {A power dissipation comparison of ALU-architectures for ASIPs},
  booktitle    = {Proceedings of the 2005 European Conference on Circuit Theory and
                  Design, {ECCTD} 2005, Cork, Ireland, August 29th - September 1st 2005},
  pages        = {217--220},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ECCTD.2005.1523032},
  doi          = {10.1109/ECCTD.2005.1523032},
  timestamp    = {Thu, 28 Mar 2024 11:30:41 +0100},
  biburl       = {https://dblp.org/rec/conf/ecctd/KalyanaramanMSS05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ecctd/KalyanaramanMSS05a,
  author       = {Vijayakumar Kalyanaraman and
                  Matthias M{\"{u}}ller and
                  Sven Simon and
                  Mario Steinert and
                  Holger Gryska},
  title        = {Power reduction of ASIPs by distributing the workload on several ASIP-instances},
  booktitle    = {Proceedings of the 2005 European Conference on Circuit Theory and
                  Design, {ECCTD} 2005, Cork, Ireland, August 29th - September 1st 2005},
  pages        = {457--460},
  publisher    = {{IEEE}},
  year         = {2005},
  url          = {https://doi.org/10.1109/ECCTD.2005.1523159},
  doi          = {10.1109/ECCTD.2005.1523159},
  timestamp    = {Thu, 23 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/ecctd/KalyanaramanMSS05a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/SimonMGWB04,
  author       = {Sven Simon and
                  Matthias M{\"{u}}ller and
                  Holger Gryska and
                  Andreas Wortmann and
                  Steffen Buch},
  title        = {An instruction set for the efficient implementation of the {CORDIC}
                  algorithm},
  booktitle    = {Proceedings of the 2004 International Symposium on Circuits and Systems,
                  {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004},
  pages        = {357--360},
  publisher    = {{IEEE}},
  year         = {2004},
  timestamp    = {Fri, 27 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/SimonMGWB04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}