BibTeX records: Luca Giancane

download as .bib file

@inproceedings{DBLP:conf/mlsp/GaizoPCG23,
  author       = {Dario Del Gaizo and
                  Francesco De Palo and
                  Fabio Cipriani and
                  Luca Giancane},
  editor       = {Danilo Comminiello and
                  Michele Scarpiniti},
  title        = {Adaptive Pre-Processing for Neural Network Hardware Deployment},
  booktitle    = {33rd {IEEE} International Workshop on Machine Learning for Signal
                  Processing, {MLSP} 2023, Rome, Italy, September 17-20, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/MLSP55844.2023.10285902},
  doi          = {10.1109/MLSP55844.2023.10285902},
  timestamp    = {Mon, 06 Nov 2023 17:21:37 +0100},
  biburl       = {https://dblp.org/rec/conf/mlsp/GaizoPCG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/BucciGLT12,
  author       = {Marco Bucci and
                  Luca Giancane and
                  Raimondo Luzzi and
                  Alessandro Trifiletti},
  title        = {A Flip-Flop for the {DPA} Resistant Three-Phase Dual-Rail Pre-Charge
                  Logic Family},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {20},
  number       = {11},
  pages        = {2128--2132},
  year         = {2012},
  url          = {https://doi.org/10.1109/TVLSI.2011.2165862},
  doi          = {10.1109/TVLSI.2011.2165862},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/BucciGLT12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/BucciGLST11,
  author       = {Marco Bucci and
                  Luca Giancane and
                  Raimondo Luzzi and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  title        = {Delay-Based Dual-Rail Precharge Logic},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {19},
  number       = {7},
  pages        = {1147--1153},
  year         = {2011},
  url          = {https://doi.org/10.1109/TVLSI.2010.2046505},
  doi          = {10.1109/TVLSI.2010.2046505},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/BucciGLST11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/DjukanovicGSTA11,
  author       = {Milena Djukanovic and
                  Luca Giancane and
                  Giuseppe Scotti and
                  Alessandro Trifiletti and
                  Massimo Alioto},
  title        = {Leakage Power Analysis attacks: Effectiveness on {DPA} resistant logic
                  styles under process variations},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
                  15-19 2011, Rio de Janeiro, Brazil},
  pages        = {2043--2046},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ISCAS.2011.5937998},
  doi          = {10.1109/ISCAS.2011.5937998},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/DjukanovicGSTA11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcas/AliotoGST10,
  author       = {Massimo Alioto and
                  Luca Giancane and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  title        = {Leakage Power Analysis Attacks: {A} Novel Class of Attacks to Nanometer
                  Cryptographic Circuits},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {57-I},
  number       = {2},
  pages        = {355--367},
  year         = {2010},
  url          = {https://doi.org/10.1109/TCSI.2009.2019411},
  doi          = {10.1109/TCSI.2009.2019411},
  timestamp    = {Fri, 22 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/AliotoGST10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icecsys/BucciGLST09,
  author       = {Marco Bucci and
                  Luca Giancane and
                  Raimondo Luzzi and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  title        = {Delay-based dual-rail pre-charge logic},
  booktitle    = {16th {IEEE} International Conference on Electronics, Circuits, and
                  Systems, {ICECS} 2009, Yasmine Hammamet, Tunisia, 13-19 December,
                  2009},
  pages        = {53--56},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ICECS.2009.5410921},
  doi          = {10.1109/ICECS.2009.5410921},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/BucciGLST09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icecsys/AliotoGST09,
  author       = {Massimo Alioto and
                  Luca Giancane and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  title        = {Leakage Power Analysis attacks: Theoretical analysis and impact of
                  variations},
  booktitle    = {16th {IEEE} International Conference on Electronics, Circuits, and
                  Systems, {ICECS} 2009, Yasmine Hammamet, Tunisia, 13-19 December,
                  2009},
  pages        = {85--88},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ICECS.2009.5410929},
  doi          = {10.1109/ICECS.2009.5410929},
  timestamp    = {Thu, 15 Jun 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/AliotoGST09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/PareschiSGRST09,
  author       = {Fabio Pareschi and
                  Giuseppe Scotti and
                  Luca Giancane and
                  Riccardo Rovatti and
                  Gianluca Setti and
                  Alessandro Trifiletti},
  title        = {Power Analysis of a Chaos-based Random Number Generator for Cryptographic
                  Security},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2009), 24-17
                  May 2009, Taipei, Taiwan},
  pages        = {2858--2861},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISCAS.2009.5118398},
  doi          = {10.1109/ISCAS.2009.5118398},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/PareschiSGRST09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/iet-cds/BucciGLMST08,
  author       = {Marco Bucci and
                  Luca Giancane and
                  Raimondo Luzzi and
                  M. Marino and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  title        = {Enhancing power analysis attacks against cryptographic devices},
  journal      = {{IET} Circuits Devices Syst.},
  volume       = {2},
  number       = {3},
  pages        = {298--305},
  year         = {2008},
  url          = {https://doi.org/10.1049/iet-cds:20070166},
  doi          = {10.1049/IET-CDS:20070166},
  timestamp    = {Thu, 10 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/iet-cds/BucciGLMST08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icecsys/GiancaneMOST08,
  author       = {Luca Giancane and
                  Piero Marietti and
                  Mauro Olivieri and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  title        = {A new dynamic differential logic style as a countermeasure to power
                  analysis attacks},
  booktitle    = {15th {IEEE} International Conference on Electronics, Circuits and
                  Systems, {ICECS} 2008, St. Julien's, Malta, August 31 2008-September
                  3, 2008},
  pages        = {364--367},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ICECS.2008.4674866},
  doi          = {10.1109/ICECS.2008.4674866},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/GiancaneMOST08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tdsc/BucciGLT07,
  author       = {Marco Bucci and
                  Luca Giancane and
                  Raimondo Luzzi and
                  Alessandro Trifiletti},
  title        = {A Dynamic and Differential {CMOS} Lookup Table with Data-Independent
                  Power Consumption for Cryptographic Applications on Chip Cards},
  journal      = {{IEEE} Trans. Dependable Secur. Comput.},
  volume       = {4},
  number       = {4},
  pages        = {245--251},
  year         = {2007},
  url          = {https://doi.org/10.1109/TDSC.2007.70212},
  doi          = {10.1109/TDSC.2007.70212},
  timestamp    = {Thu, 09 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tdsc/BucciGLT07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/patmos/CenturelliGOST07,
  author       = {Francesco Centurelli and
                  Luca Giancane and
                  Mauro Olivieri and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  editor       = {Nadine Az{\'{e}}mard and
                  Lars J. Svensson},
  title        = {A Statistical Model of Logic Gates for Monte Carlo Simulation Including
                  On-Chip Variations},
  booktitle    = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
                  and Simulation, 17th International Workshop, {PATMOS} 2007, Gothenburg,
                  Sweden, September 3-5, 2007, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {4644},
  pages        = {516--525},
  publisher    = {Springer},
  year         = {2007},
  url          = {https://doi.org/10.1007/978-3-540-74442-9\_50},
  doi          = {10.1007/978-3-540-74442-9\_50},
  timestamp    = {Mon, 15 Jun 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/patmos/CenturelliGOST07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ches/BucciGLT06,
  author       = {Marco Bucci and
                  Luca Giancane and
                  Raimondo Luzzi and
                  Alessandro Trifiletti},
  editor       = {Louis Goubin and
                  Mitsuru Matsui},
  title        = {Three-Phase Dual-Rail Pre-charge Logic},
  booktitle    = {Cryptographic Hardware and Embedded Systems - {CHES} 2006, 8th International
                  Workshop, Yokohama, Japan, October 10-13, 2006, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {4249},
  pages        = {232--241},
  publisher    = {Springer},
  year         = {2006},
  url          = {https://doi.org/10.1007/11894063\_19},
  doi          = {10.1007/11894063\_19},
  timestamp    = {Tue, 14 May 2019 10:00:47 +0200},
  biburl       = {https://dblp.org/rec/conf/ches/BucciGLT06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/BucciGLST06,
  author       = {Marco Bucci and
                  Luca Giancane and
                  Raimondo Luzzi and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  title        = {Enhancing power analysis attacks against cryptographic devices},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
                  May 2006, Island of Kos, Greece},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISCAS.2006.1693232},
  doi          = {10.1109/ISCAS.2006.1693232},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BucciGLST06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/BucciGLVT06,
  author       = {Marco Bucci and
                  Luca Giancane and
                  Raimondo Luzzi and
                  Mario Varanonuovo and
                  Alessandro Trifiletti},
  title        = {A novel concept for stateless random bit generators in cryptographic
                  applications},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
                  May 2006, Island of Kos, Greece},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISCAS.2006.1692586},
  doi          = {10.1109/ISCAS.2006.1692586},
  timestamp    = {Fri, 26 May 2017 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/BucciGLVT06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.