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ORCIDBibTeX records: José Luís Güntzel
@article{DBLP:journals/tcad/FontanaANAGBG24,
author = {Tiago Augusto Fontana and
Erfan Aghaeekiasaraee and
Renan Netto and
Sheiny Fabre Almeida and
Upma Gandhi and
Laleh Behjat and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {{ILPGRC:} ILP-Based Global Routing Optimization With Cell Movements},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {43},
number = {1},
pages = {352--365},
year = {2024},
url = {https://doi.org/10.1109/TCAD.2023.3305579},
doi = {10.1109/TCAD.2023.3305579},
timestamp = {Fri, 08 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/FontanaANAGBG24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/AghaeekiasaraeeTFNAGGWB23,
author = {Erfan Aghaeekiasaraee and
Aysa Fakheri Tabrizi and
Tiago Augusto Fontana and
Renan Netto and
Sheiny Fabre Almeida and
Upma Gandhi and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
David T. Westwick and
Laleh Behjat},
title = {{CRP2.0:} {A} Fast and Robust Cooperation between Routing and Placement
in Advanced Technology Nodes},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {28},
number = {5},
pages = {79:1--79:42},
year = {2023},
url = {https://doi.org/10.1145/3590962},
doi = {10.1145/3590962},
timestamp = {Sat, 28 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/AghaeekiasaraeeTFNAGGWB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/BrascherSCSGG23,
author = {Andr{\'{e}} Beims Br{\"{a}}scher and
Gabriela Furtado Da Silveira and
Luiz Henrique Cancellier and
Ismael Seidel and
Mateus Grellert and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {A New Approach to Video Coding Leveraging Hybrid Coding and Video
Frame Interpolation},
booktitle = {36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems
Design, {SBCCI} 2023, Rio de Janeiro, Brazil, August 28 - Sept. 1,
2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/SBCCI60457.2023.10261663},
doi = {10.1109/SBCCI60457.2023.10261663},
timestamp = {Wed, 11 Oct 2023 10:11:30 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/BrascherSCSGG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/FilhoSCMGG23,
author = {Vanio Rodrigues Filho and
Ismael Seidel and
Nicole Citadin and
Marcio Monteiro and
Mateus Grellert and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Low-Energy and Reduced-Area Hardware Architecture for the Versatile
Video Coding {FME}},
booktitle = {36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems
Design, {SBCCI} 2023, Rio de Janeiro, Brazil, August 28 - Sept. 1,
2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/SBCCI60457.2023.10261654},
doi = {10.1109/SBCCI60457.2023.10261654},
timestamp = {Wed, 11 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/FilhoSCMGG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NettoFFLPBG22,
author = {Renan Netto and
Sheiny Fabre and
Tiago Augusto Fontana and
Vinicius S. Livramento and
La{\'{e}}rcio Lima Pilla and
Laleh Behjat and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Algorithm Selection Framework for Legalization Using Deep Convolutional
Neural Networks and Transfer Learning},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {41},
number = {5},
pages = {1481--1494},
year = {2022},
url = {https://doi.org/10.1109/TCAD.2021.3079126},
doi = {10.1109/TCAD.2021.3079126},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NettoFFLPBG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euvip/CancellierGGC22,
author = {Luiz Henrique Cancellier and
Mateus Grellert and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Lu{\'{\i}}s Alberto da Silva Cruz},
title = {Autoencoder Model Exploration for Multi-Layer Video Compression},
booktitle = {10th European Workshop on Visual Information Processing, {EUVIP} 2022,
Lisbon, Portugal, September 11-14, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/EUVIP53989.2022.9922780},
doi = {10.1109/EUVIP53989.2022.9922780},
timestamp = {Mon, 07 Nov 2022 17:38:59 +0100},
biburl = {https://dblp.org/rec/conf/euvip/CancellierGGC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/AlmeidaTANFGGBM22,
author = {Sheiny Fabre Almeida and
Aysa Fakheri Tabrizi and
Erfan Aghaeekiasaraee and
Renan Netto and
Tiago Augusto Fontana and
Upma Gandhi and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Laleh Behjat and
Cristina Meinhardt},
title = {{E-RVP:} An Initial Design Rule Violation Predictor Using Placement
Information},
booktitle = {29th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2022, Glasgow, United Kingdom, October 24-26, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ICECS202256217.2022.9970846},
doi = {10.1109/ICECS202256217.2022.9970846},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/AlmeidaTANFGGBM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/MonteiroSGGSM22,
author = {Marcio Monteiro and
Ismael Seidel and
Mateus Grellert and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Leonardo Bandeira Soares and
Cristina Meinhardt},
title = {Exploring the Impacts of Multiple Kernel Sizes of Gaussian Filters
Combined to Approximate Computing in Canny Edge Detection},
booktitle = {13th {IEEE} Latin America Symposium on Circuits and System, {LASCAS}
2022, Puerto Varas, Chile, March 1-4, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/LASCAS53948.2022.9789080},
doi = {10.1109/LASCAS53948.2022.9789080},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/lascas/MonteiroSGGSM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/AlmeidaGBM22,
author = {Sheiny Fabre Almeida and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Laleh Behjat and
Cristina Meinhardt},
title = {Routability-Driven Detailed Placement Using Reinforcement Learning},
booktitle = {30th {IFIP/IEEE} 30th International Conference on Very Large Scale
Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022},
pages = {1--2},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSI-SoC54400.2022.9939602},
doi = {10.1109/VLSI-SOC54400.2022.9939602},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/AlmeidaGBM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icassp/SantAnnaCSGG21,
author = {Gabriel B. Sant'Anna and
Luiz Henrique Cancellier and
Ismael Seidel and
Mateus Grellert and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Relying on a Rate Constraint to Reduce Motion Estimation Complexity},
booktitle = {{IEEE} International Conference on Acoustics, Speech and Signal Processing,
{ICASSP} 2021, Toronto, ON, Canada, June 6-11, 2021},
pages = {1560--1564},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ICASSP39728.2021.9414799},
doi = {10.1109/ICASSP39728.2021.9414799},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icassp/SantAnnaCSGG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/MonteiroSSGSGM21,
author = {Marcio Monteiro and
Pedro Aquino Silva and
Ismael Seidel and
Mateus Grellert and
Leonardo Bandeira Soares and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Cristina Meinhardt},
title = {Design of Energy-Efficient Gaussian Filters by Combining Refactoring
and Approximate Adders},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401199},
doi = {10.1109/ISCAS51556.2021.9401199},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/MonteiroSSGSGM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/FontanaANAGTWBG21,
author = {Tiago Augusto Fontana and
Erfan Aghaeekiasaraee and
Renan Netto and
Sheiny Fabre Almeida and
Upma Gandhi and
Aysa Fakheri Tabrizi and
David T. Westwick and
Laleh Behjat and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {ILP-Based Global Routing Optimization with Cell Movements},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2021, Tampa,
FL, USA, July 7-9, 2021},
pages = {25--30},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISVLSI51109.2021.00016},
doi = {10.1109/ISVLSI51109.2021.00016},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isvlsi/FontanaANAGTWBG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mmsp/FilhoMSGG21,
author = {Vanio Rodrigues Filho and
Marcio Monteiro and
Ismael Seidel and
Mateus Grellert and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Hardware-Friendly Search Patterns for the Versatile Video Coding Fractional
Motion Estimation},
booktitle = {23rd International Workshop on Multimedia Signal Processing, {MMSP}
2021, Tampere, Finland, October 6-8, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MMSP53017.2021.9733603},
doi = {10.1109/MMSP53017.2021.9733603},
timestamp = {Sat, 19 Mar 2022 22:55:53 +0100},
biburl = {https://dblp.org/rec/conf/mmsp/FilhoMSGG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mmsp/SeidelFGAG21,
author = {Ismael Seidel and
Vanio Rodrigues Filho and
Mateus Grellert and
Luciano Volcan Agostini and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {{SAD} or SATD? How the Distortion Metric Impacts a Fractional Motion
Estimation {VLSI} Architecture},
booktitle = {23rd International Workshop on Multimedia Signal Processing, {MMSP}
2021, Tampere, Finland, October 6-8, 2021},
pages = {1--6},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MMSP53017.2021.9733518},
doi = {10.1109/MMSP53017.2021.9733518},
timestamp = {Sat, 19 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mmsp/SeidelFGAG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/HubnerG20,
author = {Michael H{\"{u}}bner and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Guest Editors' Introduction: {SBCCI} 2018},
journal = {{IEEE} Des. Test},
volume = {37},
number = {3},
pages = {5--6},
year = {2020},
url = {https://doi.org/10.1109/MDAT.2020.2989094},
doi = {10.1109/MDAT.2020.2989094},
timestamp = {Wed, 28 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/HubnerG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/FilhoMSGG20,
author = {Vanio Rodrigues Filho and
Marcio Monteiro and
Ismael Seidel and
Mateus Grellert and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Standalone Rate-Distortion {FME} Architecture},
booktitle = {33rd Symposium on Integrated Circuits and Systems Design, {SBCCI}
2020, Campinas, Brazil, August 24-28, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/SBCCI50935.2020.9189898},
doi = {10.1109/SBCCI50935.2020.9189898},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/FilhoMSGG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/SeidelMBAG19,
author = {Ismael Seidel and
Marcio Monteiro and
Bruno Bonotto and
Luciano Volcan Agostini and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Energy-Efficient Hadamard-Based {SATD} Hardware Architectures Through
Calculation Reuse},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {66-I},
number = {6},
pages = {2102--2115},
year = {2019},
url = {https://doi.org/10.1109/TCSI.2019.2900004},
doi = {10.1109/TCSI.2019.2900004},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/SeidelMBAG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/NettoFFLPG19,
author = {Renan Netto and
Sheiny Fabre and
Tiago Augusto Fontana and
Vinicius S. Livramento and
La{\'{e}}rcio Lima Pilla and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
editor = {Ismail Bustany and
William Swartz},
title = {How Deep Learning Can Drive Physical Synthesis Towards More Predictable
Legalization},
booktitle = {Proceedings of the 2019 International Symposium on Physical Design,
{ISPD} 2019, San Francisco, CA, USA, April 14-17, 2019},
pages = {3--10},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299902.3309754},
doi = {10.1145/3299902.3309754},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ispd/NettoFFLPG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/CancellierSG18,
author = {Luiz Henrique Cancellier and
Ismael Seidel and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {On {HEVC} Robustness to Integer Motion Estimation Pruning},
booktitle = {25th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2018, Bordeaux, France, December 9-12, 2018},
pages = {197--200},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ICECS.2018.8617853},
doi = {10.1109/ICECS.2018.8617853},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/CancellierSG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/LohmannHLSG18,
author = {Douglas Lohmann and
Alexis Huf and
Djones Lettnin and
Frank Siqueira and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {A Domain-specific Language for Automated Fault Injection in SystemC
Models},
booktitle = {25th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2018, Bordeaux, France, December 9-12, 2018},
pages = {425--428},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ICECS.2018.8617838},
doi = {10.1109/ICECS.2018.8617838},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/LohmannHLSG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SeidelFAG18,
author = {Ismael Seidel and
Vanio Rodrigues Filho and
Luciano Volcan Agostini and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Coding- and Energy-Efficient {FME} Hardware Design},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351114},
doi = {10.1109/ISCAS.2018.8351114},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SeidelFAG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/MonteiroSG18,
author = {Marcio Monteiro and
Ismael Seidel and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {On the calculation reuse in hadamard-based {SATD}},
booktitle = {9th {IEEE} Latin American Symposium on Circuits {\&} Systems,
{LASCAS} 2018, Puerto Vallarta, Mexico, February 25-28, 2018},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/LASCAS.2018.8399925},
doi = {10.1109/LASCAS.2018.8399925},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/lascas/MonteiroSG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/FabreGPNFL18,
author = {Sheiny Fabre and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
La{\'{e}}rcio Lima Pilla and
Renan Netto and
Tiago Fontana and
Vinicius S. Livramento},
title = {Enhancing Multi-Threaded Legalization Through k-d Tree Circuit Partitioning},
booktitle = {31st Symposium on Integrated Circuits and Systems Design, {SBCCI}
2018, Bento Gon{\c{c}}alves, RS, Brazil, August 27-31, 2018},
pages = {1--6},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/SBCCI.2018.8533264},
doi = {10.1109/SBCCI.2018.8533264},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/FabreGPNFL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LivramentoLCYXP17,
author = {Vinicius S. Livramento and
Derong Liu and
Salim Chowdhury and
Bei Yu and
Xiaoqing Xu and
David Z. Pan and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Luiz C. V. dos Santos},
title = {Incremental Layer Assignment Driven by an External Signoff Timing
Engine},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {36},
number = {7},
pages = {1126--1139},
year = {2017},
url = {https://doi.org/10.1109/TCAD.2016.2638450},
doi = {10.1109/TCAD.2016.2638450},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LivramentoLCYXP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/FontanaNLGAPG17,
author = {Tiago Fontana and
Renan Netto and
Vinicius S. Livramento and
Chrystian Guth and
Sheiny Almeida and
La{\'{e}}rcio Lima Pilla and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
editor = {Mustafa Ozdal and
Chris Chu},
title = {How Game Engines Can Inspire {EDA} Tools Development: {A} use case
for an open-source physical design library},
booktitle = {Proceedings of the 2017 {ACM} on International Symposium on Physical
Design, {ISDP} 2017, Portland, OR, USA, March 19-22, 2017},
pages = {25--31},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3036669.3038248},
doi = {10.1145/3036669.3038248},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispd/FontanaNLGAPG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/CancellierSG17,
author = {Luiz Henrique Cancellier and
Ismael Seidel and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
editor = {Jarbas A. N. Silveira},
title = {Block matching hardware architecture for SATD-based successive elimination},
booktitle = {Proceedings of the 30th Symposium on Integrated Circuits and Systems
Design: Chip on the Sands, {SBCCI} 2017, Fortaleza, Cear{\'{a}},
Brazil, August 28 - September 01, 2017},
pages = {149--154},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3109984.3110010},
doi = {10.1145/3109984.3110010},
timestamp = {Mon, 19 Nov 2018 09:08:30 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/CancellierSG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/BrascherSG17,
author = {Andr{\'{e}} Beims Br{\"{a}}scher and
Ismael Seidel and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
editor = {Jarbas A. N. Silveira},
title = {Improving the energy efficiency of a low-area {SATD} hardware architecture
using fine grain {PDE}},
booktitle = {Proceedings of the 30th Symposium on Integrated Circuits and Systems
Design: Chip on the Sands, {SBCCI} 2017, Fortaleza, Cear{\'{a}},
Brazil, August 28 - September 01, 2017},
pages = {155--161},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3109984.3110009},
doi = {10.1145/3109984.3110009},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/BrascherSG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/FontanaANLGPG17,
author = {Tiago Augusto Fontana and
Sheiny Almeida and
Renan Netto and
Vinicius S. Livramento and
Chrystian Guth and
La{\'{e}}rcio Lima Pilla and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
editor = {Jarbas A. N. Silveira},
title = {Exploiting cache locality to speedup register clustering},
booktitle = {Proceedings of the 30th Symposium on Integrated Circuits and Systems
Design: Chip on the Sands, {SBCCI} 2017, Fortaleza, Cear{\'{a}},
Brazil, August 28 - September 01, 2017},
pages = {191--197},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3109984.3110005},
doi = {10.1145/3109984.3110005},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/FontanaANLGPG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LivramentoNGGS16,
author = {Vinicius S. Livramento and
Renan Netto and
Chrystian Guth and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Luiz Cl{\'{a}}udio Villar dos Santos},
title = {Clock-Tree-Aware Incremental Timing-Driven Placement},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {21},
number = {3},
pages = {38:1--38:27},
year = {2016},
url = {https://doi.org/10.1145/2858793},
doi = {10.1145/2858793},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LivramentoNGGS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/NettoGLCPG16,
author = {Renan Netto and
Chrystian Guth and
Vinicius S. Livramento and
M{\'{a}}rcio Castro and
La{\'{e}}rcio Lima Pilla and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Exploiting parallelism to speed up circuit legalization},
booktitle = {2016 {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2016, Monte Carlo, Monaco, December 11-14, 2016},
pages = {624--627},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ICECS.2016.7841279},
doi = {10.1109/ICECS.2016.7841279},
timestamp = {Fri, 11 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/NettoGLCPG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/SeidelGA16,
author = {Ismael Seidel and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Luciano Volcan Agostini},
title = {Coarse grain partial distortion elimination for Hadamard {ME} in {HEVC}},
booktitle = {2016 {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2016, Monte Carlo, Monaco, December 11-14, 2016},
pages = {704--707},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ICECS.2016.7841299},
doi = {10.1109/ICECS.2016.7841299},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icecsys/SeidelGA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icip/SeidelCGA16,
author = {Ismael Seidel and
Luiz Henrique Cancellier and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Luciano Volcan Agostini},
title = {Rate-constrained successive elimination of Hadamard-based SATDs},
booktitle = {2016 {IEEE} International Conference on Image Processing, {ICIP} 2016,
Phoenix, AZ, USA, September 25-28, 2016},
pages = {2395--2399},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ICIP.2016.7532788},
doi = {10.1109/ICIP.2016.7532788},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/icip/SeidelCGA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SeidelBGA16,
author = {Ismael Seidel and
Andr{\'{e}} Beims Br{\"{a}}scher and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Luciano Volcan Agostini},
title = {Energy-efficient {SATD} for beyond {HEVC}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2016,
Montr{\'{e}}al, QC, Canada, May 22-25, 2016},
pages = {802--805},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ISCAS.2016.7527362},
doi = {10.1109/ISCAS.2016.7527362},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SeidelBGA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/NettoLGSG16,
author = {Renan Netto and
Vinicius S. Livramento and
Chrystian Guth and
Luiz C. V. dos Santos and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Speeding up Incremental Legalization with Fast Queries to Multidimensional
Trees},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2016, Pittsburgh,
PA, USA, July 11-13, 2016},
pages = {36--41},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ISVLSI.2016.122},
doi = {10.1109/ISVLSI.2016.122},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/NettoLGSG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/SeidelMGA16,
author = {Ismael Seidel and
Marcio Monteiro and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Luciano Volcan Agostini},
title = {Squarer exploration for energy-efficient sum of squared differences},
booktitle = {{IEEE} 7th Latin American Symposium on Circuits {\&} Systems,
{LASCAS} 2016, Florianopolis, Brazil, February 28 - March 2, 2016},
pages = {327--330},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/LASCAS.2016.7451076},
doi = {10.1109/LASCAS.2016.7451076},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/lascas/SeidelMGA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/NettoLGSG16,
author = {Renan Netto and
Vinicius S. Livramento and
Chrystian Guth and
Luiz C. V. dos Santos and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Evaluating the impact of circuit legalization on incremental optimization
techniques},
booktitle = {29th Symposium on Integrated Circuits and Systems Design, {SBCCI}
2016, Belo Horizonte, Brazil, August 29 - September 3, 2016},
pages = {1--6},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/SBCCI.2016.7724041},
doi = {10.1109/SBCCI.2016.7724041},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/NettoLGSG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LivramentoGNGS15,
author = {Vinicius S. Livramento and
Chrystian Guth and
Renan Netto and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Luiz C. V. dos Santos},
editor = {Diana Marculescu and
Frank Liu},
title = {Exploiting Non-Critical Steiner Tree Branches for Post-Placement Timing
Optimization},
booktitle = {Proceedings of the {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2015, Austin, TX, USA, November 2-6, 2015},
pages = {528--535},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ICCAD.2015.7372615},
doi = {10.1109/ICCAD.2015.7372615},
timestamp = {Mon, 26 Jun 2023 16:43:56 +0200},
biburl = {https://dblp.org/rec/conf/iccad/LivramentoGNGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/GuthLNFGS15,
author = {Chrystian Guth and
Vinicius S. Livramento and
Renan Netto and
Renan Fonseca and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Luiz C. V. dos Santos},
editor = {Azadeh Davoodi and
Evangeline F. Y. Young},
title = {Timing-Driven Placement Based on Dynamic Net-Weighting for Efficient
Slack Histogram Compression},
booktitle = {Proceedings of the 2015 Symposium on International Symposium on Physical
Design, {ISPD} 2015, Monterey, CA, USA, March 29 - April 1, 2015},
pages = {141--148},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2717764.2717766},
doi = {10.1145/2717764.2717766},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispd/GuthLNFGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/MonteiroFJG15,
author = {Jucemar Monteiro and
Guilherme Flach and
Marcelo O. Johann and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
title = {An analytical timing-driven algorithm for detailed placement},
booktitle = {{IEEE} 6th Latin American Symposium on Circuits {\&} Systems,
{LASCAS} 2015, Montevideo, Uruguay, February 24-27, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/LASCAS.2015.7250495},
doi = {10.1109/LASCAS.2015.7250495},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/lascas/MonteiroFJG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/SeidelBG15,
author = {Ismael Seidel and
Andr{\'{e}} Beims Br{\"{a}}scher and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Combining Pel Decimation with Partial Distortion Elimination to increase
{SAD} energy efficiency},
booktitle = {25th International Workshop on Power and Timing Modeling, Optimization
and Simulation, {PATMOS} 2015, Salvador, Brazil, September 1-4, 2015},
pages = {177--184},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/PATMOS.2015.7347604},
doi = {10.1109/PATMOS.2015.7347604},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/patmos/SeidelBG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LivramentoGGJ14,
author = {Vinicius S. Livramento and
Chrystian Guth and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Marcelo O. Johann},
title = {A Hybrid Technique for Discrete Gate Sizing Based on Lagrangian Relaxation},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {19},
number = {4},
pages = {40:1--40:25},
year = {2014},
url = {https://doi.org/10.1145/2647956},
doi = {10.1145/2647956},
timestamp = {Fri, 11 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/LivramentoGGJ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/CancellierBSG14,
author = {Luiz Henrique Cancellier and
Andr{\'{e}} Beims Br{\"{a}}scher and
Ismael Seidel and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
editor = {Edward David Moreno Ordonez and
Rodolfo Jardim de Azevedo and
Peter R. Kinget},
title = {Energy-Efficient Hadamard-Based {SATD} Architectures},
booktitle = {Proceedings of the 27th Symposium on Integrated Circuits and Systems
Design, Aracaju, Brazil, September 1-5, 2014},
pages = {36:1--36:6},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2660540.2661004},
doi = {10.1145/2660540.2661004},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/CancellierBSG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LivramentoGGJ13,
author = {Vinicius S. Livramento and
Chrystian Guth and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Marcelo O. Johann},
editor = {Enrico Macii},
title = {Fast and efficient lagrangian relaxation-based discrete gate sizing},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {1855--1860},
publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}},
year = {2013},
url = {https://doi.org/10.7873/DATE.2013.370},
doi = {10.7873/DATE.2013.370},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/LivramentoGGJ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icmcs/SeidelMWG13,
author = {Ismael Seidel and
Bruno George de Moraes and
Emilio Wuerges and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
title = {Quality assessment of subsampling patterns for pel decimation targeting
high definition video},
booktitle = {Proceedings of the 2013 {IEEE} International Conference on Multimedia
and Expo, {ICME} 2013, San Jose, CA, USA, July 15-19, 2013},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ICME.2013.6607555},
doi = {10.1109/ICME.2013.6607555},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/icmcs/SeidelMWG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/SeidelMG13,
author = {Ismael Seidel and
Bruno George de Moraes and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {A low-power configurable {VLSI} architecture for sum of absolute differences
calculation},
booktitle = {4th {IEEE} Latin American Symposium on Circuits and Systems, {LASCAS}
2013, Cusco, Peru, February 27 - March 1, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/LASCAS.2013.6519042},
doi = {10.1109/LASCAS.2013.6519042},
timestamp = {Fri, 13 Aug 2021 09:26:01 +0200},
biburl = {https://dblp.org/rec/conf/lascas/SeidelMG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/lascas/SoratoNMGCK13,
author = {Edson Sorato and
Renan Netto and
Pedro Michel and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Adalbery R. Castro and
Aldebaro Klautau},
title = {{VLSI} architectures for Digital Modulation Classification using Support
Vector Machines},
booktitle = {4th {IEEE} Latin American Symposium on Circuits and Systems, {LASCAS}
2013, Cusco, Peru, February 27 - March 1, 2013},
pages = {1--4},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/LASCAS.2013.6519075},
doi = {10.1109/LASCAS.2013.6519075},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/lascas/SoratoNMGCK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/SeidelMBG13,
author = {Ismael Seidel and
Bruno George de Moraes and
Andr{\'{e}} Beims Br{\"{a}}scher and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {On the impacts of pel decimation and High-Vt/Low-Vdd on {SAD} calculation},
booktitle = {26th Symposium on Integrated Circuits and Systems Design, {SBCCI}
2013, Curitiba, Brazil, September 2-6, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/SBCCI.2013.6644880},
doi = {10.1109/SBCCI.2013.6644880},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/SeidelMBG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/SoratoFBGCK13,
author = {Edson Sorato and
Eduardo P. Fronza and
Paulo R. F. M. M. Barbosa and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Adalbery R. Castro and
Aldebaro Klautau},
title = {Real-time digital modulation classification based on Support Vector
Machines},
booktitle = {26th Symposium on Integrated Circuits and Systems Design, {SBCCI}
2013, Curitiba, Brazil, September 2-6, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/SBCCI.2013.6644875},
doi = {10.1109/SBCCI.2013.6644875},
timestamp = {Mon, 05 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/SoratoFBGCK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/LivramentoGGJ12,
author = {Vinicius dos S. Livramento and
Chrystian Guth and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Marcelo O. Johann},
title = {Lagrangian relaxation-based Discrete Gate Sizing for leakage power
minimization},
booktitle = {19th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2012, Seville, Spain, December 9-12, 2012},
pages = {468--471},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ICECS.2012.6463706},
doi = {10.1109/ICECS.2012.6463706},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/LivramentoGGJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/WestphalGS12,
author = {Rafael Westphal and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Luiz Cl{\'{a}}udio Villar dos Santos},
title = {Energy-efficient multi-task computing on MPSoCs: {A} case study from
a memory perspective},
booktitle = {19th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2012, Seville, Spain, December 9-12, 2012},
pages = {905--908},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ICECS.2012.6463515},
doi = {10.1109/ICECS.2012.6463515},
timestamp = {Sun, 04 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/WestphalGS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/MonteiroGA11,
author = {Jucemar Monteiro and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Luciano Volcan Agostini},
title = {{A1CSA:} An energy-efficient fast adder architecture for cell-based
{VLSI} design},
booktitle = {18th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2011, Beirut, Lebanon, December 11-14, 2011},
pages = {442--445},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ICECS.2011.6122308},
doi = {10.1109/ICECS.2011.6122308},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/MonteiroGA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LivramentoMMG11,
author = {Vinicius S. Livramento and
Bruno George de Moraes and
Brunno Abner Machado and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {An energy-efficient 8{\texttimes}8 2-D {DCT} {VLSI} architecture for
battery-powered portable devices},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {587--590},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937633},
doi = {10.1109/ISCAS.2011.5937633},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LivramentoMMG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/LivramentoMMG11,
author = {Vinicius S. Livramento and
Bruno George de Moraes and
Brunno Abner Machado and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
editor = {Antonio Carlos Cavalcanti and
Elmar U. K. Melcher and
J{\"{u}}rgen Becker},
title = {An energy-efficient {FDCT/IDCT} configurable {IP} core for mobile
multimedia platforms},
booktitle = {24th Symposium on Integrated Circuits and Systems Design, {SBCCI}
'11, Jo{\~{a}}o Pessoa, Brazil, August 30 - September 2, 2011},
pages = {149--154},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2020876.2020911},
doi = {10.1145/2020876.2020911},
timestamp = {Fri, 19 Jul 2019 13:02:47 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/LivramentoMMG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/VolpatoMGS11,
author = {Daniel P. Volpato and
Alexandre Keunecke Ign{\'{a}}cio Mendon{\c{c}}a and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Luiz Cl{\'{a}}udio Villar dos Santos},
editor = {Antonio Carlos Cavalcanti and
Elmar U. K. Melcher and
J{\"{u}}rgen Becker},
title = {Cache-tuning-aware scratchpad allocation from binaries},
booktitle = {24th Symposium on Integrated Circuits and Systems Design, {SBCCI}
'11, Jo{\~{a}}o Pessoa, Brazil, August 30 - September 2, 2011},
pages = {221--226},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2020876.2020926},
doi = {10.1145/2020876.2020926},
timestamp = {Sun, 23 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/VolpatoMGS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/VolpatoMSG10,
author = {Daniel P. Volpato and
Alexandre Keunecke Ign{\'{a}}cio Mendon{\c{c}}a and
Luiz C. V. dos Santos and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
title = {A Post-compiling Approach that Exploits Code Granularity in Scratchpads
to Improve Energy Efficiency},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2010, 5-7
July 2010, Lixouri Kefalonia, Greece},
pages = {127--132},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ISVLSI.2010.66},
doi = {10.1109/ISVLSI.2010.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/VolpatoMSG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/MendoncaVGS09,
author = {Alexandre Keunecke Ign{\'{a}}cio Mendon{\c{c}}a and
Daniel P. Volpato and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Luiz C. V. dos Santos},
title = {Mapping Data and Code into Scratchpads from Relocatable Binaries},
booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2009, 13-15
May 2009, Tampa, Florida, {USA}},
pages = {157--162},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ISVLSI.2009.28},
doi = {10.1109/ISVLSI.2009.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/MendoncaVGS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/MesquitaFAG07,
author = {Eduardo Mesquita and
Helen Franck and
Luciano Volcan Agostini and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
editor = {Koen Bertels and
Walid A. Najjar and
Arjan J. van Genderen and
Stamatis Vassiliadis},
title = {{RIC} Fast Adder and its Set Tolerant Implementation in FPGAs},
booktitle = {{FPL} 2007, International Conference on Field Programmable Logic and
Applications, Amsterdam, The Netherlands, 27-29 August 2007},
pages = {638--641},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPL.2007.4380735},
doi = {10.1109/FPL.2007.4380735},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/MesquitaFAG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AgostiniPBRGS06,
author = {Luciano Volcan Agostini and
Roger Endrigo Carvalho Porto and
Sergio Bampi and
Leandro Rosa and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Ivan Saraiva Silva},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {High throughput architecture for {H.264/AVC} forward transforms block},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {320--323},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127982},
doi = {10.1145/1127908.1127982},
timestamp = {Wed, 16 Aug 2023 21:16:32 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AgostiniPBRGS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AgostiniPGSB06,
author = {Luciano Volcan Agostini and
Roger Endrigo Carvalho Porto and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Ivan Saraiva Silva and
Sergio Bampi},
title = {High throughput multitransform and multiparallelism {IP} for {H.264/AVC}
video compression standard},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1693859},
doi = {10.1109/ISCAS.2006.1693859},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/AgostiniPGSB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/FerraoRG06,
author = {Daniel Lima Ferr{\~{a}}o and
Ricardo Reis and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
editor = {Johan Vounckx and
Nadine Az{\'{e}}mard and
Philippe Maurine},
title = {Considering Zero-Arrival Time and Block-Arrival Time in Hierarchical
Functional Timing Analysis},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
and Simulation, 16th International Workshop, {PATMOS} 2006, Montpellier,
France, September 13-15, 2006, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4148},
pages = {301--310},
publisher = {Springer},
year = {2006},
url = {https://doi.org/10.1007/11847083\_29},
doi = {10.1007/11847083\_29},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/FerraoRG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SantosFRG05,
author = {Cristiano Santos and
Daniel Lima Ferr{\~{a}}o and
Ricardo Reis and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel},
title = {Incremental timing optimization for automatic layout generation},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
May 2005, Kobe, Japan},
pages = {3567--3570},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/ISCAS.2005.1465400},
doi = {10.1109/ISCAS.2005.1465400},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SantosFRG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/ReisKG04,
author = {Ricardo Reis and
Fernanda Lima Kastensmidt and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
editor = {Stamatis Vassiliadis and
Jean{-}Luc Gaudiot and
Vincenzo Piuri},
title = {Physical design methodologies for performance predictability and manufacturability},
booktitle = {Proceedings of the First Conference on Computing Frontiers, 2004,
Ischia, Italy, April 14-16, 2004},
pages = {390--397},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/977091.977147},
doi = {10.1145/977091.977147},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cf/ReisKG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/BastianLGR04,
author = {Fabricio B. Bastian and
Cristiano Lazzari and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Ricardo Reis},
editor = {Enrico Macii and
Odysseas G. Koufopavlou and
Vassilis Paliouras},
title = {A New Transistor Folding Algorithm Applied to an Automatic Full-Custom
Layout Generation Tool},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation; 14th International Workshop, {PATMOS} 2004, Santorini,
Greece, September 15-17, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3254},
pages = {732--741},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30205-6\_75},
doi = {10.1007/978-3-540-30205-6\_75},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/BastianLGR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/GuerreroWGBJRM03,
author = {David Guerrero Martos and
Gustavo Wilke and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Manuel J. Bellido and
Jorge Juan{-}Chico and
Paulino Ruiz{-}de{-}Clavijo and
Alejandro Mill{\'{a}}n},
editor = {Jorge Juan{-}Chico and
Enrico Macii},
title = {Computational Delay Models to Estimate the Delay of Floating Cubes
in {CMOS} Circuits},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation, 13th International Workshop, {PATMOS} 2003, Torino,
Italy, September 10-12, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2799},
pages = {501--510},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-39762-5\_56},
doi = {10.1007/978-3-540-39762-5\_56},
timestamp = {Mon, 16 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/patmos/GuerreroWGBJRM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/FerraoWRG03,
author = {Daniel Lima Ferr{\~{a}}o and
Gustavo Wilke and
Ricardo Augusto da Luz Reis and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
title = {Improving Critical Path Identification in Functional Timing Analysis},
booktitle = {Proceedings of the 16th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2003, Sao Paulo, Brazil, September 8-11, 2003},
pages = {297--302},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/SBCCI.2003.1232844},
doi = {10.1109/SBCCI.2003.1232844},
timestamp = {Fri, 17 Jun 2022 15:49:04 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/FerraoWRG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/SantosWLRG03,
author = {Cristiano Santos and
Gustavo Wilke and
Cristiano Lazzari and
Ricardo Reis and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel},
title = {A Transistor Sizing Method Applied to an Automatic Layout Generation
Tool},
booktitle = {Proceedings of the 16th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2003, Sao Paulo, Brazil, September 8-11, 2003},
pages = {303},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/SBCCI.2003.1232845},
doi = {10.1109/SBCCI.2003.1232845},
timestamp = {Fri, 17 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/SantosWLRG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/LazzariDGR03,
author = {Cristiano Lazzari and
Cristiano Viana Domingues and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Ricardo Augusto da Luz Reis},
editor = {Manfred Glesner and
Ricardo Augusto da Luz Reis and
Hans Eveking and
Vincent John Mooney III and
Leandro Soares Indrusiak and
Peter Zipf},
title = {A New Macro-cell Generation Strategy for three metal layer {CMOS}
Technologies},
booktitle = {{IFIP} VLSI-SoC 2003, {IFIP} {WG} 10.5 International Conference on
Very Large Scale Integration of System-on-Chip, Darmstadt, Germany,
1-3 December 2003},
pages = {193--197},
publisher = {Technische Universit{\"{a}}t Darmstadt, Insitute of Microelectronic
Systems},
year = {2003},
timestamp = {Thu, 07 Oct 2004 09:29:26 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/LazzariDGR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/LazzariDGR03a,
author = {Cristiano Lazzari and
Cristiano Viana Domingues and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Ricardo Reis},
editor = {Manfred Glesner and
Ricardo Augusto da Luz Reis and
Leandro Soares Indrusiak and
Vincent John Mooney III and
Hans Eveking},
title = {A Novel full Automatic Layout Generation Strategy for Static {CMOS}
Circuits},
booktitle = {{VLSI-SOC:} From Systems to Chips - {IFIP} {TC} 10/ {WG} 10.5 Twelfth
International Conference on Very Large Scale Integration of System
on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany},
series = {{IFIP}},
volume = {200},
pages = {197--211},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/0-387-33403-3\_13},
doi = {10.1007/0-387-33403-3\_13},
timestamp = {Tue, 22 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/LazzariDGR03a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/GuntzelWBP002,
author = {Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Gustavo Wilke and
M{\'{a}}rcio Bystronski and
Ana Cristina Medina Pinto and
Ricardo Reis},
title = {A Comparison Between Testability Measures Applied to Complex Gates},
booktitle = {3rd Latin American Test Workshop, {LATW} 2002, Montevideo, Uruguay,
February 10-13, 2002},
pages = {144--149},
publisher = {{IEEE}},
year = {2002},
timestamp = {Wed, 26 Jul 2023 15:57:25 +0200},
biburl = {https://dblp.org/rec/conf/latw/GuntzelWBP002.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/WilkeGBP002,
author = {Gustavo Wilke and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
M{\'{a}}rcio Bystronski and
Ana Cristina Medina Pinto and
Ricardo Reis},
title = {Finding the Critical Delay of Combinational Blocks by Floating Vector
Simulation and Path Tracing},
booktitle = {Proceedings of the 15th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2002, Porto Alegre, Brazil, September 9-14,
2002},
pages = {277--282},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://dl.acm.org/doi/10.5555/827246.827351},
doi = {10.5555/827246.827351},
timestamp = {Tue, 25 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/WilkeGBP002.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/rita/GuntzelR01,
author = {Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Ricardo Augusto da Luz Reis},
title = {An{\'{a}}lise de Timing Funcional de Circuitos {VLSI} Contendo
Portas Complexas},
journal = {{RITA}},
volume = {8},
number = {1},
pages = {111--142},
year = {2001},
timestamp = {Mon, 24 May 2004 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/rita/GuntzelR01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/GuntzelP001,
author = {Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Ana Cristina Medina Pinto and
Ricardo Reis},
title = {A Timed Calculus for ATG-Based Timing Analysis with Complex Gates},
booktitle = {2nd Latin American Test Workshop, {LATW} 2001, Cancun, Mexico, February
11-14, 2001},
pages = {234--239},
publisher = {{IEEE}},
year = {2001},
timestamp = {Wed, 26 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/GuntzelP001.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/GuntzelPD000,
author = {Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Ana Cristina Medina Pinto and
Eduardo D'Avila and
Ricardo Reis},
title = {ATG-Based Timing Analysis of Circuits Containing Complex Gates},
booktitle = {Proceedings of the 13th Annual Symposium on Integrated Circuits and
Systems Design, {SBCCI} 2000, Manaus, Brazil, September 18-24, 2000},
pages = {21--28},
publisher = {{IEEE} Computer Society},
year = {2000},
url = {https://dl.acm.org/doi/10.5555/827245.827284},
doi = {10.5555/827245.827284},
timestamp = {Tue, 25 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/GuntzelPD000.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ifip10-5/LimaJGDCR99,
author = {Fernanda Lima and
Marcelo O. Johann and
Jos{\'{e}} Lu{\'{\i}}s Almada G{\"{u}}ntzel and
Eduardo D'Avila and
Luigi Carro and
Ricardo Augusto da Luz Reis},
editor = {L. Miguel Silveira and
Srinivas Devadas and
Ricardo Augusto da Luz Reis},
title = {Designing a Mask Programmable Matrix for Sequential Circuits},
booktitle = {{VLSI:} Systems on a Chip, {IFIP} {TC10/WG10.5} Tenth International
Conference on Very Large Scale Integration {(VLSI} '99), December
1-4, 1999, Lisbon, Portugal},
series = {{IFIP} Conference Proceedings},
volume = {162},
pages = {439--446},
publisher = {Kluwer},
year = {1999},
timestamp = {Mon, 24 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ifip10-5/LimaJGDCR99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/X98a,
author = {Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Ana Cristina Medina Pinto and
Fernando Moraes and
Ricardo Reis},
title = {An Improved Path Enumeration Method Considering Different Fall and
Rise Gate Delays},
booktitle = {Proceedings of the 11th Annual Symposium on Integrated Circuits Design,
{SBCCI} 1998, Rio de Janiero, Brazil, September 30 - October 2, 1998},
pages = {208--212},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.ieeecomputersociety.org/10.1109/SBCCI.1998.715443},
doi = {10.1109/SBCCI.1998.715443},
timestamp = {Tue, 25 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/sbcci/X98a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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