Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Luis Entrena
@article{DBLP:journals/taes/Garcia-Astudillo24,
author = {Luis {\'{A}}ngel Garc{\'{\i}}a{-}Astudillo and
Almudena Lindoso and
Luis Entrena},
title = {Error Mitigation Using Optimized Redundancy for Composite Algorithms
in FPGAs},
journal = {{IEEE} Trans. Aerosp. Electron. Syst.},
volume = {60},
number = {2},
pages = {2143--2152},
year = {2024},
url = {https://doi.org/10.1109/TAES.2024.3350015},
doi = {10.1109/TAES.2024.3350015},
timestamp = {Sat, 04 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/taes/Garcia-Astudillo24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/EntrenaSGPGLS23,
author = {Luis Entrena and
Antonio J. Sanchez{-}Clemente and
Luis {\'{A}}ngel Garc{\'{\i}}a{-}Astudillo and
Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Almudena Lindoso and
Roberto Sarmiento},
title = {Formal Verification of Fault-Tolerant Hardware Designs},
journal = {{IEEE} Access},
volume = {11},
pages = {116127--116140},
year = {2023},
url = {https://doi.org/10.1109/ACCESS.2023.3325616},
doi = {10.1109/ACCESS.2023.3325616},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/EntrenaSGPGLS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/AvilesBEL23,
author = {Pablo M. Aviles and
Jose A. Belloch and
Luis Entrena and
Almudena Lindoso},
title = {Supervised Triple Macrosynchronized Lockstep {(STMLS)} Architecture
for Multicore Processors},
journal = {{IEEE} Access},
volume = {11},
pages = {128706--128723},
year = {2023},
url = {https://doi.org/10.1109/ACCESS.2023.3332294},
doi = {10.1109/ACCESS.2023.3332294},
timestamp = {Sun, 10 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/access/AvilesBEL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/MartinDNE23,
author = {Honorio Mart{\'{\i}}n and
Sophie Dupuis and
Giorgio Di Natale and
Luis Entrena},
title = {Using Approximate Circuits Against Hardware Trojans},
journal = {{IEEE} Des. Test},
volume = {40},
number = {3},
pages = {8--16},
year = {2023},
url = {https://doi.org/10.1109/MDAT.2021.3117741},
doi = {10.1109/MDAT.2021.3117741},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/dt/MartinDNE23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/Garcia-Astudillo22,
author = {Luis {\'{A}}ngel Garc{\'{\i}}a{-}Astudillo and
Luis Entrena and
Almudena Lindoso and
Honorio Mart{\'{\i}}n},
title = {Reduced Resolution Redundancy: {A} Novel Approximate Error Mitigation
Technique},
journal = {{IEEE} Access},
volume = {10},
pages = {20643--20651},
year = {2022},
url = {https://doi.org/10.1109/ACCESS.2022.3152202},
doi = {10.1109/ACCESS.2022.3152202},
timestamp = {Fri, 01 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/Garcia-Astudillo22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/LuzaWED22,
author = {Lucas Matana Luza and
Frederic Wrobel and
Luis Entrena and
Luigi Dilillo},
title = {Impact of Atmospheric and Space Radiation on Sensitive Electronic
Devices},
booktitle = {{IEEE} European Test Symposium, {ETS} 2022, Barcelona, Spain, May
23-27, 2022},
pages = {1--10},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ETS54262.2022.9810454},
doi = {10.1109/ETS54262.2022.9810454},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/LuzaWED22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/access/CamaraMPE20,
author = {Carmen Camara and
Honorio Mart{\'{\i}}n and
Pedro Peris{-}Lopez and
Luis Entrena},
title = {A True Random Number Generator Based on Gait Data for the Internet
of You},
journal = {{IEEE} Access},
volume = {8},
pages = {71642--71651},
year = {2020},
url = {https://doi.org/10.1109/ACCESS.2020.2986822},
doi = {10.1109/ACCESS.2020.2986822},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/CamaraMPE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dcis/Garcia-Astudillo20,
author = {Luis {\'{A}}ngel Garc{\'{\i}}a{-}Astudillo and
Almudena Lindoso and
Marta Portela and
Luis Entrena},
title = {Evaluation of a Reduced Precision Redundancy {FFT} Design},
booktitle = {{XXXV} Conference on Design of Circuits and Integrated Systems, {DCIS}
2020, Segovia, Spain, November 18-20, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/DCIS51330.2020.9268634},
doi = {10.1109/DCIS51330.2020.9268634},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dcis/Garcia-Astudillo20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/entropy/MartinMPME18,
author = {Honorio Mart{\'{\i}}n and
Pedro Mart{\'{\i}}n{-}Holgado and
Pedro Peris{-}Lopez and
Yolanda Morilla and
Luis Entrena},
title = {On the Entropy of Oscillator-Based True Random Number Generators under
Ionizing Radiation},
journal = {Entropy},
volume = {20},
number = {7},
pages = {513},
year = {2018},
url = {https://doi.org/10.3390/e20070513},
doi = {10.3390/E20070513},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/entropy/MartinMPME18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceee/MartinME18,
author = {Honorio Mart{\'{\i}}n and
Enrique San Mill{\'{a}}n and
Luis Entrena{-}Arrontes},
title = {Dynamic control of entropy and power consumption in TRNGs for IoT
applications},
journal = {{IEICE} Electron. Express},
volume = {15},
number = {2},
pages = {20171157},
year = {2018},
url = {https://doi.org/10.1587/elex.14.20171157},
doi = {10.1587/ELEX.14.20171157},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieiceee/MartinME18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mr/Pena-FernandezL18,
author = {Manuel Pe{\~{n}}a{-}Fernandez and
Almudena Lindoso and
Luis Entrena and
Mario Garc{\'{\i}}a{-}Valderas and
S. Philippe and
Yolanda Morilla and
Pedro Mart{\'{\i}}n{-}Holgado},
title = {PTM-based hybrid error-detection architecture for {ARM} microprocessors},
journal = {Microelectron. Reliab.},
volume = {88-90},
pages = {925--930},
year = {2018},
url = {https://doi.org/10.1016/j.microrel.2018.07.074},
doi = {10.1016/J.MICROREL.2018.07.074},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mr/Pena-FernandezL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/MartinNE18,
author = {Honorio Mart{\'{\i}}n and
Giorgio Di Natale and
Luis Entrena},
title = {Towards a Dependable True Random Number Generator With Self-Repair
Capabilities},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {65-I},
number = {1},
pages = {247--256},
year = {2018},
url = {https://doi.org/10.1109/TCSI.2017.2711033},
doi = {10.1109/TCSI.2017.2711033},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/MartinNE18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ahs/Sanchez-Clemente18,
author = {Antonio Sanchez{-}Clemente and
Luis Entrena and
Fernanda Lima Kastensmidt},
title = {Approximate {TMR} for selective error mitigation in FPGAs based on
testability analysis},
booktitle = {2018 {NASA/ESA} Conference on Adaptive Hardware and Systems, {AHS}
2018, Edinburgh, United Kingdom, August 6-9, 2018},
pages = {112--119},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/AHS.2018.8541485},
doi = {10.1109/AHS.2018.8541485},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ahs/Sanchez-Clemente18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MartinEDN18,
author = {Honorio Mart{\'{\i}}n and
Luis Entrena and
Sophie Dupuis and
Giorgio Di Natale},
editor = {Dimitris Gizopoulos and
Dan Alexandrescu and
Mihalis Maniatakos and
Panagiota Papavramidou},
title = {A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion
and Provide Obfuscation},
booktitle = {24th {IEEE} International Symposium on On-Line Testing And Robust
System Design, {IOLTS} 2018, Platja D'Aro, Spain, July 2-4, 2018},
pages = {41--42},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/IOLTS.2018.8474077},
doi = {10.1109/IOLTS.2018.8474077},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/MartinEDN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/DuRSPPLE16,
author = {Boyang Du and
Matteo Sonza Reorda and
Luca Sterpone and
Luis Parra and
Marta Portela{-}Garc{\'{\i}}a and
Almudena Lindoso and
Luis Entrena},
title = {Online Test of Control Flow Errors: {A} New Debug Interface-Based
Approach},
journal = {{IEEE} Trans. Computers},
volume = {65},
number = {6},
pages = {1846--1855},
year = {2016},
url = {https://doi.org/10.1109/TC.2015.2456014},
doi = {10.1109/TC.2015.2456014},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/DuRSPPLE16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tdsc/Martinez-Alvarez16,
author = {Antonio Mart{\'{\i}}nez{-}{\'{A}}lvarez and
Felipe Restrepo{-}Calle and
Sergio Cuenca{-}Asensi and
Leonardo M. Reyneri and
Almudena Lindoso and
Luis Entrena},
title = {A Hardware-Software Approach for On-Line Soft Error Mitigation in
Interrupt-Driven Applications},
journal = {{IEEE} Trans. Dependable Secur. Comput.},
volume = {13},
number = {4},
pages = {502--508},
year = {2016},
url = {https://doi.org/10.1109/TDSC.2014.2382593},
doi = {10.1109/TDSC.2014.2382593},
timestamp = {Thu, 09 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tdsc/Martinez-Alvarez16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tr/Sanchez-Clemente16,
author = {Antonio Sanchez{-}Clemente and
Luis Entrena and
Radek Hrbacek and
Luk{\'{a}}s Sekanina},
title = {Error Mitigation Using Approximate Logic Circuits: {A} Comparison
of Probabilistic and Evolutionary Approaches},
journal = {{IEEE} Trans. Reliab.},
volume = {65},
number = {4},
pages = {1871--1883},
year = {2016},
url = {https://doi.org/10.1109/TR.2016.2604918},
doi = {10.1109/TR.2016.2604918},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tr/Sanchez-Clemente16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/Arevalo-GarbayoPGLE14,
author = {M. Ar{\'{e}}valo{-}Garbayo and
Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil and
Luis Entrena},
title = {A method to assess the robustness of cryptographic circuits at the
design stage},
journal = {Microelectron. J.},
volume = {45},
number = {10},
pages = {1354--1360},
year = {2014},
url = {https://doi.org/10.1016/j.mejo.2013.12.012},
doi = {10.1016/J.MEJO.2013.12.012},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/Arevalo-GarbayoPGLE14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/DuRSPPLE14,
author = {Boyang Du and
Matteo Sonza Reorda and
Luca Sterpone and
Luis Parra and
Marta Portela{-}Garc{\'{\i}}a and
Almudena Lindoso and
Luis Entrena},
title = {A new solution to on-line detection of Control Flow Errors},
booktitle = {2014 {IEEE} 20th International On-Line Testing Symposium, {IOLTS}
2014, Platja d'Aro, Girona, Spain, July 7-9, 2014},
pages = {105--110},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/IOLTS.2014.6873680},
doi = {10.1109/IOLTS.2014.6873680},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/iolts/DuRSPPLE14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Sanchez-ClementeEG14,
author = {Antonio Sanchez{-}Clemente and
Luis Entrena and
Mario Garc{\'{\i}}a{-}Valderas},
title = {Error masking with approximate logic circuits using dynamic probability
estimations},
booktitle = {2014 {IEEE} 20th International On-Line Testing Symposium, {IOLTS}
2014, Platja d'Aro, Girona, Spain, July 7-9, 2014},
pages = {134--139},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/IOLTS.2014.6873685},
doi = {10.1109/IOLTS.2014.6873685},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/Sanchez-ClementeEG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/DuRSPPLE13,
author = {Boyang Du and
Matteo Sonza Reorda and
Luca Sterpone and
Luis Parra and
Marta Portela{-}Garc{\'{\i}}a and
Almudena Lindoso and
Luis Entrena},
title = {Exploiting the debug interface to support on-line test of control
flow errors},
booktitle = {2013 {IEEE} 19th International On-Line Testing Symposium (IOLTS),
Chania, Crete, Greece, July 8-10, 2013},
pages = {98--103},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/IOLTS.2013.6604058},
doi = {10.1109/IOLTS.2013.6604058},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/iolts/DuRSPPLE13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/Entrena13,
author = {Luis Entrena},
title = {Fast fault injection techniques using FPGAs},
booktitle = {14th Latin American Test Workshop, {LATW} 2013, Cordoba, Argentina,
3-5 April, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/LATW.2013.6562680},
doi = {10.1109/LATW.2013.6562680},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/latw/Entrena13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/Portela-GarciaLEGLMPPV12,
author = {Marta Portela{-}Garc{\'{\i}}a and
Almudena Lindoso and
Luis Entrena and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil and
N. Marroni and
Bernardo Pianta and
Let{\'{\i}}cia Maria Bolzani Poehls and
Fabian Vargas},
title = {Evaluating the Effectiveness of a Software-Based Technique Under SEEs
Using FPGA-Based Fault Injection Approach},
journal = {J. Electron. Test.},
volume = {28},
number = {6},
pages = {777--789},
year = {2012},
url = {https://doi.org/10.1007/s10836-012-5321-4},
doi = {10.1007/S10836-012-5321-4},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/Portela-GarciaLEGLMPPV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mam/Portela-GarciaGGREGL12,
author = {Marta Portela{-}Garc{\'{\i}}a and
Michelangelo Grosso and
M. Gallardo{-}Campos and
Matteo Sonza Reorda and
Luis Entrena and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil},
title = {On the use of embedded debug features for permanent and transient
fault resilience in microprocessors},
journal = {Microprocess. Microsystems},
volume = {36},
number = {5},
pages = {334--343},
year = {2012},
url = {https://doi.org/10.1016/j.micpro.2012.02.013},
doi = {10.1016/J.MICPRO.2012.02.013},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mam/Portela-GarciaGGREGL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tc/EntrenaGCLPL12,
author = {Luis Entrena and
Mario Garc{\'{\i}}a{-}Valderas and
Ra{\'{u}}l Fern{\'{a}}ndez Cardenal and
Almudena Lindoso and
Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil},
title = {Soft Error Sensitivity Evaluation of Microprocessors by Multilevel
Emulation-Based Fault Injection},
journal = {{IEEE} Trans. Computers},
volume = {61},
number = {3},
pages = {313--322},
year = {2012},
url = {https://doi.org/10.1109/TC.2010.262},
doi = {10.1109/TC.2010.262},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tc/EntrenaGCLPL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Sanchez-ClementeEGL12,
author = {Antonio Sanchez{-}Clemente and
Luis Entrena and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil},
title = {Logic masking for {SET} Mitigation Using Approximate Logic Circuits},
booktitle = {18th {IEEE} International On-Line Testing Symposium, {IOLTS} 2012,
Sitges, Spain, June 27-29, 2012},
pages = {176--181},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IOLTS.2012.6313868},
doi = {10.1109/IOLTS.2012.6313868},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Sanchez-ClementeEGL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Lopez-OngilPGVERMMRA12,
author = {Celia L{\'{o}}pez{-}Ongil and
Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Anna Vaskova and
Luis Entrena and
Joaqu{\'{\i}}n Rivas{-}Abalo and
Alberto Mart{\'{\i}}n{-}Ortega and
Javier Martinez{-}Oter and
S. Rodriguez{-}Bustabad and
Ignacio Arruego},
title = {{SEU} sensitivity of robust communication protocols},
booktitle = {18th {IEEE} International On-Line Testing Symposium, {IOLTS} 2012,
Sitges, Spain, June 27-29, 2012},
pages = {188--193},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/IOLTS.2012.6313870},
doi = {10.1109/IOLTS.2012.6313870},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/Lopez-OngilPGVERMMRA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tdsc/Portela-GarciaLGE11,
author = {Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil and
Mario Garc{\'{\i}}a{-}Valderas and
Luis Entrena},
title = {Fault Injection in Modern Microprocessors Using On-Chip Debugging
Infrastructures},
journal = {{IEEE} Trans. Dependable Secur. Comput.},
volume = {8},
number = {2},
pages = {308--314},
year = {2011},
url = {https://doi.org/10.1109/TDSC.2010.50},
doi = {10.1109/TDSC.2010.50},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tdsc/Portela-GarciaLGE11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/VaskovaLMJE11,
author = {Anna Vaskova and
Celia L{\'{o}}pez{-}Ongil and
Enrique San Mill{\'{a}}n and
Alejandro Jim{\'{e}}nez{-}Horas and
Luis Entrena},
title = {Accelerating secure circuit design with hardware implementation of
Diehard Battery of tests of randomness},
booktitle = {17th {IEEE} International On-Line Testing Symposium {(IOLTS} 2011),
13-15 July, 2011, Athens, Greece},
pages = {179--181},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/IOLTS.2011.5993835},
doi = {10.1109/IOLTS.2011.5993835},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/VaskovaLMJE11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/MartinMECL11,
author = {Honorio Mart{\'{\i}}n and
Enrique San Mill{\'{a}}n and
Luis Entrena and
Julio C{\'{e}}sar Hern{\'{a}}ndez Castro and
Pedro Peris{-}Lopez},
title = {{AKARI-X:} {A} pseudorandom number generator for secure lightweight
systems},
booktitle = {17th {IEEE} International On-Line Testing Symposium {(IOLTS} 2011),
13-15 July, 2011, Athens, Greece},
pages = {228--233},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/IOLTS.2011.5994534},
doi = {10.1109/IOLTS.2011.5994534},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/MartinMECL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/VaskovaLGPE11,
author = {Anna Vaskova and
Celia L{\'{o}}pez{-}Ongil and
Mario Garc{\'{\i}}a{-}Valderas and
Marta Portela{-}Garc{\'{\i}}a and
Luis Entrena},
title = {Evaluation techniques for on-line testing of robust systems based
on critical tasks distribution},
booktitle = {17th {IEEE} International On-Line Testing Symposium {(IOLTS} 2011),
13-15 July, 2011, Athens, Greece},
pages = {258--263},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/IOLTS.2011.5994539},
doi = {10.1109/IOLTS.2011.5994539},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/VaskovaLGPE11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/Portela-GarciaL11,
author = {Marta Portela{-}Garc{\'{\i}}a and
Almudena Lindoso and
Luis Entrena and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil and
Bernardo Pianta and
Let{\'{\i}}cia Maria Bolzani Poehls and
Fabian Vargas},
title = {Using an FPGA-based fault injection technique to evaluate software
robustness under SEEs: {A} case study},
booktitle = {12th Latin American Test Workshop, {LATW} 2011, Beach of Porto de
Galinhas, Brazil, March 27-30, 2011},
pages = {1--6},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/LATW.2011.5985918},
doi = {10.1109/LATW.2011.5985918},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/Portela-GarciaL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icitst/Peris-LopezMLE10,
author = {Pedro Peris{-}Lopez and
Enrique San Mill{\'{a}}n and
Jan C. A. van der Lubbe and
Luis Entrena},
title = {Cryptographically secure pseudo-random bit generator for {RFID} tags},
booktitle = {5th International Conference for Internet Technology and Secured Transactions,
{ICITST} 2010, London, United Kingdom, November 8-10, 2010},
pages = {1--6},
publisher = {{IEEE}},
year = {2010},
url = {https://ieeexplore.ieee.org/document/5678035/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icitst/Peris-LopezMLE10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/GrossoRPGLE10,
author = {Michelangelo Grosso and
Matteo Sonza Reorda and
Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil and
Luis Entrena},
title = {An on-line fault detection technique based on embedded debug features},
booktitle = {16th {IEEE} International On-Line Testing Symposium {(IOLTS} 2010),
5-7 July, 2010, Corfu, Greece},
pages = {167--172},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/IOLTS.2010.5560215},
doi = {10.1109/IOLTS.2010.5560215},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/GrossoRPGLE10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/VaskovaLJME10,
author = {Anna Vaskova and
Celia L{\'{o}}pez{-}Ongil and
Alejandro Jim{\'{e}}nez{-}Horas and
Enrique San Mill{\'{a}}n and
Luis Entrena},
title = {Robust cryptographic ciphers with on-line statistical properties validation},
booktitle = {16th {IEEE} International On-Line Testing Symposium {(IOLTS} 2010),
5-7 July, 2010, Corfu, Greece},
pages = {208--210},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/IOLTS.2010.5560203},
doi = {10.1109/IOLTS.2010.5560203},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/VaskovaLJME10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/ValderasECOG09,
author = {Mario Garc{\'{\i}}a{-}Valderas and
Luis Entrena and
Ra{\'{u}}l Fern{\'{a}}ndez Cardenal and
Celia L{\'{o}}pez{-}Ongil and
Marta Portela{-}Garc{\'{\i}}a},
title = {{SET} Emulation Under a Quantized Delay Model},
journal = {J. Electron. Test.},
volume = {25},
number = {1},
pages = {107--116},
year = {2009},
url = {https://doi.org/10.1007/s10836-008-5081-3},
doi = {10.1007/S10836-008-5081-3},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/ValderasECOG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Garcia-ValderasPLE09,
author = {Mario Garc{\'{\i}}a{-}Valderas and
Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil and
Luis Entrena},
title = {In-depth analysis of digital circuits against soft errors for selective
hardening},
booktitle = {15th {IEEE} International On-Line Testing Symposium {(IOLTS} 2009),
24-26 June 2009, Sesimbra-Lisbon, Portugal},
pages = {144--149},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IOLTS.2009.5195997},
doi = {10.1109/IOLTS.2009.5195997},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Garcia-ValderasPLE09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/VargasRPPOGE09,
author = {Fabian Vargas and
Claudia A. Rocha and
Bernardo Pianta and
Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil and
Mario Garc{\'{\i}}a{-}Valderas and
Luis Entrena},
title = {Briefing power/reliability optimization in embedded software design},
booktitle = {15th {IEEE} International On-Line Testing Symposium {(IOLTS} 2009),
24-26 June 2009, Sesimbra-Lisbon, Portugal},
pages = {185--186},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IOLTS.2009.5196007},
doi = {10.1109/IOLTS.2009.5196007},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/VargasRPPOGE09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Jimenez-HorasMLPGE09,
author = {Alejandro Jim{\'{e}}nez{-}Horas and
Enrique San Mill{\'{a}}n and
Celia L{\'{o}}pez{-}Ongil and
Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Luis Entrena},
title = {Pseudo-random number generation applied to robust modern cryptography:
{A} new technique for block ciphers},
booktitle = {15th {IEEE} International On-Line Testing Symposium {(IOLTS} 2009),
24-26 June 2009, Sesimbra-Lisbon, Portugal},
pages = {203--205},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/IOLTS.2009.5196014},
doi = {10.1109/IOLTS.2009.5196014},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Jimenez-HorasMLPGE09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/Portela-GarciaG09,
author = {Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil and
Luis Entrena and
B. Lestriez and
Luis Berrojo},
title = {Study of {SEU} effects in a Turbo Decoder Bit Error Rate},
booktitle = {10th Latin American Test Workshop, {LATW} 2009, Rio de Janeiro, Brazil,
March 2-5, 2009},
pages = {1--5},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/LATW.2009.4813797},
doi = {10.1109/LATW.2009.4813797},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/Portela-GarciaG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MillanEE08,
author = {Enrique San Mill{\'{a}}n and
Luis Entrena and
Jos{\'{e}} Alberto Espejo},
editor = {Luca Fanucci},
title = {Logic Transformations by Multiple Wire Network Addition},
booktitle = {11th Euromicro Conference on Digital System Design: Architectures,
Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008},
pages = {779--786},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DSD.2008.79},
doi = {10.1109/DSD.2008.79},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MillanEE08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LindosoEIL08,
author = {Almudena Lindoso and
Luis Entrena and
Juan Izquierdo and
Judith Liu{-}Jimenez},
title = {Coarse-grain dynamically reconfigurable coprocessor for image processing
in {SOPC}},
booktitle = {{FPL} 2008, International Conference on Field Programmable Logic and
Applications, Heidelberg, Germany, 8-10 September 2008},
pages = {539--542},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FPL.2008.4630003},
doi = {10.1109/FPL.2008.4630003},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LindosoEIL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Lopez-OngilJPGME08,
author = {Celia L{\'{o}}pez{-}Ongil and
Alejandro Jim{\'{e}}nez{-}Horas and
Marta Portela{-}Garc{\'{\i}}a and
Mario Garc{\'{\i}}a{-}Valderas and
Enrique San Mill{\'{a}}n and
Luis Entrena},
title = {Smart Hardening for Round-based Encryption Algorithms: Application
to Advanced Encryption Standard},
booktitle = {14th {IEEE} International On-Line Testing Symposium {(IOLTS} 2008),
7-9 July 2008, Rhodes, Greece},
pages = {167--168},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/IOLTS.2008.42},
doi = {10.1109/IOLTS.2008.42},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Lopez-OngilJPGME08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jrtip/LindosoE07,
author = {Almudena Lindoso and
Luis Entrena},
title = {High performance FPGA-based image correlation},
journal = {J. Real Time Image Process.},
volume = {2},
number = {4},
pages = {223--233},
year = {2007},
url = {https://doi.org/10.1007/s11554-007-0066-5},
doi = {10.1007/S11554-007-0066-5},
timestamp = {Thu, 18 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jrtip/LindosoE07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/LorenzMME07,
author = {Michael G. Lorenz and
Luis Mengibar and
Enrique San Mill{\'{a}}n and
Luis Entrena},
title = {Low power data processing system with self-reconfigurable architecture},
journal = {J. Syst. Archit.},
volume = {53},
number = {9},
pages = {568--576},
year = {2007},
url = {https://doi.org/10.1016/j.sysarc.2006.12.008},
doi = {10.1016/J.SYSARC.2006.12.008},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/LorenzMME07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/caip/LindosoEL07,
author = {Almudena Lindoso and
Luis Entrena and
Judith Liu{-}Jimenez},
editor = {Walter G. Kropatsch and
Martin Kampel and
Allan Hanbury},
title = {Wavelet-Based Fingerprint Region Selection},
booktitle = {Computer Analysis of Images and Patterns, 12th International Conference,
{CAIP} 2007, Vienna, Austria, August 27-29, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4673},
pages = {391--398},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74272-2\_49},
doi = {10.1007/978-3-540-74272-2\_49},
timestamp = {Tue, 14 May 2019 10:00:53 +0200},
biburl = {https://dblp.org/rec/conf/caip/LindosoEL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/Garcia-ValderasCLGE07,
author = {Mario Garc{\'{\i}}a{-}Valderas and
Ra{\'{u}}l Fern{\'{a}}ndez Cardenal and
Celia L{\'{o}}pez{-}Ongil and
Marta Portela{-}Garc{\'{\i}}a and
Luis Entrena},
editor = {Cristiana Bolchini and
Yong{-}Bin Kim and
Adelio Salsano and
Nur A. Touba},
title = {{SET} Emulation Under a Quantized Delay Model},
booktitle = {22nd {IEEE} International Symposium on Defect and Fault-Tolerance
in {VLSI} Systems {(DFT} 2007), 26-28 September 2007, Rome, Italy},
pages = {68--77},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/DFT.2007.49},
doi = {10.1109/DFT.2007.49},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/Garcia-ValderasCLGE07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icb/LindosoELM07,
author = {Almudena Lindoso and
Luis Entrena and
Judith Liu{-}Jimenez and
Enrique San Mill{\'{a}}n},
editor = {Seong{-}Whan Lee and
Stan Z. Li},
title = {Correlation-Based Fingerprint Matching with Orientation Field Alignment},
booktitle = {Advances in Biometrics, International Conference, {ICB} 2007, Seoul,
Korea, August 27-29, 2007, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {4642},
pages = {713--721},
publisher = {Springer},
year = {2007},
url = {https://doi.org/10.1007/978-3-540-74549-5\_75},
doi = {10.1007/978-3-540-74549-5\_75},
timestamp = {Tue, 14 May 2019 10:00:35 +0200},
biburl = {https://dblp.org/rec/conf/icb/LindosoELM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Portela-GarciaLGE07,
author = {Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil and
Mario Garc{\'{\i}}a{-}Valderas and
Luis Entrena},
title = {A Rapid Fault Injection Approach for Measuring {SEU} Sensitivity in
Complex Processors},
booktitle = {13th {IEEE} International On-Line Testing Symposium {(IOLTS} 2007),
8-11 July 2007, Heraklion, Crete, Greece},
pages = {101--106},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/IOLTS.2007.9},
doi = {10.1109/IOLTS.2007.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Portela-GarciaLGE07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-0710-4757,
author = {Celia L{\'{o}}pez{-}Ongil and
Mario Garc{\'{\i}}a{-}Valderas and
Marta Portela{-}Garc{\'{\i}}a and
Luis Entrena{-}Arrontes},
title = {Techniques for Fast Transient Fault Grading Based on Autonomous Emulation},
journal = {CoRR},
volume = {abs/0710.4757},
year = {2007},
url = {http://arxiv.org/abs/0710.4757},
eprinttype = {arXiv},
eprint = {0710.4757},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-0710-4757.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/Garcia-ValderasPLE06,
author = {Mario Garc{\'{\i}}a{-}Valderas and
Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil and
Luis Entrena{-}Arrontes},
editor = {Matteo Sonza Reorda and
Ondrej Nov{\'{a}}k and
Bernd Straube and
Hana Kub{\'{a}}tov{\'{a}} and
Zdenek Kot{\'{a}}sek and
Pavel Kubal{\'{\i}}k and
Raimund Ubar and
Jir{\'{\i}} Bucek},
title = {An Extension of Transient Fault Emulation Techniques to Circuits with
Embedded Memories},
booktitle = {Proceedings of the 9th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2006), Prague, Czech
Republic, April 18-21, 2006},
pages = {218--219},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/DDECS.2006.1649615},
doi = {10.1109/DDECS.2006.1649615},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/Garcia-ValderasPLE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/ReordaSVPLE06,
author = {Matteo Sonza Reorda and
Luca Sterpone and
Massimo Violante and
Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil and
Luis Entrena},
title = {Fault Injection-based Reliability Evaluation of SoPCs},
booktitle = {11th European Test Symposium, {ETS} 2006, Southhampton, UK, May 21-24,
2006},
pages = {75--82},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ETS.2006.24},
doi = {10.1109/ETS.2006.24},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/ReordaSVPLE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Garcia-ValderasPLE06,
author = {Mario Garc{\'{\i}}a{-}Valderas and
Marta Portela{-}Garc{\'{\i}}a and
Celia L{\'{o}}pez{-}Ongil and
Luis Entrena},
title = {Emulation-based Fault Injection in Circuits with Embedded Memories},
booktitle = {12th {IEEE} International On-Line Testing Symposium {(IOLTS} 2006),
10-12 July 2006, Como, Italy},
pages = {183--184},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/IOLTS.2006.29},
doi = {10.1109/IOLTS.2006.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Garcia-ValderasPLE06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Lopez-OngilGPE05,
author = {Celia L{\'{o}}pez{-}Ongil and
Mario Garc{\'{\i}}a{-}Valderas and
Marta Portela{-}Garc{\'{\i}}a and
Luis Entrena{-}Arrontes},
title = {Techniques for Fast Transient Fault Grading Based on Autonomous Emulation},
booktitle = {2005 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2005), 7-11 March 2005, Munich, Germany},
pages = {308--309},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/DATE.2005.302},
doi = {10.1109/DATE.2005.302},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/Lopez-OngilGPE05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Lopez-OngilGPE05,
author = {Celia L{\'{o}}pez{-}Ongil and
Mario Garc{\'{\i}}a{-}Valderas and
Marta Portela{-}Garc{\'{\i}}a and
Luis Entrena{-}Arrontes},
editor = {Tero Rissa and
Steven J. E. Wilton and
Philip Heng Wai Leong},
title = {An Autonomous FPGA-based Emulation System for Fast Fault Tolerant
Evaluation},
booktitle = {Proceedings of the 2005 International Conference on Field Programmable
Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
pages = {397--402},
publisher = {{IEEE}},
year = {2005},
url = {https://doi.org/10.1109/FPL.2005.1515754},
doi = {10.1109/FPL.2005.1515754},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/Lopez-OngilGPE05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpt/LindosoELL05,
author = {Almudena Lindoso and
Luis Entrena and
Celia L{\'{o}}pez{-}Ongil and
Judith Liu{-}Jimenez},
editor = {Gordon J. Brebner and
Samarjit Chakraborty and
Weng{-}Fai Wong},
title = {Correlation-Based Fingerprint Matching Using FPGAs},
booktitle = {Proceedings of the 2005 {IEEE} International Conference on Field-Programmable
Technology, {FPT} 2005, 11-14 December 2005, Singapore},
pages = {87--94},
publisher = {{IEEE}},
year = {2005},
timestamp = {Tue, 19 Jun 2018 20:15:46 +0200},
biburl = {https://dblp.org/rec/conf/fpt/LindosoELL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Lopez-OngilGPE05,
author = {Celia L{\'{o}}pez{-}Ongil and
Mario Garc{\'{\i}}a{-}Valderas and
Marta Portela{-}Garc{\'{\i}}a and
Luis Entrena{-}Arrontes},
title = {Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault
Grading},
booktitle = {11th {IEEE} International On-Line Testing Symposium {(IOLTS} 2005),
6-8 July 2005, Saint Raphael, France},
pages = {43--48},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/IOLTS.2005.18},
doi = {10.1109/IOLTS.2005.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Lopez-OngilGPE05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eccv/Sanchez-ReilloLE04,
author = {Raul S{\'{a}}nchez{-}Reillo and
Judith Liu{-}Jimenez and
Luis Entrena},
editor = {Davide Maltoni and
Anil K. Jain},
title = {Architectures for Biometric Match-on-Token Solutions},
booktitle = {Biometric Authentication, {ECCV} 2004 International Workshop, BioAW
2004, Prague, Czech Republic, May 15, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3087},
pages = {195--204},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-25976-3\_18},
doi = {10.1007/978-3-540-25976-3\_18},
timestamp = {Tue, 14 May 2019 10:00:45 +0200},
biburl = {https://dblp.org/rec/conf/eccv/Sanchez-ReilloLE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/Lopez-OngilSLCSE04,
author = {Celia L{\'{o}}pez{-}Ongil and
Raul S{\'{a}}nchez{-}Reillo and
Judith Liu{-}Jimenez and
Fernando Casado and
Leslie S{\'{a}}nchez and
Luis Entrena},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {{FPGA} Implementation of Biometric Authentication System Based on
Hand Geometry},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {43--53},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_7},
doi = {10.1007/978-3-540-30117-2\_7},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/Lopez-OngilSLCSE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LorenzMVE04,
author = {Michael G. Lorenz and
Luis Mengibar and
Mario Garc{\'{\i}}a{-}Valderas and
Luis Entrena},
editor = {J{\"{u}}rgen Becker and
Marco Platzner and
Serge Vernalde},
title = {Power Consumption Reduction Through Dynamic Reconfiguration},
booktitle = {Field Programmable Logic and Application, 14th International Conference
, {FPL} 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3203},
pages = {751--760},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30117-2\_76},
doi = {10.1007/978-3-540-30117-2\_76},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LorenzMVE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/Garcia-ValderasLPE04,
author = {Mario Garc{\'{\i}}a{-}Valderas and
Celia L{\'{o}}pez{-}Ongil and
Marta Portela{-}Garc{\'{\i}}a and
Luis Entrena},
title = {Transient Fault Emulation of Hardened Circuits in {FPGA} Platforms},
booktitle = {10th {IEEE} International On-Line Testing Symposium {(IOLTS} 2004),
12-14 July 2004, Funchal, Madeira Island, Portugal},
pages = {109--114},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/IOLTS.2004.49},
doi = {10.1109/IOLTS.2004.49},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/Garcia-ValderasLPE04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jsa/MillanEEL03,
author = {Enrique San Mill{\'{a}}n and
Luis Entrena and
Jos{\'{e}} Alberto Espejo and
Celia L{\'{o}}pez},
title = {Theoretical comparison between sequential redundancy addition and
removal and retiming optimization techniques},
journal = {J. Syst. Archit.},
volume = {49},
number = {12-15},
pages = {529--541},
year = {2003},
url = {https://doi.org/10.1016/j.sysarc.2003.06.002},
doi = {10.1016/J.SYSARC.2003.06.002},
timestamp = {Tue, 19 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jsa/MillanEEL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LorenzMES03,
author = {Michael G. Lorenz and
Luis Mengibar and
Luis Entrena and
Raul S{\'{a}}nchez{-}Reillo},
editor = {Peter Y. K. Cheung and
George A. Constantinides and
Jos{\'{e}} T. de Sousa},
title = {Data Processing System With Self-reconfigurable Architecture, for
Low Cost, Low Power Applications},
booktitle = {Field Programmable Logic and Application, 13th International Conference,
{FPL} 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2778},
pages = {220--229},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-45234-8\_22},
doi = {10.1007/978-3-540-45234-8\_22},
timestamp = {Tue, 07 May 2024 20:11:13 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LorenzMES03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/MengibarELS03,
author = {Luis Mengibar and
Luis Entrena and
Michael G. Lorenz and
Raul S{\'{a}}nchez{-}Reillo},
editor = {Jorge Juan{-}Chico and
Enrico Macii},
title = {State Encoding for Low-Power FSMs in {FPGA}},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation, 13th International Workshop, {PATMOS} 2003, Torino,
Italy, September 10-12, 2003, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2799},
pages = {31--40},
publisher = {Springer},
year = {2003},
url = {https://doi.org/10.1007/978-3-540-39762-5\_5},
doi = {10.1007/978-3-540-39762-5\_5},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/MengibarELS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BerrojoGCRSEL02,
author = {Luis Berrojo and
Isabel Gonz{\'{a}}lez and
Fulvio Corno and
Matteo Sonza Reorda and
Giovanni Squillero and
Luis Entrena and
Celia L{\'{o}}pez},
title = {New Techniques for Speeding-Up Fault-Injection Campaigns},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {847--852},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998398},
doi = {10.1109/DATE.2002.998398},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/BerrojoGCRSEL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/BerrojoGELCRS02,
author = {Luis Berrojo and
Isabel Gonz{\'{a}}lez and
Luis Entrena and
Celia L{\'{o}}pez and
Fulvio Corno and
Matteo Sonza Reorda and
Giovanni Squillero},
title = {Analysis of the Equivalences and Dominances of Transient Faults at
the {RT} Level},
booktitle = {8th {IEEE} International On-Line Testing Workshop {(IOLTW} 2002),
8-10 July 2002, Isle of Bendor, France},
pages = {193},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/OLT.2002.1030216},
doi = {10.1109/OLT.2002.1030216},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/BerrojoGELCRS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BerrojoGCSSEL02,
author = {Luis Berrojo and
Isabel Gonz{\'{a}}lez and
Fulvio Corno and
Matteo Sonza Reorda and
Giovanni Squillero and
Luis Entrena and
Celia L{\'{o}}pez},
title = {An Industrial Environment for High-Level Fault-Tolerant Structures
Insertion and Validation},
booktitle = {20th {IEEE} {VLSI} Test Symposium {(VTS} 2002), Without Testing It's
a Gamble, 28 April - 2 May 2002, Monterey, CA, {USA}},
pages = {229--236},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/VTS.2002.1011143},
doi = {10.1109/VTS.2002.1011143},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BerrojoGCSSEL02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/EspejoEMO01,
author = {Jos{\'{e}} Alberto Espejo and
Luis Entrena and
Enrique San Mill{\'{a}}n and
Emilio Ol{\'{\i}}as},
editor = {Satoshi Goto},
title = {Functional extension of structural logic optimization techniques},
booktitle = {Proceedings of {ASP-DAC} 2001, Asia and South Pacific Design Automation
Conference 2001, January 30-February 2, 2001, Yokohama, Japan},
pages = {467--472},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/370155.370514},
doi = {10.1145/370155.370514},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/EspejoEMO01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/EspejoEMO01,
author = {Jos{\'{e}} Alberto Espejo and
Luis Entrena and
Enrique San Mill{\'{a}}n and
Emilio Ol{\'{\i}}as},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {Generalized reasoning scheme for redundancy addition and removal logic
optimization},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {391--397},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915054},
doi = {10.1109/DATE.2001.915054},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/EspejoEMO01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/MillanEE01,
author = {Enrique San Mill{\'{a}}n and
Luis Entrena and
Jos{\'{e}} Alberto Espejo},
title = {On the Optimization Power of Redundancy Addition and Removal for Sequential
Logic Optimization},
booktitle = {Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001),
4-6 September 2001, Warsaw, Poland},
pages = {292--299},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DSD.2001.952305},
doi = {10.1109/DSD.2001.952305},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dsd/MillanEE01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/MillanEE01,
author = {Enrique San Mill{\'{a}}n and
Luis Entrena and
Jos{\'{e}} Alberto Espejo},
editor = {Rolf Ernst},
title = {On the Optimization Power of Redundancy Addition and Removal Techniques
for Sequential Circuits},
booktitle = {Proceedings of the 2001 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2001, San Jose, CA, USA, November 4-8, 2001},
pages = {91--94},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/ICCAD.2001.968603},
doi = {10.1109/ICCAD.2001.968603},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/MillanEE01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/EntrenaLOME01,
author = {Luis Entrena and
Celia L{\'{o}}pez and
Emilio Ol{\'{\i}}as and
Enrique San Mill{\'{a}}n and
Jos{\'{e}} Alberto Espejo},
title = {Logic Optimization of Unidirectional Circuits with Structural Methods},
booktitle = {7th {IEEE} International On-Line Testing Workshop {(IOLTW} 2001),
9-11 July 2001, Taormina, Italy},
pages = {43--47},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/OLT.2001.937816},
doi = {10.1109/OLT.2001.937816},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/EntrenaLOME01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/EntrenaLO01,
author = {Luis Entrena and
Celia L{\'{o}}pez and
Emilio Ol{\'{\i}}as},
title = {Automatic Insertion of Fault-Tolerant Structures at the {RT} Level},
booktitle = {7th {IEEE} International On-Line Testing Workshop {(IOLTW} 2001),
9-11 July 2001, Taormina, Italy},
pages = {48--50},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/OLT.2001.937817},
doi = {10.1109/OLT.2001.937817},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iolts/EntrenaLO01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MillanEECC99,
author = {Enrique San Mill{\'{a}}n and
Luis Entrena and
Jos{\'{e}} Alberto Espejo and
Silvia Chiusano and
Fulvio Corno},
title = {Integrating Symbolic Techniques in ATPG-Based Sequential Logic Optimization},
booktitle = {1999 Design, Automation and Test in Europe {(DATE} '99), 9-12 March
1999, Munich, Germany},
pages = {516--520},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1999},
url = {https://doi.org/10.1109/DATE.1999.761175},
doi = {10.1109/DATE.1999.761175},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MillanEECC99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/euromicro/EspejoEMO99,
author = {Jos{\'{e}} Alberto Espejo and
Luis Entrena and
Enrique San Mill{\'{a}}n and
Emilio Ol{\'{\i}}as},
title = {Logic Restructuring for MUX-Based FPGAs},
booktitle = {25th {EUROMICRO} '99 Conference, Informatics: Theory and Practice
for the New Millenium, 8-10 September 1999, Milan, Italy},
pages = {1161},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/EURMIC.1999.794462},
doi = {10.1109/EURMIC.1999.794462},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/euromicro/EspejoEMO99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/EntrenaOUE96,
author = {Luis Entrena and
Emilio Ol{\'{\i}}as and
Javier Uceda and
Jos{\'{e}} Alberto Espejo},
editor = {Graham Symonds and
Wolfgang Nebel},
title = {Timing optimization by an improved redundancy addition and removal
technique},
booktitle = {Proceedings of the conference on European design automation, {EURO-DAC}
'96/EURO-VHDL '96, Geneva, Switzerland, September 16-20, 1996},
pages = {342--347},
publisher = {{IEEE} Computer Society Press},
year = {1996},
url = {https://doi.org/10.1109/EURDAC.1996.558227},
doi = {10.1109/EURDAC.1996.558227},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/eurodac/EntrenaOUE96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Entrena-ArrontesC95,
author = {Luis Entrena{-}Arrontes and
Kwang{-}Ting Cheng},
title = {Combinational and sequential logic optimization by redundancy addition
and removal},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {14},
number = {7},
pages = {909--916},
year = {1995},
url = {https://doi.org/10.1109/43.391740},
doi = {10.1109/43.391740},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Entrena-ArrontesC95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/OlcozEB95,
author = {Seraf{\'{\i}}n Olcoz and
Luis Entrena and
Luis Berrojo},
editor = {Gerald Musgrave},
title = {An effective system development environment based on {VHDL} prototyping},
booktitle = {Proceedings EURO-DAC'95, European Design Automation Conference with
EURO-VHDL, Brighton, England, UK, September 18-22, 1995},
pages = {502--507},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/EURDAC.1995.527451},
doi = {10.1109/EURDAC.1995.527451},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/eurodac/OlcozEB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/OlcozEB95,
author = {Seraf{\'{\i}}n Olcoz and
Luis Entrena and
Luis Berrojo},
title = {{VHDL} virtual prototyping},
booktitle = {Sixth {IEEE} International Workshop on Rapid System Prototyping {(RSP}
'95), Chapel Hill, North Carolina, USA, June 7-9, 1995},
pages = {161--167},
publisher = {{IEEE} Computer Society},
year = {1995},
url = {https://doi.org/10.1109/IWRSP.1995.518586},
doi = {10.1109/IWRSP.1995.518586},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/OlcozEB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/EntrenaC93,
author = {Luis Entrena and
Kwang{-}Ting Cheng},
editor = {Michael R. Lightner and
Jochen A. G. Jess},
title = {Sequential logic optimization by redundancy addition and removal},
booktitle = {Proceedings of the 1993 {IEEE/ACM} International Conference on Computer-Aided
Design, 1993, Santa Clara, California, USA, November 7-11, 1993},
pages = {310--315},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1993},
url = {https://doi.org/10.1109/ICCAD.1993.580074},
doi = {10.1109/ICCAD.1993.580074},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/EntrenaC93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-05-06 22:58 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
