BibTeX records: A. Ege Engin

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@inproceedings{DBLP:conf/aspdac/Engin13,
  author       = {A. Ege Engin},
  title        = {Equivalent circuit model extraction for interconnects in 3D ICs},
  booktitle    = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2013, Yokohama, Japan, January 22-25, 2013},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ASPDAC.2013.6509549},
  doi          = {10.1109/ASPDAC.2013.6509549},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/Engin13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tvlsi/ZhangHDEBC11,
  author       = {Yulei Zhang and
                  Xiang Hu and
                  Alina Deutsch and
                  A. Ege Engin and
                  James F. Buckwalter and
                  Chung{-}Kuan Cheng},
  title        = {Prediction and Comparison of High-Performance On-Chip Global Interconnection},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {19},
  number       = {7},
  pages        = {1154--1166},
  year         = {2011},
  url          = {https://doi.org/10.1109/TVLSI.2010.2047415},
  doi          = {10.1109/TVLSI.2010.2047415},
  timestamp    = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/ZhangHDEBC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/3dic/EnginR11,
  author       = {A. Ege Engin and
                  N. Srinidhi Raghavan},
  editor       = {Mitsumasa Koyanagi and
                  Morihiro Kada},
  title        = {Metal semiconductor {(MES)} TSVs in 3D ICs: Electrical modeling and
                  design},
  booktitle    = {2011 {IEEE} International 3D Systems Integration Conference (3DIC),
                  Osaka, Japan, January 31 - February 2, 2012},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/3DIC.2012.6263049},
  doi          = {10.1109/3DIC.2012.6263049},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/3dic/EnginR11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/ZhangZAYHZEC10,
  author       = {Wanping Zhang and
                  Ling Zhang and
                  Amirali Shayan Arani and
                  Wenjian Yu and
                  Xiang Hu and
                  Zhi Zhu and
                  A. Ege Engin and
                  Chung{-}Kuan Cheng},
  title        = {On-chip power network optimization with decoupling capacitors and
                  controlled-ESRs},
  booktitle    = {Proceedings of the 15th Asia South Pacific Design Automation Conference,
                  {ASP-DAC} 2010, Taipei, Taiwan, January 18-21, 2010},
  pages        = {119--124},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ASPDAC.2010.5419910},
  doi          = {10.1109/ASPDAC.2010.5419910},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/ZhangZAYHZEC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/DuHWACEC10,
  author       = {Peng Du and
                  Xiang Hu and
                  Shih{-}Hung Weng and
                  Amirali Shayan Arani and
                  Xiaoming Chen and
                  A. Ege Engin and
                  Chung{-}Kuan Cheng},
  title        = {Worst-case noise prediction with non-zero current transition times
                  for early power distribution system verification},
  booktitle    = {11th International Symposium on Quality of Electronic Design {(ISQED}
                  2010), 22-24 March 2010, San Jose, CA, {USA}},
  pages        = {624--631},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISQED.2010.5450511},
  doi          = {10.1109/ISQED.2010.5450511},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/DuHWACEC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/AraniHZCECP09,
  author       = {Amirali Shayan Arani and
                  Xiang Hu and
                  Wanping Zhang and
                  Chung{-}Kuan Cheng and
                  A. Ege Engin and
                  Xiaoming Chen and
                  Mikhail Popovich},
  title        = {3D stacked power distribution considering substrate coupling},
  booktitle    = {27th International Conference on Computer Design, {ICCD} 2009, Lake
                  Tahoe, CA, USA, October 4-7, 2009},
  pages        = {225--230},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/ICCD.2009.5413151},
  doi          = {10.1109/ICCD.2009.5413151},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/AraniHZCECP09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/slip/ZhangHDEBC09,
  author       = {Yulei Zhang and
                  Xiang Hu and
                  Alina Deutsch and
                  A. Ege Engin and
                  James F. Buckwalter and
                  Chung{-}Kuan Cheng},
  editor       = {Chung{-}Kuan Cheng and
                  Sherief Reda},
  title        = {Prediction of high-performance on-chip global interconnection},
  booktitle    = {The 11th International Workshop on System-Level Interconnect Prediction
                  {(SLIP} 2009), San Francisco, CA, USA, July 26-27, 2009, Proceedings},
  pages        = {61--68},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1572471.1572482},
  doi          = {10.1145/1572471.1572482},
  timestamp    = {Thu, 10 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/slip/ZhangHDEBC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/slip/HuZDZAPEC09,
  author       = {Xiang Hu and
                  Wenbo Zhao and
                  Peng Du and
                  Yulei Zhang and
                  Amirali Shayan Arani and
                  Christopher Pan and
                  A. Ege Engin and
                  Chung{-}Kuan Cheng},
  editor       = {Chung{-}Kuan Cheng and
                  Sherief Reda},
  title        = {On the bound of time-domain power supply noise based on frequency-domain
                  target impedance},
  booktitle    = {The 11th International Workshop on System-Level Interconnect Prediction
                  {(SLIP} 2009), San Francisco, CA, USA, July 26-27, 2009, Proceedings},
  pages        = {69--76},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1572471.1572483},
  doi          = {10.1145/1572471.1572483},
  timestamp    = {Thu, 07 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/slip/HuZDZAPEC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/slip/ZhangYHAEC09,
  author       = {Wanping Zhang and
                  Wenjian Yu and
                  Xiang Hu and
                  Amirali Shayan Arani and
                  A. Ege Engin and
                  Chung{-}Kuan Cheng},
  editor       = {Chung{-}Kuan Cheng and
                  Sherief Reda},
  title        = {Predicting the worst-case voltage violation in a 3D power network},
  booktitle    = {The 11th International Workshop on System-Level Interconnect Prediction
                  {(SLIP} 2009), San Francisco, CA, USA, July 26-27, 2009, Proceedings},
  pages        = {93--98},
  publisher    = {{ACM}},
  year         = {2009},
  url          = {https://doi.org/10.1145/1572471.1572487},
  doi          = {10.1145/1572471.1572487},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/slip/ZhangYHAEC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijcta/EnginMJSR05,
  author       = {A. Ege Engin and
                  Wolfgang Mathis and
                  Werner John and
                  Grit Sommer and
                  Herbert Reichl},
  title        = {Closed-form network representations of frequency-dependent \emph{RLGC}
                  parameters},
  journal      = {Int. J. Circuit Theory Appl.},
  volume       = {33},
  number       = {6},
  pages        = {463--485},
  year         = {2005},
  url          = {https://doi.org/10.1002/cta.330},
  doi          = {10.1002/CTA.330},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijcta/EnginMJSR05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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