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BibTeX records: Denis Dutoit
@article{DBLP:journals/jssc/VivetGTPTMMDBVP21, author = {Pascal Vivet and Eric Guthmuller and Yvain Thonnart and Ga{\"{e}}l Pillonnet and C{\'{e}}sar Fuguet Tortolero and Ivan Miro{-}Panades and Guillaume Moritz and Jean Durupt and Christian Bernard and Didier Varreau and Julian J. H. Pontes and S{\'{e}}bastien Thuries and David Coriat and Michel Harrand and Denis Dutoit and Didier Lattard and Lucile Arnaud and Jean Charbonnier and Perceval Coudrain and Arnaud Garnier and Fr{\'{e}}d{\'{e}}ric Berger and Alain Gueugnot and Alain Greiner and Quentin L. Meunier and Alexis Farcy and Alexandre Arriordaz and S{\'{e}}verine Cheramy and Fabien Clermidy}, title = {IntAct: {A} 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management}, journal = {{IEEE} J. Solid State Circuits}, volume = {56}, number = {1}, pages = {79--97}, year = {2021}, url = {https://doi.org/10.1109/JSSC.2020.3036341}, doi = {10.1109/JSSC.2020.3036341}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jssc/VivetGTPTMMDBVP21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/ThonnartBCBCTTC20, author = {Yvain Thonnart and St{\'{e}}phane Bernab{\'{e}} and Jean Charbonnier and Christian Bernard and David Coriat and C{\'{e}}sar Fuguet Tortolero and Pierre Tissier and Beno{\^{\i}}t Charbonnier and St{\'{e}}phane Malhouitre and Damien Saint{-}Patrice and Myriam Assous and Aditya Narayan and Ayse K. Coskun and Denis Dutoit and Pascal Vivet}, title = {{POPSTAR:} a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems}, booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020}, pages = {1456--1461}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.23919/DATE48585.2020.9116214}, doi = {10.23919/DATE48585.2020.9116214}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/ThonnartBCBCTTC20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/VivetGTPMMTDBVP20, author = {Pascal Vivet and Eric Guthmuller and Yvain Thonnart and Ga{\"{e}}l Pillonnet and Guillaume Moritz and Ivan Miro{-}Panades and C{\'{e}}sar Fuguet Tortolero and Jean Durupt and Christian Bernard and Didier Varreau and Julian J. H. Pontes and S{\'{e}}bastien Thuries and David Coriat and Michel Harrand and Denis Dutoit and Didier Lattard and Lucile Arnaud and Jean Charbonnier and Perceval Coudrain and Arnaud Garnier and Fr{\'{e}}d{\'{e}}ric Berger and Alain Gueugnot and Alain Greiner and Quentin L. Meunier and Alexis Farcy and Alexandre Arriordaz and S{\'{e}}verine Cheramy and Fabien Clermidy}, title = {2.3 {A} 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm\({}^{\mbox{2}}\) Inter-Chiplet Interconnects and 156mW/mm\({}^{\mbox{2}}\)@ 82{\%}-Peak-Efficiency {DC-DC} Converters}, booktitle = {2020 {IEEE} International Solid- State Circuits Conference, {ISSCC} 2020, San Francisco, CA, USA, February 16-20, 2020}, pages = {46--48}, publisher = {{IEEE}}, year = {2020}, url = {https://doi.org/10.1109/ISSCC19947.2020.9062927}, doi = {10.1109/ISSCC19947.2020.9062927}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/isscc/VivetGTPMMTDBVP20.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/VivetTLSBBDLPDC17, author = {Pascal Vivet and Yvain Thonnart and Romain Lemaire and Cristiano Santos and Edith Beign{\'{e}} and Christian Bernard and Florian Darve and Didier Lattard and Ivan Miro Panades and Denis Dutoit and Fabien Clermidy and S{\'{e}}verine Cheramy and Abbas Sheibanyrad and Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot and Eric Flamand and Jean Michailos and Alexandre Arriordaz and Lee Wang and Juergen Schloeffel}, title = {A 4 {\texttimes} 4 {\texttimes} 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links}, journal = {{IEEE} J. Solid State Circuits}, volume = {52}, number = {1}, pages = {33--49}, year = {2017}, url = {https://doi.org/10.1109/JSSC.2016.2611497}, doi = {10.1109/JSSC.2016.2611497}, timestamp = {Sun, 30 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/VivetTLSBBDLPDC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/RigoPPRDMDBMMBL17, author = {Alvise Rigo and Christian Pinto and Kevin Pouget and Daniel Raho and Denis Dutoit and Pierre{-}Yves Martinez and Chris Doran and Luca Benini and Iakovos Mavroidis and Manolis Marazakis and Valeria Bartsch and Guy Lonsdale and Antoniu Pop and John Goodacre and Annaik Colliot and Paul M. Carpenter and Petar Radojkovic and Dirk Pleiter and Dominique Drouin and Beno{\^{\i}}t Dupont de Dinechin}, editor = {Hana Kub{\'{a}}tov{\'{a}} and Martin Novotn{\'{y}} and Amund Skavhaug}, title = {Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach}, booktitle = {Euromicro Conference on Digital System Design, {DSD} 2017, Vienna, Austria, August 30 - Sept. 1, 2017}, pages = {486--493}, publisher = {{IEEE} Computer Society}, year = {2017}, url = {https://doi.org/10.1109/DSD.2017.37}, doi = {10.1109/DSD.2017.37}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/RigoPPRDMDBMMBL17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/CoudrainSPFFLCS16, author = {Perceval Coudrain and Papa Momar Souare and Rafael Prieto and Vincent Fiori and Alexis Farcy and Laurent Le Pailleur and Jean{-}Philippe Colonna and Cristiano Santos and Pascal Vivet and M. Haykel Ben Jamaa and Denis Dutoit and Fran{\c{c}}ois de Crecy and Sylvain Dumas and Christian Chancel and Didier Lattard and S{\'{e}}verine Cheramy}, title = {Experimental Insights Into Thermal Dissipation in TSV-Based 3-D Integrated Circuits}, journal = {{IEEE} Des. Test}, volume = {33}, number = {3}, pages = {21--36}, year = {2016}, url = {https://doi.org/10.1109/MDAT.2015.2506678}, doi = {10.1109/MDAT.2015.2506678}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/dt/CoudrainSPFFLCS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/3dic/VivetBCDGPPTGLJ15, author = {Pascal Vivet and Christian Bernard and Fabien Clermidy and Denis Dutoit and Eric Guthmuller and Ivan Miro Panades and Ga{\"{e}}l Pillonnet and Yvain Thonnart and Arnaud Garnier and Didier Lattard and Amandine Jouve and Franck Bana and Thierry Mourier and S{\'{e}}verine Cheramy}, title = {3D advanced integration technology for heterogeneous systems}, booktitle = {2015 International 3D Systems Integration Conference, 3DIC 2015, Sendai, Japan, August 31 - September 2, 2015}, pages = {FS6.1--FS6.3}, publisher = {{IEEE}}, year = {2015}, url = {https://doi.org/10.1109/3DIC.2015.7334468}, doi = {10.1109/3DIC.2015.7334468}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/3dic/VivetBCDGPPTGLJ15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/BeneventiBVDB14, author = {Francesco Beneventi and Andrea Bartolini and Pascal Vivet and Denis Dutoit and Luca Benini}, editor = {Gerhard P. Fettweis and Wolfgang Nebel}, title = {Thermal analysis and model identification techniques for a logic + {WIDEIO} stacked {DRAM} test chip}, booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition, {DATE} 2014, Dresden, Germany, March 24-28, 2014}, pages = {1--4}, publisher = {European Design and Automation Association}, year = {2014}, url = {https://doi.org/10.7873/DATE.2014.345}, doi = {10.7873/DATE.2014.345}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/date/BeneventiBVDB14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dsd/DurandCABDFGGKMMMT14, author = {Yves Durand and Paul M. Carpenter and Stefano Adami and Angelos Bilas and Denis Dutoit and Alexis Farcy and Georgi Gaydadjiev and John Goodacre and Manolis Katevenis and Manolis Marazakis and Emil Mat{\'{u}}s and Iakovos Mavroidis and John Thomson}, title = {{EUROSERVER:} Energy Efficient Node for European Micro-Servers}, booktitle = {17th Euromicro Conference on Digital System Design, {DSD} 2014, Verona, Italy, August 27-29, 2014}, pages = {206--213}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/DSD.2014.15}, doi = {10.1109/DSD.2014.15}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dsd/DurandCABDFGGKMMMT14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/3dic/SantosVDGPR13, author = {Cristiano Santos and Pascal Vivet and Denis Dutoit and Philippe Garrault and Nicolas Peltier and Ricardo Reis}, title = {System-level thermal modeling for 3D circuits: Characterization with a 65nm memory-on-logic circuit}, booktitle = {2013 {IEEE} International 3D Systems Integration Conference (3DIC), San Francisco, CA, USA, October 2-4, 2013}, pages = {1--6}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/3DIC.2013.6702379}, doi = {10.1109/3DIC.2013.6702379}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/3dic/SantosVDGPR13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/DutoitGP13, author = {Denis Dutoit and Eric Guthmuller and Ivan Miro Panades}, editor = {Enrico Macii}, title = {3D integration for power-efficient computing}, booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France, March 18-22, 2013}, pages = {779--784}, publisher = {{EDA} Consortium San Jose, CA, {USA} / {ACM} {DL}}, year = {2013}, url = {https://doi.org/10.7873/DATE.2013.166}, doi = {10.7873/DATE.2013.166}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/date/DutoitGP13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/iscas/ClermidyDGMV13, author = {Fabien Clermidy and Denis Dutoit and Eric Guthmuller and Ivan Miro Panades and Pascal Vivet}, title = {3D stacking for multi-core architectures: From {WIDEIO} to distributed caches}, booktitle = {2013 {IEEE} International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013}, pages = {537--540}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/ISCAS.2013.6571899}, doi = {10.1109/ISCAS.2013.6571899}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/iscas/ClermidyDGMV13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dac/MelpignanoBFJLHCD12, author = {Diego Melpignano and Luca Benini and Eric Flamand and Bruno Jego and Thierry Lepley and Germain Haugou and Fabien Clermidy and Denis Dutoit}, editor = {Patrick Groeneveld and Donatella Sciuto and Soha Hassoun}, title = {Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications}, booktitle = {The 49th Annual Design Automation Conference 2012, {DAC} '12, San Francisco, CA, USA, June 3-7, 2012}, pages = {1137--1142}, publisher = {{ACM}}, year = {2012}, url = {https://doi.org/10.1145/2228360.2228568}, doi = {10.1145/2228360.2228568}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dac/MelpignanoBFJLHCD12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/codes/AkessonHCDGCKVW11, author = {Benny Akesson and Po{-}Chun Huang and Fabien Clermidy and Denis Dutoit and Kees Goossens and Yuan{-}Hao Chang and Tei{-}Wei Kuo and Pascal Vivet and Drew Wingard}, editor = {Robert P. Dick and Jan Madsen}, title = {Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends}, booktitle = {Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, {CODES+ISSS} 2011, part of ESWeek '11 Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011}, pages = {3--12}, publisher = {{ACM}}, year = {2011}, url = {https://doi.org/10.1145/2039370.2039374}, doi = {10.1145/2039370.2039374}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/codes/AkessonHCDGCKVW11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/date/ClermidyDDLV11, author = {Fabien Clermidy and Florian Darve and Denis Dutoit and Walid Lafi and Pascal Vivet}, title = {3D Embedded multi-core: Some perspectives}, booktitle = {Design, Automation and Test in Europe, {DATE} 2011, Grenoble, France, March 14-18, 2011}, pages = {1327--1332}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/DATE.2011.5763213}, doi = {10.1109/DATE.2011.5763213}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/date/ClermidyDDLV11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/nocs/ClermidyCCDFKLS11, author = {Fabien Clermidy and Nicolas Cassiau and N. Coste and Denis Dutoit and M. Fantini and Dimitri Ktenas and Romain Lemaire and L. Stefanizzi}, editor = {Radu Marculescu and Michael Kishinevsky and Ran Ginosar and Karam S. Chatha}, title = {Reconfiguration of a 3GPP-LTE telecommunication application on a 22-core NoC-based system-on-chip}, booktitle = {{NOCS} 2011, Fifth {ACM/IEEE} International Symposium on Networks-on-Chip, Pittsburgh, Pennsylvania, USA, May 1-4, 2011}, pages = {261--262}, publisher = {{ACM/IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1145/1999946.1999991}, doi = {10.1145/1999946.1999991}, timestamp = {Wed, 11 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/nocs/ClermidyCCDFKLS11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/VivetDTC11, author = {Pascal Vivet and Denis Dutoit and Yvain Thonnart and Fabien Clermidy}, title = {3D NoC using through silicon Via: An asynchronous implementation}, booktitle = {{IEEE/IFIP} 19th International Conference on {VLSI} and System-on-Chip, VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011}, pages = {232--237}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/VLSISoC.2011.6081643}, doi = {10.1109/VLSISOC.2011.6081643}, timestamp = {Tue, 07 May 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/VivetDTC11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/CoflerDDH06, author = {Andrew Cofler and Francois Druilhe and Denis Dutoit and Michel Harrand}, title = {A reprogrammable {EDGE} baseband and multimedia handset SoC with 6-mbit embedded {DRAM}}, journal = {{IEEE} J. Solid State Circuits}, volume = {41}, number = {1}, pages = {97--106}, year = {2006}, url = {https://doi.org/10.1109/JSSC.2005.859317}, doi = {10.1109/JSSC.2005.859317}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/CoflerDDH06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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