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BibTeX records: Neal Clayton Crago
@inproceedings{DBLP:conf/hpca/CragoDSK24, author = {Neal Clayton Crago and Sana Damani and Karthikeyan Sankaralingam and Stephen W. Keckler}, title = {{WASP:} Exploiting {GPU} Pipeline Parallelism with Hardware-Accelerated Automatic Warp Specialization}, booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture, {HPCA} 2024, Edinburgh, United Kingdom, March 2-6, 2024}, pages = {1--16}, publisher = {{IEEE}}, year = {2024}, url = {https://doi.org/10.1109/HPCA57654.2024.00086}, doi = {10.1109/HPCA57654.2024.00086}, timestamp = {Wed, 17 Apr 2024 17:17:11 +0200}, biburl = {https://dblp.org/rec/conf/hpca/CragoDSK24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tocs/PellauerCBCJLOPTTKE23, author = {Michael Pellauer and Jason Clemons and Vignesh Balaji and Neal Clayton Crago and Aamer Jaleel and Donghyuk Lee and Mike O'Connor and Anghsuman Parashar and Sean Treichler and Po{-}An Tsai and Stephen W. Keckler and Joel S. Emer}, title = {Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing}, journal = {{ACM} Trans. Comput. Syst.}, volume = {41}, pages = {4:1--4:30}, year = {2023}, url = {https://doi.org/10.1145/3630007}, doi = {10.1145/3630007}, timestamp = {Thu, 29 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tocs/PellauerCBCJLOPTTKE23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asplos/OdemuyiwaMPHTCJ23, author = {Toluwanimi O. Odemuyiwa and Hadi Asghari Moghaddam and Michael Pellauer and Kartik Hegde and Po{-}An Tsai and Neal Clayton Crago and Aamer Jaleel and John D. Owens and Edgar Solomonik and Joel S. Emer and Christopher W. Fletcher}, editor = {Tor M. Aamodt and Natalie D. Enright Jerger and Michael M. Swift}, title = {Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling}, booktitle = {Proceedings of the 28th {ACM} International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, {ASPLOS} 2023, Vancouver, BC, Canada, March 25-29, 2023}, pages = {18--32}, publisher = {{ACM}}, year = {2023}, url = {https://doi.org/10.1145/3582016.3582064}, doi = {10.1145/3582016.3582064}, timestamp = {Tue, 21 Mar 2023 11:08:23 +0100}, biburl = {https://dblp.org/rec/conf/asplos/OdemuyiwaMPHTCJ23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hopc/OdemuyiwaMPHTCJ23, author = {Toluwanimi O. Odemuyiwa and Hadi Asghari Moghaddam and Michael Pellauer and Kartik Hegde and Po{-}An Tsai and Neal Clayton Crago and Aamer Jaleel and John D. Owens and Edgar Solomonik and Joel S. Emer and Christopher W. Fletcher}, editor = {Laxman Dhulipala and Yihan Sun}, title = {Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling (Extended Abstract)}, booktitle = {Proceedings of the 2023 {ACM} Workshop on Highlights of Parallel Computing, {HOPC} 2023, Orlando, FL, USA, 16 June 2023}, pages = {15--16}, publisher = {{ACM}}, year = {2023}, url = {https://doi.org/10.1145/3597635.3598031}, doi = {10.1145/3597635.3598031}, timestamp = {Fri, 21 Jul 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/hopc/OdemuyiwaMPHTCJ23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ispass/BalajiCJK23, author = {Vignesh Balaji and Neal Clayton Crago and Aamer Jaleel and Stephen W. Keckler}, title = {Community-based Matrix Reordering for Sparse Linear Algebra Optimization}, booktitle = {{IEEE} International Symposium on Performance Analysis of Systems and Software, {ISPASS} 2023, Raleigh, NC, USA, April 23-25, 2023}, pages = {214--223}, publisher = {{IEEE}}, year = {2023}, url = {https://doi.org/10.1109/ISPASS57527.2023.00029}, doi = {10.1109/ISPASS57527.2023.00029}, timestamp = {Fri, 22 Mar 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ispass/BalajiCJK23.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpca/BalajiCJL21, author = {Vignesh Balaji and Neal Clayton Crago and Aamer Jaleel and Brandon Lucia}, title = {{P-OPT:} Practical Optimal Cache Replacement for Graph Analytics}, booktitle = {{IEEE} International Symposium on High-Performance Computer Architecture, {HPCA} 2021, Seoul, South Korea, February 27 - March 3, 2021}, pages = {668--681}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/HPCA51647.2021.00062}, doi = {10.1109/HPCA51647.2021.00062}, timestamp = {Fri, 22 Mar 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hpca/BalajiCJL21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/taco/CragoSK19, author = {Neal Clayton Crago and Mark Stephenson and Stephen W. Keckler}, title = {Exposing Memory Access Patterns to Improve Instruction and Memory Efficiency in GPUs}, journal = {{ACM} Trans. Archit. Code Optim.}, volume = {15}, number = {4}, pages = {45:1--45:23}, year = {2019}, url = {https://doi.org/10.1145/3280851}, doi = {10.1145/3280851}, timestamp = {Sat, 11 Sep 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/taco/CragoSK19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/asplos/PellauerSCCHVKF19, author = {Michael Pellauer and Yakun Sophia Shao and Jason Clemons and Neal Clayton Crago and Kartik Hegde and Rangharajan Venkatesan and Stephen W. Keckler and Christopher W. Fletcher and Joel S. Emer}, editor = {Iris Bahar and Maurice Herlihy and Emmett Witchel and Alvin R. Lebeck}, title = {Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration}, booktitle = {Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, {ASPLOS} 2019, Providence, RI, USA, April 13-17, 2019}, pages = {137--151}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3297858.3304025}, doi = {10.1145/3297858.3304025}, timestamp = {Sun, 07 Apr 2019 16:01:58 +0200}, biburl = {https://dblp.org/rec/conf/asplos/PellauerSCCHVKF19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/HegdeMPCJSEF19, author = {Kartik Hegde and Hadi Asghari Moghaddam and Michael Pellauer and Neal Clayton Crago and Aamer Jaleel and Edgar Solomonik and Joel S. Emer and Christopher W. Fletcher}, title = {ExTensor: An Accelerator for Sparse Tensor Algebra}, booktitle = {Proceedings of the 52nd Annual {IEEE/ACM} International Symposium on Microarchitecture, {MICRO} 2019, Columbus, OH, USA, October 12-16, 2019}, pages = {319--333}, publisher = {{ACM}}, year = {2019}, url = {https://doi.org/10.1145/3352460.3358275}, doi = {10.1145/3352460.3358275}, timestamp = {Wed, 16 Oct 2019 09:55:30 +0200}, biburl = {https://dblp.org/rec/conf/micro/HegdeMPCJSEF19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/tocs/PellauerPAAACFG15, author = {Michael Pellauer and Angshuman Parashar and Michael Adler and Bushra Ahsan and Randy L. Allmon and Neal Clayton Crago and Kermin Fleming and Mohit Gambhir and Aamer Jaleel and Tushar Krishna and Daniel Lustig and Stephen Maresh and Vladimir Pavlov and Rachid Rayess and Antonia Zhai and Joel S. Emer}, title = {Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures}, journal = {{ACM} Trans. Comput. Syst.}, volume = {33}, number = {3}, pages = {10:1--10:32}, year = {2015}, url = {https://doi.org/10.1145/2754930}, doi = {10.1145/2754930}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/tocs/PellauerPAAACFG15.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/micro/ParasharPAACLPZGJARME14, author = {Angshuman Parashar and Michael Pellauer and Michael Adler and Bushra Ahsan and Neal Clayton Crago and Daniel Lustig and Vladimir Pavlov and Antonia Zhai and Mohit Gambhir and Aamer Jaleel and Randy L. Allmon and Rachid Rayess and Stephen Maresh and Joel S. Emer}, title = {Efficient Spatial Processing Element Control via Triggered Instructions}, journal = {{IEEE} Micro}, volume = {34}, number = {3}, pages = {120--137}, year = {2014}, url = {https://doi.org/10.1109/MM.2014.14}, doi = {10.1109/MM.2014.14}, timestamp = {Sat, 20 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/micro/ParasharPAACLPZGJARME14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/ispass/TithiCE14, author = {Jesmin Jahan Tithi and Neal Clayton Crago and Joel S. Emer}, title = {Exploiting spatial architectures for edit distance algorithms}, booktitle = {2014 {IEEE} International Symposium on Performance Analysis of Systems and Software, {ISPASS} 2014, Monterey, CA, USA, March 23-25, 2014}, pages = {23--34}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ISPASS.2014.6844458}, doi = {10.1109/ISPASS.2014.6844458}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/ispass/TithiCE14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hpca/CragoALP13, author = {Neal Clayton Crago and Omid Azizi and Steven S. Lumetta and Sanjay J. Patel}, title = {Hybrid latency tolerance for robust energy-efficiency on 1000-core data parallel processors}, booktitle = {19th {IEEE} International Symposium on High Performance Computer Architecture, {HPCA} 2013, Shenzhen, China, February 23-27, 2013}, pages = {294--305}, publisher = {{IEEE} Computer Society}, year = {2013}, url = {https://doi.org/10.1109/HPCA.2013.6522327}, doi = {10.1109/HPCA.2013.6522327}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hpca/CragoALP13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/ParasharPAACLPZGJARME13, author = {Angshuman Parashar and Michael Pellauer and Michael Adler and Bushra Ahsan and Neal Clayton Crago and Daniel Lustig and Vladimir Pavlov and Antonia Zhai and Mohit Gambhir and Aamer Jaleel and Randy L. Allmon and Rachid Rayess and Stephen Maresh and Joel S. Emer}, editor = {Avi Mendelson}, title = {Triggered instructions: a control paradigm for spatially-programmed architectures}, booktitle = {The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013}, pages = {142--153}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2485922.2485935}, doi = {10.1145/2485922.2485935}, timestamp = {Fri, 09 Jul 2021 15:51:20 +0200}, biburl = {https://dblp.org/rec/conf/isca/ParasharPAACLPZGJARME13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@phdthesis{DBLP:phd/us/Crago12, author = {Neal Clayton Crago}, title = {Energy-efficient latency tolerance for 1000-core data parallel processors with decoupled strands}, school = {University of Illinois Urbana-Champaign, {USA}}, year = {2012}, url = {https://hdl.handle.net/2142/34589}, timestamp = {Thu, 05 Oct 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/phd/us/Crago12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/gis/WidenerCA12, author = {Michael J. Widener and Neal Clayton Crago and Jared Aldstadt}, title = {Developing a parallel computational implementation of {AMOEBA}}, journal = {Int. J. Geogr. Inf. Sci.}, volume = {26}, number = {9}, pages = {1707--1723}, year = {2012}, url = {https://doi.org/10.1080/13658816.2011.645477}, doi = {10.1080/13658816.2011.645477}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/gis/WidenerCA12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/IEEEpact/CragoP11, author = {Neal Clayton Crago and Sanjay J. Patel}, editor = {Lawrence Rauchwerger and Vivek Sarkar}, title = {Decoupled Architectures as a Low-Complexity Alternative to Out-of-order Execution}, booktitle = {2011 International Conference on Parallel Architectures and Compilation Techniques, {PACT} 2011, Galveston, TX, USA, October 10-14, 2011}, pages = {179--180}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/PACT.2011.28}, doi = {10.1109/PACT.2011.28}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/IEEEpact/CragoP11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/CragoP11, author = {Neal Clayton Crago and Sanjay J. Patel}, editor = {Ravi R. Iyer and Qing Yang and Antonio Gonz{\'{a}}lez}, title = {{OUTRIDER:} efficient memory latency tolerance with decoupled strands}, booktitle = {38th International Symposium on Computer Architecture {(ISCA} 2011), June 4-8, 2011, San Jose, CA, {USA}}, pages = {117--128}, publisher = {{ACM}}, year = {2011}, url = {https://doi.org/10.1145/2000064.2000079}, doi = {10.1145/2000064.2000079}, timestamp = {Mon, 15 May 2023 22:11:15 +0200}, biburl = {https://dblp.org/rec/conf/isca/CragoP11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isca/KelmJJCTMLFP09, author = {John H. Kelm and Daniel R. Johnson and Matthew R. Johnson and Neal Clayton Crago and William Tuohy and Aqeel Mahesri and Steven S. Lumetta and Matthew I. Frank and Sanjay J. Patel}, editor = {Stephen W. Keckler and Luiz Andr{\'{e}} Barroso}, title = {Rigel: an architecture and scalable programming interface for a 1000-core accelerator}, booktitle = {36th International Symposium on Computer Architecture {(ISCA} 2009), June 20-24, 2009, Austin, TX, {USA}}, pages = {140--151}, publisher = {{ACM}}, year = {2009}, url = {https://doi.org/10.1145/1555754.1555774}, doi = {10.1145/1555754.1555774}, timestamp = {Wed, 19 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isca/KelmJJCTMLFP09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/micro/MahesriJCP08, author = {Aqeel Mahesri and Daniel R. Johnson and Neal Clayton Crago and Sanjay J. Patel}, title = {Tradeoffs in designing accelerator architectures for visual computing}, booktitle = {41st Annual {IEEE/ACM} International Symposium on Microarchitecture {(MICRO-41} 2008), November 8-12, 2008, Lake Como, Italy}, pages = {164--175}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/MICRO.2008.4771788}, doi = {10.1109/MICRO.2008.4771788}, timestamp = {Tue, 31 May 2022 14:39:58 +0200}, biburl = {https://dblp.org/rec/conf/micro/MahesriJCP08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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