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ORCIDBibTeX records: Jamison D. Collins
@article{DBLP:journals/sigops/ChinyaCWJLPW11,
author = {Gautham N. Chinya and
Jamison D. Collins and
Perry H. Wang and
Hong Jiang and
Guei{-}Yuan Lueh and
Thomas Piazza and
Hong Wang},
title = {Bothnia: a dual-personality extension to the Intel integrated graphics
driver},
journal = {{ACM} {SIGOPS} Oper. Syst. Rev.},
volume = {45},
number = {1},
pages = {11--20},
year = {2011},
url = {https://doi.org/10.1145/1945023.1945027},
doi = {10.1145/1945023.1945027},
timestamp = {Tue, 14 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigops/ChinyaCWJLPW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/OttoniCHCKSDSW11,
author = {Guilherme Ottoni and
Gautham N. Chinya and
Gerolf Hoflehner and
Jamison D. Collins and
Amit Kumar and
Ethan Schuchman and
David R. Ditzel and
Ronak Singhal and
Hong Wang},
editor = {Calin Cascaval and
Pedro Trancoso and
Viktor K. Prasanna},
title = {AstroLIT: enabling simulation-based microarchitecture comparison between
Intel{\textregistered} and Transmeta designs},
booktitle = {Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia,
Italy, May 3-5, 2011},
pages = {21},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2016604.2016629},
doi = {10.1145/2016604.2016629},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cf/OttoniCHCKSDSW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SchelleCSWZCPMOHSBSW10,
author = {Graham Schelle and
Jamison D. Collins and
Ethan Schuchman and
Perry H. Wang and
Xiang Zou and
Gautham N. Chinya and
Ralf Plate and
Thorsten Mattner and
Franz Olbrich and
Per Hammarlund and
Ronak Singhal and
Jim Brayton and
Sebastian Steibl and
Hong Wang},
editor = {Peter Y. K. Cheung and
John Wawrzynek},
title = {Intel nehalem processor core made {FPGA} synthesizable},
booktitle = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
February 21-23, 2010},
pages = {3--12},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1723112.1723116},
doi = {10.1145/1723112.1723116},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/SchelleCSWZCPMOHSBSW10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WangCWKSCSSDSW09,
author = {Perry H. Wang and
Jamison D. Collins and
Christopher T. Weaver and
Belliappa Kuttanna and
Shahram Salamian and
Gautham N. Chinya and
Ethan Schuchman and
Oliver Schilling and
Thorsten Doil and
Sebastian Steibl and
Hong Wang},
editor = {Paul Chow and
Peter Y. K. Cheung},
title = {Intel{\textregistered} atom\({}^{\mbox{TM}}\) processor core made
FPGA-synthesizable},
booktitle = {Proceedings of the {ACM/SIGDA} 17th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2009, Monterey, California, USA,
February 22-24, 2009},
pages = {209--218},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1508128.1508160},
doi = {10.1145/1508128.1508160},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/WangCWKSCSSDSW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEpact/WongBSACWCGJW08,
author = {Henry Wong and
Anne Bracy and
Ethan Schuchman and
Tor M. Aamodt and
Jamison D. Collins and
Perry H. Wang and
Gautham N. Chinya and
Ankur Khandelwal Groen and
Hong Jiang and
Hong Wang},
editor = {Andreas Moshovos and
David Tarditi and
Kunle Olukotun},
title = {Pangaea: a tightly-coupled {IA32} heterogeneous chip multiprocessor},
booktitle = {17th International Conference on Parallel Architectures and Compilation
Techniques, {PACT} 2008, Toronto, Ontario, Canada, October 25-29,
2008},
pages = {52--61},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1454115.1454125},
doi = {10.1145/1454115.1454125},
timestamp = {Wed, 11 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/IEEEpact/WongBSACWCGJW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/LindermanCWM08,
author = {Michael D. Linderman and
Jamison D. Collins and
Hong Wang and
Teresa H. Meng},
editor = {Susan J. Eggers and
James R. Larus},
title = {Merge: a programming model for heterogeneous multi-core systems},
booktitle = {Proceedings of the 13th International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2008, Seattle, WA, USA, March 1-5, 2008},
pages = {287--296},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1346281.1346318},
doi = {10.1145/1346281.1346318},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/LindermanCWM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispass/AziziCPWH08,
author = {Omid Azizi and
Jamison D. Collins and
Dinesh Patil and
Hong Wang and
Mark Horowitz},
title = {Processor Performance Modeling using Symbolic Simulation},
booktitle = {{IEEE} International Symposium on Performance Analysis of Systems
and Software, {ISPASS} 2008, April 20-22, 2008, Austin, Texas, USA,
Proceedings},
pages = {127--138},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ISPASS.2008.4510745},
doi = {10.1109/ISPASS.2008.4510745},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ispass/AziziCPWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/LeeCWB08,
author = {Benjamin C. Lee and
Jamison D. Collins and
Hong Wang and
David M. Brooks},
title = {{CPR:} Composable performance regression for scalable multiprocessor
models},
booktitle = {41st Annual {IEEE/ACM} International Symposium on Microarchitecture
{(MICRO-41} 2008), November 8-12, 2008, Lake Como, Italy},
pages = {270--281},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/MICRO.2008.4771797},
doi = {10.1109/MICRO.2008.4771797},
timestamp = {Tue, 31 May 2022 14:39:58 +0200},
biburl = {https://dblp.org/rec/conf/micro/LeeCWB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ics/WangCCLMYW07,
author = {Perry H. Wang and
Jamison D. Collins and
Gautham N. Chinya and
Bernard Lint and
Asit Mallick and
Koichi Yamada and
Hong Wang},
editor = {Burton J. Smith},
title = {Sequencer virtualization},
booktitle = {Proceedings of the 21th Annual International Conference on Supercomputing,
{ICS} 2007, Seattle, Washington, USA, June 17-21, 2007},
pages = {148--157},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1274971.1274993},
doi = {10.1145/1274971.1274993},
timestamp = {Tue, 06 Nov 2018 11:07:02 +0100},
biburl = {https://dblp.org/rec/conf/ics/WangCCLMYW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pldi/WangCCJTGYLW07,
author = {Perry H. Wang and
Jamison D. Collins and
Gautham N. Chinya and
Hong Jiang and
Xinmin Tian and
Milind Girkar and
Nick Y. Yang and
Guei{-}Yuan Lueh and
Hong Wang},
editor = {Jeanne Ferrante and
Kathryn S. McKinley},
title = {{EXOCHI:} architecture and programming environment for a heterogeneous
multi-core multithreaded system},
booktitle = {Proceedings of the {ACM} {SIGPLAN} 2007 Conference on Programming
Language Design and Implementation, San Diego, California, USA, June
10-13, 2007},
pages = {156--166},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1250734.1250753},
doi = {10.1145/1250734.1250753},
timestamp = {Fri, 25 Jun 2021 14:48:54 +0200},
biburl = {https://dblp.org/rec/conf/pldi/WangCCJTGYLW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/HankinsCCWRWS06,
author = {Richard A. Hankins and
Gautham N. Chinya and
Jamison D. Collins and
Perry H. Wang and
Ryan N. Rakvic and
Hong Wang and
John Paul Shen},
title = {Multiple Instruction Stream Processor},
booktitle = {33rd International Symposium on Computer Architecture {(ISCA} 2006),
June 17-21, 2006, Boston, MA, {USA}},
pages = {114--127},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ISCA.2006.29},
doi = {10.1109/ISCA.2006.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/HankinsCCWRWS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/WangCWKGCYSMS04,
author = {Perry H. Wang and
Jamison D. Collins and
Hong Wang and
Dongkeun Kim and
Bill Greene and
Kai{-}Ming Chan and
Aamir B. Yunus and
Terry Sych and
Stephen F. Moore and
John Paul Shen},
title = {Helper Threads via Virtual Multithreading},
journal = {{IEEE} Micro},
volume = {24},
number = {6},
pages = {74--82},
year = {2004},
url = {https://doi.org/10.1109/MM.2004.75},
doi = {10.1109/MM.2004.75},
timestamp = {Sat, 20 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/micro/WangCWKGCYSMS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/WangCWKGCYSMS04,
author = {Perry H. Wang and
Jamison D. Collins and
Hong Wang and
Dongkeun Kim and
Bill Greene and
Kai{-}Ming Chan and
Aamir B. Yunus and
Terry Sych and
Stephen F. Moore and
John Paul Shen},
editor = {Shubu Mukherjee and
Kathryn S. McKinley},
title = {Helper threads via virtual multithreading on an experimental itanium\({}^{\mbox{{\textregistered}}}\)
2 processor-based platform},
booktitle = {Proceedings of the 11th International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2004, Boston, MA, USA, October 7-13, 2004},
pages = {144--155},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/1024393.1024411},
doi = {10.1145/1024393.1024411},
timestamp = {Wed, 07 Jul 2021 13:23:08 +0200},
biburl = {https://dblp.org/rec/conf/asplos/WangCWKGCYSMS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/CollinsT04,
author = {Jamison D. Collins and
Dean M. Tullsen},
title = {Clustered Multithreaded Architectures - Pursuing both {IPC} and Cycle
Time},
booktitle = {18th International Parallel and Distributed Processing Symposium {(IPDPS}
2004), {CD-ROM} / Abstracts Proceedings, 26-30 April 2004, Santa Fe,
New Mexico, {USA}},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/IPDPS.2004.1303010},
doi = {10.1109/IPDPS.2004.1303010},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ipps/CollinsT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/CollinsTW04,
author = {Jamison D. Collins and
Dean M. Tullsen and
Hong Wang},
title = {Control Flow Optimization Via Dynamic Reconvergence Prediction},
booktitle = {37th Annual International Symposium on Microarchitecture {(MICRO-37}
2004), 4-8 December 2004, Portland, OR, {USA}},
pages = {129--140},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/MICRO.2004.13},
doi = {10.1109/MICRO.2004.13},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/CollinsTW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WangWCGKS02,
author = {Perry H. Wang and
Hong Wang and
Jamison D. Collins and
Ed Grochowski and
Ralph{-}Michael Kling and
John Paul Shen},
title = {Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order
Execution vs. Speculative Precomputation},
booktitle = {Proceedings of the Eighth International Symposium on High-Performance
Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February
2-6, 2002},
pages = {187--196},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/HPCA.2002.995709},
doi = {10.1109/HPCA.2002.995709},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/WangWCGKS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/CollinsSCT02,
author = {Jamison D. Collins and
Suleyman Sair and
Brad Calder and
Dean M. Tullsen},
editor = {Erik R. Altman and
Kemal Ebcioglu and
Scott A. Mahlke and
B. Ramakrishna Rau and
Sanjay J. Patel},
title = {Pointer cache assisted prefetching},
booktitle = {Proceedings of the 35th Annual International Symposium on Microarchitecture,
Istanbul, Turkey, November 18-22, 2002},
pages = {62--73},
publisher = {{ACM/IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/MICRO.2002.1176239},
doi = {10.1109/MICRO.2002.1176239},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/CollinsSCT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tocs/CollinsT01,
author = {Jamison D. Collins and
Dean M. Tullsen},
title = {Runtime identification of cache conflict misses: The adaptive miss
buffer},
journal = {{ACM} Trans. Comput. Syst.},
volume = {19},
number = {4},
pages = {413--439},
year = {2001},
url = {https://doi.org/10.1145/502912.502913},
doi = {10.1145/502912.502913},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tocs/CollinsT01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/CollinsWTHLLS01,
author = {Jamison D. Collins and
Hong Wang and
Dean M. Tullsen and
Christopher J. Hughes and
Yong{-}Fong Lee and
Daniel M. Lavery and
John Paul Shen},
editor = {Per Stenstr{\"{o}}m},
title = {Speculative precomputation: long-range prefetching of delinquent loads},
booktitle = {Proceedings of the 28th Annual International Symposium on Computer
Architecture, {ISCA} 2001, G{\"{o}}teborg, Sweden, June 30-July
4, 2001},
pages = {14--25},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/379240.379248},
doi = {10.1145/379240.379248},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/CollinsWTHLLS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/CollinsTWS01,
author = {Jamison D. Collins and
Dean M. Tullsen and
Hong Wang and
John Paul Shen},
editor = {Yale N. Patt and
Josh Fisher and
Paolo Faraboschi and
Kevin Skadron},
title = {Dynamic speculative precomputation},
booktitle = {Proceedings of the 34th Annual International Symposium on Microarchitecture,
Austin, Texas, USA, December 1-5, 2001},
pages = {306--317},
publisher = {{ACM/IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/MICRO.2001.991128},
doi = {10.1109/MICRO.2001.991128},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/CollinsTWS01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/micro/CollinsT99,
author = {Jamison D. Collins and
Dean M. Tullsen},
editor = {Ronny Ronen and
Matthew K. Farrens and
Ilan Y. Spillinger},
title = {Hardware Identification of Cache Conflict Misses},
booktitle = {Proceedings of the 32nd Annual {IEEE/ACM} International Symposium
on Microarchitecture, {MICRO} 32, Haifa, Israel, November 16-18, 1999},
pages = {126--135},
publisher = {{ACM/IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/MICRO.1999.809450},
doi = {10.1109/MICRO.1999.809450},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/micro/CollinsT99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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