BibTeX records: Jonathon E. Colburn

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@inproceedings{DBLP:conf/itc/MozaffariBNAPSC19,
  author       = {Seyed Nima Mozaffari and
                  Bonita Bhaskaran and
                  Kaushik Narayanun and
                  Ayub Abdollahian and
                  Vinod Pagalone and
                  Shantanu Sarangi and
                  Jonathon E. Colburn},
  title        = {An Efficient Supervised Learning Method to Predict Power Supply Noise
                  During At-speed Test},
  booktitle    = {{IEEE} International Test Conference, {ITC} 2019, Washington, DC,
                  USA, November 9-15, 2019},
  pages        = {1--10},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ITC44170.2019.9000171},
  doi          = {10.1109/ITC44170.2019.9000171},
  timestamp    = {Mon, 24 Feb 2020 17:28:46 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/MozaffariBNAPSC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/WohlWMC18,
  author       = {Peter Wohl and
                  John A. Waicukauski and
                  Gregory A. Maston and
                  Jonathon E. Colburn},
  title        = {{XLBIST:} X-Tolerant Logic {BIST}},
  booktitle    = {{IEEE} International Test Conference, {ITC} 2018, Phoenix, AZ, USA,
                  October 29 - Nov. 1, 2018},
  pages        = {1--9},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/TEST.2018.8624738},
  doi          = {10.1109/TEST.2018.8624738},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/itc/WohlWMC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/LiCPNC17,
  author       = {Zipeng Li and
                  Jonathon E. Colburn and
                  Vinod Pagalone and
                  Kaushik Narayanun and
                  Krishnendu Chakrabarty},
  title        = {Test-cost optimization in a scan-compression architecture using support-vector
                  regression},
  booktitle    = {35th {IEEE} {VLSI} Test Symposium, {VTS} 2017, Las Vegas, NV, USA,
                  April 9-12, 2017},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2017},
  url          = {https://doi.org/10.1109/VTS.2017.7928956},
  doi          = {10.1109/VTS.2017.7928956},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/LiCPNC17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/SonawaneCSSYJC16,
  author       = {Milind Sonawane and
                  Sailendra Chadalavada and
                  Shantanu Sarangi and
                  Amit Sanghani and
                  Mahmut Yilmaz and
                  Pavan Kumar Datla Jagannadha and
                  Jonathon E. Colburn},
  title        = {Flexible scan interface architecture for complex SoCs},
  booktitle    = {34th {IEEE} {VLSI} Test Symposium, {VTS} 2016, Las Vegas, NV, USA,
                  April 25-27, 2016},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/VTS.2016.7477308},
  doi          = {10.1109/VTS.2016.7477308},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/SonawaneCSSYJC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/SonawaneJCSYSNC16,
  author       = {Milind Sonawane and
                  Pavan Kumar Datla Jagannadha and
                  Sailendra Chadalavada and
                  Shantanu Sarangi and
                  Mahmut Yilmaz and
                  Amit Sanghani and
                  Karthikeyan Natarajan and
                  Jonathon E. Colburn and
                  Anubhav Sinha},
  title        = {Dynamic docking architecture for concurrent testing and peak power
                  reduction},
  booktitle    = {34th {IEEE} {VLSI} Test Symposium, {VTS} 2016, Las Vegas, NV, USA,
                  April 25-27, 2016},
  pages        = {1--6},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/VTS.2016.7477290},
  doi          = {10.1109/VTS.2016.7477290},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/SonawaneJCSYSNC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/WohlWCS14,
  author       = {Peter Wohl and
                  John A. Waicukauski and
                  Jonathon E. Colburn and
                  Milind Sonawane},
  title        = {Achieving extreme scan compression for SoC Designs},
  booktitle    = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
                  October 20-23, 2014},
  pages        = {1--8},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/TEST.2014.7035294},
  doi          = {10.1109/TEST.2014.7035294},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/WohlWCS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/WohlWNMAC13,
  author       = {Peter Wohl and
                  John A. Waicukauski and
                  Frederic Neuveux and
                  Gregory A. Maston and
                  Nadir Achouri and
                  Jonathon E. Colburn},
  title        = {Two-level compression through selective reseeding},
  booktitle    = {2013 {IEEE} International Test Conference, {ITC} 2013, Anaheim, CA,
                  USA, September 6-13, 2013},
  pages        = {1--10},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/TEST.2013.6651896},
  doi          = {10.1109/TEST.2013.6651896},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/WohlWNMAC13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/ColburnCKD13,
  author       = {Jonathon E. Colburn and
                  K.{-}Y. Chung and
                  Haluk Konuk and
                  Y. Dong},
  title        = {Innovative practices session 6C: Latest practices in test compression},
  booktitle    = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
                  April 29 - May 2, 2013},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/VTS.2013.6548914},
  doi          = {10.1109/VTS.2013.6548914},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vts/ColburnCKD13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/PantAVC13,
  author       = {P. Pant and
                  M. Amodeo and
                  Sujal Vora and
                  Jonathon E. Colburn},
  title        = {Innovative practices session 10C: Delay test},
  booktitle    = {31st {IEEE} {VLSI} Test Symposium, {VTS} 2013, Berkeley, CA, USA,
                  April 29 - May 2, 2013},
  pages        = {1},
  publisher    = {{IEEE} Computer Society},
  year         = {2013},
  url          = {https://doi.org/10.1109/VTS.2013.6548938},
  doi          = {10.1109/VTS.2013.6548938},
  timestamp    = {Fri, 01 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/PantAVC13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/WohlWNC12,
  author       = {Peter Wohl and
                  John A. Waicukauski and
                  Frederic Neuveux and
                  Jonathon E. Colburn},
  title        = {Hybrid selector for high-X scan compression},
  booktitle    = {2012 {IEEE} International Test Conference, {ITC} 2012, Anaheim, CA,
                  USA, November 5-8, 2012},
  pages        = {1--10},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/TEST.2012.6401558},
  doi          = {10.1109/TEST.2012.6401558},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/WohlWNC12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vts/WohlWC12,
  author       = {Peter Wohl and
                  John A. Waicukauski and
                  Jonathon E. Colburn},
  title        = {Enhancing testability by structured partial scan},
  booktitle    = {30th {IEEE} {VLSI} Test Symposium, {VTS} 2012, Maui, Hawaii, USA,
                  23-26 April 2012},
  pages        = {152--157},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/VTS.2012.6231095},
  doi          = {10.1109/VTS.2012.6231095},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/vts/WohlWC12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/JeeCIP00,
  author       = {Alvin Jee and
                  Jonathon E. Colburn and
                  V. Swamy Irrinki and
                  Mukesh Puri},
  title        = {Optimizing Memory Tests by Analyzing Defect Coverage},
  booktitle    = {8th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2000), 7-8 August 2000, San Jose, CA, {USA}},
  pages        = {20--28},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/MTDT.2000.868611},
  doi          = {10.1109/MTDT.2000.868611},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/JeeCIP00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/itc/LavoLC99,
  author       = {David B. Lavo and
                  Tracy Larrabee and
                  Jonathon E. Colburn},
  title        = {Eliminating the Ouija board: automatic thresholds and probabilistic
                  I{\_}DDQ diagnosis},
  booktitle    = {Proceedings {IEEE} International Test Conference 1999, Atlantic City,
                  NJ, USA, 27-30 September 1999},
  pages        = {1065--1072},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/TEST.1999.805840},
  doi          = {10.1109/TEST.1999.805840},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/itc/LavoLC99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/mtdt/SegalBCKHS99,
  author       = {Julie D. Segal and
                  Sergei Bakarian and
                  Jonathon E. Colburn and
                  Madan Kumar and
                  Chang Hong and
                  Alex Shubat},
  title        = {Determining Redundancy Requirements for Memory Arrays with Critical
                  Area Analysis},
  booktitle    = {7th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} '99), August 9-10, 1999, San Jose, CA, {USA}},
  pages        = {48--53},
  publisher    = {{IEEE} Computer Society},
  year         = {1999},
  url          = {https://doi.org/10.1109/MTDT.1999.782683},
  doi          = {10.1109/MTDT.1999.782683},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/SegalBCKHS99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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