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BibTeX records: Shivani Chaudhary
@article{DBLP:journals/jssc/KumarDSBCJTM17, author = {Ashish Kumar and Chandrajit Debnath and Pratap Narayan Singh and Vivek Bhatia and Shivani Chaudhary and Vigyan Jain and St{\'{e}}phane Le Tual and Rakesh Malik}, title = {A 0.065-mm\({}^{\mbox{2}}\) 19.8-mW Single-Channel Calibration-Free 12-b 600-MS/s {ADC} in 28-nm {UTBB} {FD-SOI} Using {FBB}}, journal = {{IEEE} J. Solid State Circuits}, volume = {52}, number = {7}, pages = {1927--1939}, year = {2017}, url = {https://doi.org/10.1109/JSSC.2017.2695574}, doi = {10.1109/JSSC.2017.2695574}, timestamp = {Sun, 30 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/KumarDSBCJTM17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/esscirc/KumarDSBCJTM16, author = {Ashish Kumar and Chandrajit Debnath and Pratap Narayan Singh and Vivek Bhatia and Shivani Chaudhary and Vigyan Jain and St{\'{e}}phane Le Tual and Rakesh Malik}, title = {A 0.065mm\({}^{\mbox{2}}\) 19.8mW single channel calibration-free 12b 600MS/s {ADC} in 28nm {UTBB} {FDSOI} using {FBB}}, booktitle = {{ESSCIRC} Conference 2016: 42\({}^{\mbox{nd}}\) European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016}, pages = {165--168}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/ESSCIRC.2016.7598268}, doi = {10.1109/ESSCIRC.2016.7598268}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/esscirc/KumarDSBCJTM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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