BibTeX records: Jan Butas

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@article{DBLP:journals/jssc/ButasCPC01,
  author       = {Jan Butas and
                  Chiu{-}Sing Choy and
                  Juraj Povazanec and
                  Cheong{-}Fat Chan},
  title        = {Asynchronous cross-pipelined multiplier},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {36},
  number       = {8},
  pages        = {1272--1275},
  year         = {2001},
  url          = {https://doi.org/10.1109/4.938377},
  doi          = {10.1109/4.938377},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/ButasCPC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tc/ChoyBPC01,
  author       = {Oliver Chiu{-}sing Choy and
                  Jan Butas and
                  Juraj Povazanec and
                  Cheong{-}Fat Chan},
  title        = {A New Control Circuit for Asynchronous Micropipelines},
  journal      = {{IEEE} Trans. Computers},
  volume       = {50},
  number       = {9},
  pages        = {992--997},
  year         = {2001},
  url          = {https://doi.org/10.1109/12.954514},
  doi          = {10.1109/12.954514},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tc/ChoyBPC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/SiuCBC01,
  author       = {Pui{-}Lam Siu and
                  Chiu{-}sing Choy and
                  Jan Butas and
                  Cheong{-}Fat Chan},
  title        = {A low power asynchronous {DES}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {538--541},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922293},
  doi          = {10.1109/ISCAS.2001.922293},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/SiuCBC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/LeeCBC01,
  author       = {Chi{-}Wai Lee and
                  Chiu{-}sing Choy and
                  Jan Butas and
                  Cheong{-}Fat Chan},
  title        = {A pipelined dataflow small micro-coded asynchronous processor and
                  its application to {DCT}},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {910--913},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922386},
  doi          = {10.1109/ISCAS.2001.922386},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/LeeCBC01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/TangCBC00,
  author       = {Tin{-}Yau Tang and
                  Chiu{-}sing Choy and
                  Jan Butas and
                  Cheong{-}Fat Chan},
  title        = {An {ALU} design using a novel asynchronous pipeline architecture},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
                  Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
                  May 2000, Proceedings},
  pages        = {361--364},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISCAS.2000.857439},
  doi          = {10.1109/ISCAS.2000.857439},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/TangCBC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/pdpta/PovazanecCCBZYT99,
  author       = {Juraj Povazanec and
                  Oliver Chiu{-}sing Choy and
                  Cheong{-}Fat Chan and
                  Jan Butas and
                  Yeu{-}qiu Zhang and
                  Jing{-}Ling Yang and
                  Tin{-}yan Tang},
  editor       = {Hamid R. Arabnia},
  title        = {Pipelined Dataflow Architecture of a Small Processor},
  booktitle    = {Proceedings of the International Conference on Parallel and Distributed
                  Processing Techniques and Applications, {PDPTA} 1999, June 28 - Junlly
                  1, 1999, Las Vegas, Nevada, {USA}},
  pages        = {1217--1223},
  publisher    = {{CSREA} Press},
  year         = {1999},
  timestamp    = {Mon, 04 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/pdpta/PovazanecCCBZYT99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}