Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDBibTeX records: Erich Barke
@article{DBLP:journals/tcad/Zivkovic0OSB19,
author = {Carna Zivkovic and
Christoph Grimm and
Markus Olbrich and
Oliver Scharf and
Erich Barke},
title = {Hierarchical Verification of {AMS} Systems With Affine Arithmetic
Decision Diagrams},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {38},
number = {10},
pages = {1785--1798},
year = {2019},
url = {https://doi.org/10.1109/TCAD.2018.2864238},
doi = {10.1109/TCAD.2018.2864238},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Zivkovic0OSB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispdc/BredthauerOB18,
author = {Bjorn Bredthauer and
Markus Olbrich and
Erich Barke},
title = {{STP} - {A} Quadratic {VLSI} Placement Tool Using Graphic Processing
Units},
booktitle = {17th International Symposium on Parallel and Distributed Computing,
{ISPDC} 2018, Geneva, Switzerland, June 25-28, 2018},
pages = {77--84},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISPDC2018.2018.00020},
doi = {10.1109/ISPDC2018.2018.00020},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/ispdc/BredthauerOB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BarkeFG0HHHLNNO16,
author = {Erich Barke and
Andreas Furtig and
Georg Glaeser and
Christoph Grimm and
Lars Hedrich and
Stefan Heinen and
Eckhard Hennig and
Hyun{-}Sek Lukas Lee and
Wolfgang Nebel and
Gregor Nitsche and
Markus Olbrich and
Carna Radojicic and
Fabian Speicher},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {Embedded tutorial: Analog-/mixed-signal verification methods for {AMS}
coverage analysis},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {1102--1111},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459473/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BarkeFG0HHHLNNO16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/LeeAHOB15,
author = {Hyun{-}Sek Lukas Lee and
Matthias Althoff and
Stefan Hoelldampf and
Markus Olbrich and
Erich Barke},
title = {Automated generation of hybrid system models for reachability analysis
of nonlinear analog circuits},
booktitle = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2015, Chiba, Japan, January 19-22, 2015},
pages = {725--730},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ASPDAC.2015.7059096},
doi = {10.1109/ASPDAC.2015.7059096},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/LeeAHOB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/simutools/ScharfOB15,
author = {Oliver Scharf and
Markus Olbrich and
Erich Barke},
editor = {Georgios Theodoropoulos},
title = {Split and merge strategies for solving uncertain equations using affine
arithmetic},
booktitle = {Proceedings of the 8th International Conference on Simulation Tools
and Techniques, Athens, Greece, August 24-26, 2015},
pages = {1--8},
publisher = {{ICST/ACM}},
year = {2015},
url = {https://doi.org/10.4108/eai.24-8-2015.2260594},
doi = {10.4108/EAI.24-8-2015.2260594},
timestamp = {Tue, 01 Oct 2019 07:26:13 +0200},
biburl = {https://dblp.org/rec/conf/simutools/ScharfOB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/QuiringOB15,
author = {Artur Quiring and
Markus Olbrich and
Erich Barke},
title = {Fast global interconnnect driven 3D floorplanning},
booktitle = {2015 {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015},
pages = {313--318},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/VLSI-SoC.2015.7314436},
doi = {10.1109/VLSI-SOC.2015.7314436},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/QuiringOB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KatzschkeSOBTB14,
author = {C. Katzschke and
M.{-}P. Sohn and
Markus Olbrich and
Volker Meyer zu Bexten and
Markus Tristl and
Erich Barke},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Application of Mission Profiles to enable cross-domain constraint-driven
design},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.079},
doi = {10.7873/DATE.2014.079},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/KatzschkeSOBTB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sbcci/KargelOB14,
author = {Michael K{\"{a}}rgel and
Markus Olbrich and
Erich Barke},
editor = {Edward David Moreno Ordonez and
Rodolfo Jardim de Azevedo and
Peter R. Kinget},
title = {Simulation Based Verification with Range Based Signal Representations
for Mixed-Signal Systems},
booktitle = {Proceedings of the 27th Symposium on Integrated Circuits and Systems
Design, Aracaju, Brazil, September 1-5, 2014},
pages = {42:1--42:7},
publisher = {{ACM}},
year = {2014},
url = {https://doi.org/10.1145/2660540.2661010},
doi = {10.1145/2660540.2661010},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sbcci/KargelOB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/QuiringOB13,
author = {Artur Quiring and
Markus Olbrich and
Erich Barke},
title = {Improving 3D-Floorplanning using smart selection operations in meta-heuristic
optimization},
booktitle = {2013 {IEEE} International 3D Systems Integration Conference (3DIC),
San Francisco, CA, USA, October 2-4, 2013},
pages = {1--6},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/3DIC.2013.6702337},
doi = {10.1109/3DIC.2013.6702337},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/3dic/QuiringOB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/HoelldampfLZOB12,
author = {Stefan Hoelldampf and
Hyun{-}Sek Lukas Lee and
Daniel Zaum and
Markus Olbrich and
Erich Barke},
editor = {Ramalingam Sridhar and
Norbert Schuhmann and
Kaijian Shi},
title = {Efficient generation of analog circuit models for accelerated mixed-signal
simulation},
booktitle = {{IEEE} 25th International {SOC} Conference, {SOCC} 2012, Niagara Falls,
NY, USA, September 12-14, 2012},
pages = {104--109},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/SOCC.2012.6398386},
doi = {10.1109/SOCC.2012.6398386},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/HoelldampfLZOB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/3dic/QuiringLOB11,
author = {Artur Quiring and
Marc Lindenberg and
Markus Olbrich and
Erich Barke},
editor = {Mitsumasa Koyanagi and
Morihiro Kada},
title = {3D floorplanning considering vertically aligned rectilinear modules
using T\({}^{\mbox{{\({_\ast}\)}}}\)-tree},
booktitle = {2011 {IEEE} International 3D Systems Integration Conference (3DIC),
Osaka, Japan, January 31 - February 2, 2012},
pages = {1--5},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/3DIC.2012.6263030},
doi = {10.1109/3DIC.2012.6263030},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/3dic/QuiringLOB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/WangOBBBP11,
author = {Lei Wang and
Markus Olbrich and
Erich Barke and
Thomas B{\"{u}}chner and
Markus B{\"{u}}hler and
Philipp V. Panitz},
editor = {Joel R. Phillips and
Alan J. Hu and
Helmut Graeb},
title = {A theoretical probabilistic simulation framework for dynamic power
estimation},
booktitle = {2011 {IEEE/ACM} International Conference on Computer-Aided Design,
{ICCAD} 2011, San Jose, California, USA, November 7-10, 2011},
pages = {708--715},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICCAD.2011.6105407},
doi = {10.1109/ICCAD.2011.6105407},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/WangOBBBP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HoelldampfZOB11,
author = {Stefan Hoelldampf and
Daniel Zaum and
Markus Olbrich and
Erich Barke},
title = {Using analog circuit behavior to generate SystemC events for an acceleration
of mixed-signal simulation},
booktitle = {{IEEE} 29th International Conference on Computer Design, {ICCD} 2011,
Amherst, MA, USA, October 9-12, 2011},
pages = {108--112},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ICCD.2011.6081384},
doi = {10.1109/ICCD.2011.6081384},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HoelldampfZOB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/WangOBBBP11,
author = {Lei Wang and
Markus Olbrich and
Erich Barke and
Thomas B{\"{u}}chner and
Markus B{\"{u}}hler and
Philipp V. Panitz},
title = {A gate sizing method for glitch power reduction},
booktitle = {{IEEE} 24th International SoC Conference, {SOCC} 2011, Taipei, Taiwan,
September 26-28, 2011},
pages = {24--29},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/SOCC.2011.6085070},
doi = {10.1109/SOCC.2011.6085070},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/WangOBBBP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ZhangHOKB11,
author = {Min Zhang and
R. H{\"{a}}u{\ss}ler and
Markus Olbrich and
Harald Kinzelbach and
Erich Barke},
title = {A Statistical Learning Based Modeling Approach and Its Application
in Leakage Library Characterization},
booktitle = {{VLSI} Design 2011: 24th International Conference on {VLSI} Design,
{IIT} Madras, Chennai, India, 2-7 January 2011},
pages = {106--111},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VLSID.2011.23},
doi = {10.1109/VLSID.2011.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ZhangHOKB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/SchupferGOKB10,
author = {Florian Schupfer and
Christoph Grimm and
Markus Olbrich and
Michael K{\"{a}}rgel and
Erich Barke},
editor = {Adam Morawiec and
Jinnie Hinderscheit},
title = {Towards Abstract Analysis Techniques for Range Based System Simulations},
booktitle = {Proceedings of the 2010 Forum on specification {\&} Design Languages,
{FDL} 2010, September 14-16, 2010, Southampton, {UK}},
pages = {159--164},
publisher = {ECSI, Electronic Chips {\&} Systems design Initiative},
year = {2010},
timestamp = {Mon, 22 Dec 2014 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fdl/SchupferGOKB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/ZaumHOBN10,
author = {Daniel Zaum and
Stefan Hoelldampf and
Markus Olbrich and
Erich Barke and
Ingmar Neumann},
editor = {Adam Morawiec and
Jinnie Hinderscheit},
title = {An Accelerated Mixed-Signal Simulation Kernel for SystemC},
booktitle = {Proceedings of the 2010 Forum on specification {\&} Design Languages,
{FDL} 2010, September 14-16, 2010, Southampton, {UK}},
pages = {234--239},
publisher = {ECSI, Electronic Chips {\&} Systems design Initiative},
year = {2010},
timestamp = {Fri, 25 Feb 2011 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fdl/ZaumHOBN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/bmas/ZaumHOBNS09,
author = {Daniel Zaum and
Stefan Hoelldampf and
Markus Olbrich and
Erich Barke and
Ingmar Neumann and
Sebastian Schmidt},
title = {The {PRAISE} approach for accelerated transient analysis applied to
wire models},
booktitle = {2009 {IEEE} International Behavioral Modeling and Simulation Workshop,
{BMAS} 2009, San Jose, CA, USA, September 17-18, 2009},
pages = {120--125},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/BMAS.2009.5338876},
doi = {10.1109/BMAS.2009.5338876},
timestamp = {Wed, 01 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/bmas/ZaumHOBNS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BarkeGGHHPSW09,
author = {Erich Barke and
Darius Grabowski and
Helmut Graeb and
Lars Hedrich and
Stefan Heinen and
Ralf Popp and
Sebastian Steinhorst and
Yifan Wang},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Formal approaches to analog circuit verification},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {724--729},
publisher = {{IEEE}},
year = {2009},
url = {http://dl.acm.org/citation.cfm?id=1874798},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/BarkeGGHHPSW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/socc/WangOBBB09,
author = {Lei Wang and
Markus Olbrich and
Erich Barke and
Thomas B{\"{u}}chner and
Markus B{\"{u}}hler},
title = {Fast dynamic power estimation considering glitch filtering},
booktitle = {Annual {IEEE} International SoC Conference, SoCC 2009, September 9-11,
2009, Belfast, Northern Ireland, UK, Proceedings},
pages = {361--364},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/SOCCON.2009.5398019},
doi = {10.1109/SOCCON.2009.5398019},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/socc/WangOBBB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/OlbrichB08,
author = {Markus Olbrich and
Erich Barke},
editor = {Chong{-}Min Kyung and
Kiyoung Choi and
Soonhoi Ha},
title = {Distribution arithmetic for stochastical analysis},
booktitle = {Proceedings of the 13th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008},
pages = {537--542},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ASPDAC.2008.4484009},
doi = {10.1109/ASPDAC.2008.4484009},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/OlbrichB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/GrabowskiOB08,
author = {Darius Grabowski and
Markus Olbrich and
Erich Barke},
editor = {Chong{-}Min Kyung and
Kiyoung Choi and
Soonhoi Ha},
title = {Analog circuit simulation using range arithmetics},
booktitle = {Proceedings of the 13th Asia South Pacific Design Automation Conference,
{ASP-DAC} 2008, Seoul, Korea, January 21-24, 2008},
pages = {762--767},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/ASPDAC.2008.4484053},
doi = {10.1109/ASPDAC.2008.4484053},
timestamp = {Fri, 26 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/GrabowskiOB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/LeppeltB08,
author = {Peter Leppelt and
Erich Barke},
editor = {Donatella Sciuto},
title = {Determining the Technical Complexity of Integrated Circuits},
booktitle = {Design, Automation and Test in Europe, {DATE} 2008, Munich, Germany,
March 10-14, 2008},
pages = {935},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1109/DATE.2008.4484795},
doi = {10.1109/DATE.2008.4484795},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/LeppeltB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ddecs/JamborZOB08,
author = {Thomas Jambor and
Daniel Zaum and
Markus Olbrich and
Erich Barke},
editor = {Bernd Straube and
Milos Drutarovsk{\'{y}} and
Michel Renovell and
Peter Gramata and
M{\'{a}}ria Fischerov{\'{a}}},
title = {A Trapezoidal Approach to Corner Stitching Data Structures for Arbitrary
Routing Angles},
booktitle = {Proceedings of the 11th {IEEE} Workshop on Design {\&} Diagnostics
of Electronic Circuits {\&} Systems {(DDECS} 2008), Bratislava,
Slovakia, April 16-18, 2008},
pages = {54--58},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/DDECS.2008.4538756},
doi = {10.1109/DDECS.2008.4538756},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ddecs/JamborZOB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/HoelldampfZOBNS08,
author = {Stefan Hoelldampf and
Daniel Zaum and
Markus Olbrich and
Erich Barke and
Ingmar Neumann and
Sebastian Schmidt},
title = {Methodologies for High-Level Modelling and Evaluation in the Automotive
Domain (invited)},
booktitle = {Forum on specification and Design Languages, {FDL} 2008, September
23-25, 2008, Stuttgart, Germany, Proceedings},
pages = {73--77},
publisher = {{IEEE}},
year = {2008},
url = {https://doi.org/10.1109/FDL.2008.4641424},
doi = {10.1109/FDL.2008.4641424},
timestamp = {Wed, 01 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fdl/HoelldampfZOBNS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PanitzOBBK08,
author = {Philipp V. Panitz and
Markus Olbrich and
Erich Barke and
Markus B{\"{u}}hler and
J{\"{u}}rgen Koehl},
editor = {Vijaykrishnan Narayanan and
Zhiyuan Yan and
Enrico Macii and
Sanjukta Bhanja},
title = {Considering possible opens in non-tree topology wire delay calculation},
booktitle = {Proceedings of the 18th {ACM} Great Lakes Symposium on {VLSI} 2008,
Orlando, Florida, USA, May 4-6, 2008},
pages = {17--22},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1366110.1366118},
doi = {10.1145/1366110.1366118},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PanitzOBBK08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HariziHOB07,
author = {Hedi Harizi and
Robert HauBler and
Markus Olbrich and
Erich Barke},
title = {Efficient Modeling Techniques for Dynamic Voltage Drop Analysis},
booktitle = {Proceedings of the 44th Design Automation Conference, {DAC} 2007,
San Diego, CA, USA, June 4-8, 2007},
pages = {706--711},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1145/1278480.1278657},
doi = {10.1145/1278480.1278657},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HariziHOB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ZhangOSFKB07,
author = {Min Zhang and
Markus Olbrich and
David Seider and
Martin Frerichs and
Harald Kinzelbach and
Erich Barke},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {CMCal: an accurate analytical approach for the analysis of process
variations with non-gaussian parameters and nonlinear functions},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {243--248},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://doi.org/10.1109/DATE.2007.364598},
doi = {10.1109/DATE.2007.364598},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ZhangOSFKB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/GrabowskiOGB07,
author = {Darius Grabowski and
Markus Olbrich and
Christoph Grimm and
Erich Barke},
title = {Range Arithmetics to Speed up Reachability Analysis of Analog Systems},
booktitle = {Forum on specification and Design Languages, {FDL} 2007, September
18-20, 2007, Barcelona, Spain, Proceedings},
pages = {38--43},
publisher = {{ECSI}},
year = {2007},
timestamp = {Mon, 22 Dec 2014 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fdl/GrabowskiOGB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WeinkopfHB07,
author = {Jan Torben Weinkopf and
Klaus Harbich and
Erich Barke},
editor = {Koen Bertels and
Walid A. Najjar and
Arjan J. van Genderen and
Stamatis Vassiliadis},
title = {Incremental Fault Emulation},
booktitle = {{FPL} 2007, International Conference on Field Programmable Logic and
Applications, Amsterdam, The Netherlands, 27-29 August 2007},
pages = {542--545},
publisher = {{IEEE}},
year = {2007},
url = {https://doi.org/10.1109/FPL.2007.4380712},
doi = {10.1109/FPL.2007.4380712},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WeinkopfHB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PanitzOBK07,
author = {Philipp V. Panitz and
Markus Olbrich and
Erich Barke and
J{\"{u}}rgen Koehl},
editor = {Hai Zhou and
Enrico Macii and
Zhiyuan Yan and
Yehia Massoud},
title = {Robust wiring networks for DfY considering timing constraints},
booktitle = {Proceedings of the 17th {ACM} Great Lakes Symposium on {VLSI} 2007,
Stresa, Lago Maggiore, Italy, March 11-13, 2007},
pages = {43--48},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1228784.1228800},
doi = {10.1145/1228784.1228800},
timestamp = {Wed, 16 Aug 2023 21:16:32 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PanitzOBK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/SmithSBB07,
author = {Matthew A. Smith and
Lars A. Schreiner and
Erich Barke and
Volker Meyer zu Bexten},
editor = {Patrick H. Madden and
David Z. Pan},
title = {Algorithms for automatic length compensation of busses in analog integrated
circuits},
booktitle = {Proceedings of the 2007 International Symposium on Physical Design,
{ISPD} 2007, Austin, Texas, USA, March 18-21, 2007},
pages = {159--166},
publisher = {{ACM}},
year = {2007},
url = {https://doi.org/10.1145/1231996.1232027},
doi = {10.1145/1231996.1232027},
timestamp = {Tue, 06 Nov 2018 11:07:47 +0100},
biburl = {https://dblp.org/rec/conf/ispd/SmithSBB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fdl/PlatteJSB06,
author = {Daniel Platte and
Shangjing Jing and
Ralf Sommer and
Erich Barke},
title = {Using Sequential Equations to Improve Efficiency and Robustness},
booktitle = {Forum on specification and Design Languages, {FDL} 2006, September
19-22, 2006, Darmstadt, Germany, Proceedings},
pages = {83--90},
publisher = {{ECSI}},
year = {2006},
url = {http://www.ecsi-association.org/ecsi/main.asp?l1=library\&\#38;fn=def\&\#38;id=395},
timestamp = {Thu, 03 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fdl/PlatteJSB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/WeinkopfHB06,
author = {Jan Torben Weinkopf and
Klaus Harbich and
Erich Barke},
title = {Parsifal: {A} Generic and Configurable Fault Emulation Environment
with Non-Classical Fault Models},
booktitle = {Proceedings of the 2006 International Conference on Field Programmable
Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
pages = {1--6},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/FPL.2006.311220},
doi = {10.1109/FPL.2006.311220},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/fpl/WeinkopfHB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GrabowskiGB06,
author = {Darius Grabowski and
Christoph Grimm and
Erich Barke},
title = {Semi-symbolic modeling and simulation of circuits and systems},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2006), 21-24
May 2006, Island of Kos, Greece},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ISCAS.2006.1692752},
doi = {10.1109/ISCAS.2006.1692752},
timestamp = {Wed, 16 Oct 2019 14:14:49 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GrabowskiGB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/KlausenHB06,
author = {Ralf Klausen and
Lars Hedrich and
Erich Barke},
editor = {Bernd Straube and
Martin Freibothe},
title = {Vermeidung fehlerhafter Verifikations-Ergebnisse beim {\"{A}}quivalenz-Vergleich
nichtlinearer analoger Schaltungen},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Dresden, Germany, February 20-22,
2006},
pages = {122--131},
publisher = {Fraunhofer Institut f{\"{u}}r Integrierte Schaltungen},
year = {2006},
timestamp = {Thu, 28 Jun 2012 09:12:11 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/KlausenHB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/GrabowskiGB06,
author = {Darius Grabowski and
Christoph Grimm and
Erich Barke},
editor = {Bernd Straube and
Martin Freibothe},
title = {Ein Verfahren zur effizienten Analyse von Schaltungen mit Parametervarianzen},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Dresden, Germany, February 20-22,
2006},
pages = {181--190},
publisher = {Fraunhofer Institut f{\"{u}}r Integrierte Schaltungen},
year = {2006},
timestamp = {Mon, 22 Dec 2014 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mbmv/GrabowskiGB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mbmv/PlatteJSB06,
author = {Daniel Platte and
Shangjing Jing and
Ralf Sommer and
Erich Barke},
editor = {Bernd Straube and
Martin Freibothe},
title = {Ans{\"{a}}tze zur Verbesserung der Simulationsperformance automatisch
generierter analoger Verhaltensmodelle},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation
von Schaltungen und Systemen (MBMV), Dresden, Germany, February 20-22,
2006},
pages = {191--200},
publisher = {Fraunhofer Institut f{\"{u}}r Integrierte Schaltungen},
year = {2006},
timestamp = {Thu, 28 Jun 2012 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mbmv/PlatteJSB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ispd/SchreinerOBB05,
author = {Lars A. Schreiner and
Markus Olbrich and
Erich Barke and
Volker Meyer zu Bexten},
editor = {Patrick Groeneveld and
Louis Scheffer},
title = {Routing of analog busses with parasitic symmetry},
booktitle = {Proceedings of the 2005 International Symposium on Physical Design,
{ISPD} 2005, San Francisco, California, USA, April 3-6, 2005},
pages = {14--19},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1055137.1055143},
doi = {10.1145/1055137.1055143},
timestamp = {Tue, 06 Nov 2018 11:07:46 +0100},
biburl = {https://dblp.org/rec/conf/ispd/SchreinerOBB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:journals/entcs/GrabowskiPHB06,
author = {Darius Grabowski and
Daniel Platte and
Lars Hedrich and
Erich Barke},
editor = {Oded Maler},
title = {Time Constrained Verification of Analog Circuits using Model-Checking
Algorithms},
booktitle = {Proceedings of the First Workshop on Formal Verification of Analog
Circuits, {FAC} 2005, Edinburgh, UK, April 9, 2005},
series = {Electronic Notes in Theoretical Computer Science},
volume = {153},
number = {3},
pages = {37--52},
publisher = {Elsevier},
year = {2005},
url = {https://doi.org/10.1016/j.entcs.2006.01.026},
doi = {10.1016/J.ENTCS.2006.01.026},
timestamp = {Fri, 20 Jan 2023 10:54:35 +0100},
biburl = {https://dblp.org/rec/journals/entcs/GrabowskiPHB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NathkeBHB04,
author = {Lutz N{\"{a}}thke and
Volodymyr Burkhay and
Lars Hedrich and
Erich Barke},
title = {Hierarchical Automatic Behavioral Model Generation of Nonlinear Analog
Circuits Based on Nonlinear Symbolic Techniques},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {442--447},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1268886},
doi = {10.1109/DATE.2004.1268886},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/NathkeBHB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/OlbrichB04,
author = {Markus Olbrich and
Erich Barke},
title = {Placement Using a Localization Probability Model {(LPM)}},
booktitle = {2004 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2004), 16-20 February 2004, Paris, France},
pages = {1412},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/DATE.2004.1269112},
doi = {10.1109/DATE.2004.1269112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/OlbrichB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/KayaSOB04,
author = {Idris Kaya and
Silke Salewski and
Markus Olbrich and
Erich Barke},
editor = {Enrico Macii and
Odysseas G. Koufopavlou and
Vassilis Paliouras},
title = {Wirelength Reduction Using 3-D Physical Design},
booktitle = {Integrated Circuit and System Design, Power and Timing Modeling, Optimization
and Simulation; 14th International Workshop, {PATMOS} 2004, Santorini,
Greece, September 15-17, 2004, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3254},
pages = {453--462},
publisher = {Springer},
year = {2004},
url = {https://doi.org/10.1007/978-3-540-30205-6\_47},
doi = {10.1007/978-3-540-30205-6\_47},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/KayaSOB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/HermannOB03,
author = {Andreas Hermann and
Markus Olbrich and
Erich Barke},
title = {Placing substrate contacts into mixed-signal circuits controlling
circuit performance},
booktitle = {Proceedings of the {IEEE} Custom Integrated Circuits Conference, {CICC}
2003, San Jose, CA, USA, September 21 - 24, 2003},
pages = {373--376},
publisher = {{IEEE}},
year = {2003},
url = {https://doi.org/10.1109/CICC.2003.1249421},
doi = {10.1109/CICC.2003.1249421},
timestamp = {Thu, 11 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/HermannOB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/HermannOB03,
author = {Andreas Hermann and
Markus Olbrich and
Erich Barke},
editor = {Manfred Glesner and
Ricardo Augusto da Luz Reis and
Hans Eveking and
Vincent John Mooney III and
Leandro Soares Indrusiak and
Peter Zipf},
title = {Substrate Modeling and Noise Reduction in Mixed-Signal Circuits},
booktitle = {{IFIP} VLSI-SoC 2003, {IFIP} {WG} 10.5 International Conference on
Very Large Scale Integration of System-on-Chip, Darmstadt, Germany,
1-3 December 2003},
pages = {13--18},
publisher = {Technische Universit{\"{a}}t Darmstadt, Insitute of Microelectronic
Systems},
year = {2003},
timestamp = {Thu, 11 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsi/HermannOB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cav/HartongHB02,
author = {Walter Hartong and
Lars Hedrich and
Erich Barke},
editor = {Ed Brinksma and
Kim Guldstrand Larsen},
title = {On Discrete Modeling and Model Checking for Nonlinear Analog Systems},
booktitle = {Computer Aided Verification, 14th International Conference, {CAV}
2002,Copenhagen, Denmark, July 27-31, 2002, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2404},
pages = {401--413},
publisher = {Springer},
year = {2002},
url = {https://doi.org/10.1007/3-540-45657-0\_33},
doi = {10.1007/3-540-45657-0\_33},
timestamp = {Tue, 14 May 2019 10:00:43 +0200},
biburl = {https://dblp.org/rec/conf/cav/HartongHB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HartongHB02,
author = {Walter Hartong and
Lars Hedrich and
Erich Barke},
title = {Model checking algorithms for analog verification},
booktitle = {Proceedings of the 39th Design Automation Conference, {DAC} 2002,
New Orleans, LA, USA, June 10-14, 2002},
pages = {542--547},
publisher = {{ACM}},
year = {2002},
url = {https://doi.org/10.1145/513918.514055},
doi = {10.1145/513918.514055},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HartongHB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/PoppOHB02,
author = {Ralf Popp and
Joerg Oehmen and
Lars Hedrich and
Erich Barke},
title = {Parameter Controlled Automatic Symbolic Analysis of Nonlinear Analog
Circuits},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {274--278},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998284},
doi = {10.1109/DATE.2002.998284},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/PoppOHB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HartongHB02,
author = {Walter Hartong and
Lars Hedrich and
Erich Barke},
title = {An Approach to Model Checking for Nonlinear Analog Systems},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {1080},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998436},
doi = {10.1109/DATE.2002.998436},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HartongHB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AbkeB02,
author = {Joerg Abke and
Erich Barke},
title = {A Direct Mapping System for Datapath Module and {FSM} Implementation
into LUT-Based FPGAs},
booktitle = {2002 Design, Automation and Test in Europe Conference and Exposition
{(DATE} 2002), 4-8 March 2002, Paris, France},
pages = {1085},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/DATE.2002.998441},
doi = {10.1109/DATE.2002.998441},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/AbkeB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LemkeHB02,
author = {Andreas C. Lemke and
Lars Hedrich and
Erich Barke},
editor = {Lawrence T. Pileggi and
Andreas Kuehlmann},
title = {Analog circuit sizing based on formal methods using affine arithmetic},
booktitle = {Proceedings of the 2002 {IEEE/ACM} International Conference on Computer-aided
Design, {ICCAD} 2002, San Jose, California, USA, November 10-14, 2002},
pages = {486--489},
publisher = {{ACM} / {IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1145/774572.774643},
doi = {10.1145/774572.774643},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/LemkeHB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SalewskiB02,
author = {Silke Salewski and
Erich Barke},
title = {An Upper Bound for 3D Slicing Floorplans},
booktitle = {Proceedings of the 7th Asia and South Pacific Design Automation Conference
{(ASP-DAC} 2002), and the 15th International Conference on {VLSI}
Design {(VLSI} Design 2002), Bangalore, India, January 7-11, 2002},
pages = {567--572},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASPDAC.2002.994982},
doi = {10.1109/ASPDAC.2002.994982},
timestamp = {Mon, 14 Nov 2022 15:28:09 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SalewskiB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/KuterB01,
author = {Joachim K{\"{u}}ter and
Erich Barke},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {Architecture driven partitioning},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {479--487},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915067},
doi = {10.1109/DATE.2001.915067},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/KuterB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/OlbrichRB01,
author = {Markus Olbrich and
Achim Rein and
Erich Barke},
editor = {Wolfgang Nebel and
Ahmed Jerraya},
title = {An improved hierarchical classification algorithm for structural analysis
of integrated circuits},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2001, Munich, Germany, March 12-16, 2001},
pages = {807},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/DATE.2001.915134},
doi = {10.1109/DATE.2001.915134},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/OlbrichRB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AbkeB01,
author = {Joerg Abke and
Erich Barke},
editor = {Gordon J. Brebner and
Roger F. Woods},
title = {A New Placement Method for Direct Mapping into LUT-Based FPGAs},
booktitle = {Field-Programmable Logic and Applications, 11th International Conference,
{FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2147},
pages = {27--36},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-44687-7\_4},
doi = {10.1007/3-540-44687-7\_4},
timestamp = {Sat, 19 Oct 2019 20:15:05 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AbkeB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/HarbichB01,
author = {Klaus Harbich and
Erich Barke},
editor = {Gordon J. Brebner and
Roger F. Woods},
title = {PuMA++: From Behavioral Specification to Multi-FPGA-Prototype},
booktitle = {Field-Programmable Logic and Applications, 11th International Conference,
{FPL} 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {2147},
pages = {133--141},
publisher = {Springer},
year = {2001},
url = {https://doi.org/10.1007/3-540-44687-7\_14},
doi = {10.1007/3-540-44687-7\_14},
timestamp = {Sun, 21 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/HarbichB01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/KulaczewskiZBP01,
author = {Mark Bernd Kulaczewski and
Stefan Zimmerman and
Erich Barke and
Peter Pirsch},
title = {{CHIPDESIGN} - {A} Novel Project-oriented Microelectronics Course},
booktitle = {2001 International Conference on Microelectronics Systems Education,
{MSE} 2001, Las Vegas, NV, USA, July 17-18, 2001},
pages = {71--72},
publisher = {{IEEE} Computer Society},
year = {2001},
url = {https://doi.org/10.1109/MSE.2001.932419},
doi = {10.1109/MSE.2001.932419},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mse/KulaczewskiZBP01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/AdlerBHB00,
author = {Thorsten Adler and
Hiltrud Brocke and
Lars Hedrich and
Erich Barke},
editor = {Giovanni De Micheli},
title = {A current driven routing and verification methodology for analog applications},
booktitle = {Proceedings of the 37th Conference on Design Automation, Los Angeles,
CA, USA, June 5-9, 2000},
pages = {385--389},
publisher = {{ACM}},
year = {2000},
url = {https://doi.org/10.1145/337292.337505},
doi = {10.1145/337292.337505},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/AdlerBHB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AdlerB00,
author = {Thorsten Adler and
Erich Barke},
editor = {Ivo Bolsens},
title = {Single Step Current Driven Routing of Multiterminal Signal Nets for
Analog Applications},
booktitle = {2000 Design, Automation and Test in Europe {(DATE} 2000), 27-30 March
2000, Paris, France},
pages = {446--450},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2000},
url = {https://doi.org/10.1109/DATE.2000.840309},
doi = {10.1109/DATE.2000.840309},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/AdlerB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RingeLB00,
author = {Matthias Ringe and
Thomas Lindenkreuz and
Erich Barke},
editor = {Ivo Bolsens},
title = {Static Timing Analysis Taking Crosstalk into Account},
booktitle = {2000 Design, Automation and Test in Europe {(DATE} 2000), 27-30 March
2000, Paris, France},
pages = {451--455},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2000},
url = {https://doi.org/10.1109/DATE.2000.840310},
doi = {10.1109/DATE.2000.840310},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/RingeLB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/AbkeB00,
author = {Joerg Abke and
Erich Barke},
editor = {Reiner W. Hartenstein and
Herbert Gr{\"{u}}nbacher},
title = {CoMGen: Direct Mapping of Arbitrary Components into LUT-Based FPGAs},
booktitle = {Field-Programmable Logic and Applications, The Roadmap to Reconfigurable
Computing, 10th International Workshop, {FPL} 2000, Villach, Austria,
August 27-30, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1896},
pages = {191--200},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44614-1\_22},
doi = {10.1007/3-540-44614-1\_22},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/AbkeB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/patmos/HerrmannBSS00,
author = {Andreas Herrmann and
Erich Barke and
Mathias Silvant and
J{\"{u}}rgen Schl{\"{o}}ffel},
editor = {Dimitrios Soudris and
Peter Pirsch and
Erich Barke},
title = {{PARCOURS} - Substrate Crosstalk Analysis for Complex Mixed-Signal-Circuits},
booktitle = {Integrated Circuit Design, Power and Timing Modeling, Optimization
and Simulation, 10th International Workshop, {PATMOS} 2000, G{\"{o}}ttingen,
Germany, September 13-15, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1918},
pages = {306--315},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-45373-3\_32},
doi = {10.1007/3-540-45373-3\_32},
timestamp = {Tue, 14 May 2019 10:00:54 +0200},
biburl = {https://dblp.org/rec/conf/patmos/HerrmannBSS00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/patmos/2000,
editor = {Dimitrios Soudris and
Peter Pirsch and
Erich Barke},
title = {Integrated Circuit Design, Power and Timing Modeling, Optimization
and Simulation, 10th International Workshop, {PATMOS} 2000, G{\"{o}}ttingen,
Germany, September 13-15, 2000, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1918},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-45373-3},
doi = {10.1007/3-540-45373-3},
isbn = {3-540-41068-6},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/patmos/2000.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/KlemmeB99,
author = {M. Klemme and
Erich Barke},
title = {An extended bipolar transistor model for substrate crosstalk analysis},
booktitle = {Proceedings of the {IEEE} 1999 Custom Integrated Circuits Conference,
{CICC} 1999, San Diego, CA, USA, May 16-19, 1999},
pages = {579--582},
publisher = {{IEEE}},
year = {1999},
url = {https://doi.org/10.1109/CICC.1999.777348},
doi = {10.1109/CICC.1999.777348},
timestamp = {Fri, 07 Jul 2023 11:00:51 +0200},
biburl = {https://dblp.org/rec/conf/cicc/KlemmeB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/HarbichSBS99,
author = {Klaus Harbich and
J{\"{o}}rn Stohmann and
Erich Barke and
Ludwig Schwoerer},
title = {A Case Study: Logic Emulation - Pitfalls and Solutions},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {160},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779047},
doi = {10.1109/IWRSP.1999.779047},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/HarbichSBS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/AbkeBS99,
author = {Joerg Abke and
Erich Barke and
J{\"{o}}rn Stohmann},
title = {A Universal Module Generator for LUT-Based FPGAs},
booktitle = {Proceedings of the Tenth {IEEE} International Workshop on Rapid System
Prototyping {(RSP} 1999), Clearwater, Florida, USA, June 16-18, 1999},
pages = {230--235},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/IWRSP.1999.779058},
doi = {10.1109/IWRSP.1999.779058},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/AbkeBS99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/Sedaghat-MamanB98,
author = {Reza Sedaghat{-}Maman and
Erich Barke},
title = {Real Time Fault Injection Using Logic Emulators},
booktitle = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
1998},
pages = {475--479},
publisher = {{IEEE}},
year = {1998},
url = {https://doi.org/10.1109/ASPDAC.1998.669529},
doi = {10.1109/ASPDAC.1998.669529},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/Sedaghat-MamanB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HedrichB98,
author = {Lars Hedrich and
Erich Barke},
editor = {Patrick M. Dewilde and
Franz J. Rammig and
Gerry Musgrave},
title = {A Formal Approach to Verification of Linear Analog Circuits with Parameter
Tolerances},
booktitle = {1998 Design, Automation and Test in Europe {(DATE} '98), February
23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
pages = {649--654},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/DATE.1998.655927},
doi = {10.1109/DATE.1998.655927},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HedrichB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RingeLB98,
author = {Matthias Ringe and
Thomas Lindenkreuz and
Erich Barke},
editor = {Patrick M. Dewilde and
Franz J. Rammig and
Gerry Musgrave},
title = {Path Verification Using Boolean Satisfiability},
booktitle = {1998 Design, Automation and Test in Europe {(DATE} '98), February
23-26, 1998, Le Palais des Congr{\`{e}}s de Paris, Paris, France},
pages = {965--966},
publisher = {{IEEE} Computer Society},
year = {1998},
url = {https://doi.org/10.1109/DATE.1998.655991},
doi = {10.1109/DATE.1998.655991},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/RingeLB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/StohmannHOB98,
author = {J{\"{o}}rn Stohmann and
Klaus Harbich and
Markus Olbrich and
Erich Barke},
editor = {Reiner W. Hartenstein and
Andres Keevallik},
title = {An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping},
booktitle = {Field-Programmable Logic and Applications, From FPGAs to Computing
Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August
31 - September 3, 1998, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1482},
pages = {79--88},
publisher = {Springer},
year = {1998},
url = {https://doi.org/10.1007/BFb0055235},
doi = {10.1007/BFB0055235},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/StohmannHOB98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BehrensBT97,
author = {Dirk Behrens and
Erich Barke and
Robert Tolkiehn},
title = {Design driven partitioning},
booktitle = {Proceedings of the {ASP-DAC} '97 Asia and South Pacific Design Automation
Conference, Nippon Convention Center, Chiba, Japan, January 28-31,
1997},
pages = {49--55},
publisher = {{IEEE}},
year = {1997},
url = {https://doi.org/10.1109/ASPDAC.1997.600057},
doi = {10.1109/ASPDAC.1997.600057},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BehrensBT97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/StohmannB97,
author = {J{\"{o}}rn Stohmann and
Erich Barke},
title = {A Universal Pezaris Array Multiplier Generator for SRAM-Based FPGAs},
booktitle = {Proceedings 1997 International Conference on Computer Design: {VLSI}
in Computers {\&} Processors, {ICCD} '97, Austin, Texas, USA,
October 12-15, 1997},
pages = {489--495},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/ICCD.1997.628913},
doi = {10.1109/ICCD.1997.628913},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/StohmannB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/rsp/Sedaghat-MamanB97,
author = {Reza Sedaghat{-}Maman and
Erich Barke},
title = {A new approach to fault emulation},
booktitle = {Proceedings 8th {IEEE} International Workshop on Rapid System Prototyping:
Shortening the Path from Specification to Prototype, June 24-26, 1997,
Chapel Hill, North Carolina, {USA}},
pages = {173--179},
publisher = {{IEEE} Computer Society},
year = {1997},
url = {https://doi.org/10.1109/IWRSP.1997.618894},
doi = {10.1109/IWRSP.1997.618894},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/rsp/Sedaghat-MamanB97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/BorchersHB96,
author = {Carsten Borchers and
Lars Hedrich and
Erich Barke},
editor = {Thomas Pennino and
Ellen J. Yoffa},
title = {Equation-Based Behavioral Model Generation for Nonlinear Analog Circuits},
booktitle = {Proceedings of the 33st Conference on Design Automation, Las Vegas,
Nevada, USA, Las Vegas Convention Center, June 3-7, 1996},
pages = {236--239},
publisher = {{ACM} Press},
year = {1996},
url = {https://doi.org/10.1145/240518.240562},
doi = {10.1145/240518.240562},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/BorchersHB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ScherberBM96,
author = {Frank Scherber and
Erich Barke and
Wolfgang Meier},
title = {{PALACE:} {A} Parallel and Hierarchical Layout Analyzer and Circuit
Extractor},
booktitle = {1996 European Design and Test Conference, ED{\&}TC 1996, Paris,
France, March 11-14, 1996},
pages = {357--361},
publisher = {{IEEE} Computer Society},
year = {1996},
url = {https://doi.org/10.1109/EDTC.1996.494325},
doi = {10.1109/EDTC.1996.494325},
timestamp = {Fri, 20 May 2022 15:52:30 +0200},
biburl = {https://dblp.org/rec/conf/date/ScherberBM96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/StohmannB96,
author = {J{\"{o}}rn Stohmann and
Erich Barke},
editor = {Reiner W. Hartenstein and
Manfred Glesner},
title = {A Universal {CLA} Adder Generator for SRAM-Based FPGAs},
booktitle = {Field-Programmable Logic, Smart Applications, New Paradigms and Compilers,
6th International Workshop on Field-Programmable Logic, {FPL} '96,
Darmstadt, Germany, September 23-25, 1996, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {1142},
pages = {44--54},
publisher = {Springer},
year = {1996},
url = {https://doi.org/10.1007/3-540-61730-2\_5},
doi = {10.1007/3-540-61730-2\_5},
timestamp = {Tue, 14 May 2019 10:00:48 +0200},
biburl = {https://dblp.org/rec/conf/fpl/StohmannB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BehrensHB96,
author = {Dirk Behrens and
Klaus Harbich and
Erich Barke},
editor = {Rob A. Rutenbar and
Ralph H. J. M. Otten},
title = {Hierarchical partitioning},
booktitle = {Proceedings of the 1996 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1996, San Jose, CA, USA, November 10-14, 1996},
pages = {470--477},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1996},
url = {https://doi.org/10.1109/ICCAD.1996.569862},
doi = {10.1109/ICCAD.1996.569862},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BehrensHB96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HedrichB95,
author = {Lars Hedrich and
Erich Barke},
editor = {Richard L. Rudell},
title = {A formal approach to nonlinear analog circuit verification},
booktitle = {Proceedings of the 1995 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1995, San Jose, California, USA, November 5-9, 1995},
pages = {123--127},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1995},
url = {https://doi.org/10.1109/ICCAD.1995.480002},
doi = {10.1109/ICCAD.1995.480002},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/HedrichB95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Barke88,
author = {Erich Barke},
title = {Line-to-ground capacitance calculation for {VLSI:} a comparison},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {7},
number = {2},
pages = {295--298},
year = {1988},
url = {https://doi.org/10.1109/43.3160},
doi = {10.1109/43.3160},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Barke88.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/wi/Barke85,
author = {Erich Barke},
title = {{FERKEL:} Technologieunabh{\"{a}}ngiges direktivengesteuertes
Programmsystem zur Entwurfsregelnpr{\"{u}}fung},
journal = {Angew. Inform.},
volume = {27},
number = {8},
pages = {328--333},
year = {1985},
timestamp = {Thu, 21 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/wi/Barke85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/Barke85,
author = {Erich Barke},
editor = {Hillel Ofek and
Lawrence A. O'Neill},
title = {Resistance calculation from mask artwork data by finite element method},
booktitle = {Proceedings of the 22nd {ACM/IEEE} conference on Design automation,
{DAC} 1985, Las Vegas, Nevada, USA, 1985},
pages = {305--311},
publisher = {{ACM}},
year = {1985},
url = {https://doi.org/10.1145/317825.317875},
doi = {10.1145/317825.317875},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/Barke85.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/it/Barke84,
author = {Erich Barke},
title = {Figurenorientierte boolesche Maskenoperationen f{\"{u}}r die
Layout-Pr{\"{u}}fung integrierter Schaltungen / Polygon-based
boolean mask operations to be used in {IC} design rule checking},
journal = {Elektron. Rechenanlagen},
volume = {26},
number = {1},
pages = {20--28},
year = {1984},
url = {https://doi.org/10.1524/itit.1984.26.16.20},
doi = {10.1524/ITIT.1984.26.16.20},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/it/Barke84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Barke84,
author = {Erich Barke},
title = {A Network Comparison Algorithm for Layout Verification of Integrated
Circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {3},
number = {2},
pages = {135--141},
year = {1984},
url = {https://doi.org/10.1109/TCAD.1984.1270067},
doi = {10.1109/TCAD.1984.1270067},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Barke84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/LuellauHB84,
author = {F. Luellau and
T. Hoepken and
Erich Barke},
editor = {Patricia H. Lambert and
Hillel Ofek and
Lawrence A. O'Neill and
Pat O. Pistilli and
Paul Losleben and
J. Daniel Nash and
Dennis W. Shaklee and
Bryan T. Preas and
Harvey N. Lerman},
title = {A technology independent block extraction algorithm},
booktitle = {Proceedings of the 21st Design Automation Conference, {DAC} '84, Albuquerque,
New Mexico, June 25-27, 1984},
pages = {610--615},
publisher = {{ACM/IEEE}},
year = {1984},
url = {http://dl.acm.org/citation.cfm?id=800862},
timestamp = {Thu, 12 Aug 2021 08:58:02 +0200},
biburl = {https://dblp.org/rec/conf/dac/LuellauHB84.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/Barke83,
author = {Erich Barke},
editor = {Charles E. Radke},
title = {A layout verification system for analog bipolar integrated circuits},
booktitle = {Proceedings of the 20th Design Automation Conference, {DAC} '83, Miami
Beach, Florida, USA, June 27-29, 1983},
pages = {353--359},
publisher = {{ACM/IEEE}},
year = {1983},
url = {http://dl.acm.org/citation.cfm?id=800688},
timestamp = {Wed, 29 Mar 2017 16:45:25 +0200},
biburl = {https://dblp.org/rec/conf/dac/Barke83.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-04-12 21:21 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
