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ORCIDBibTeX records: R. Iris Bahar
@article{DBLP:journals/cal/ThomasWIMCBIL24,
author = {Samuel Thomas and
Kidus Workneh and
Ange{-}Thierry Ishimwe and
Zack McKevitt and
Phaedra S. Curlin and
R. Iris Bahar and
Joseph Izraelevitz and
Tamara Lehman},
title = {Baobab Merkle Tree for Efficient Secure Memory},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {23},
number = {1},
pages = {33--36},
year = {2024},
url = {https://doi.org/10.1109/LCA.2024.3360709},
doi = {10.1109/LCA.2024.3360709},
timestamp = {Sat, 16 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ThomasWIMCBIL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asplos/ThomasWMILB24,
author = {Samuel Thomas and
Kidus Workneh and
Jac McCarty and
Joseph Izraelevitz and
Tamara Lehman and
R. Iris Bahar},
editor = {Rajiv Gupta and
Nael B. Abu{-}Ghazaleh and
Madan Musuvathi and
Dan Tsafrir},
title = {A Midsummer Night's Tree: Efficient and High Performance Secure {SCM}},
booktitle = {Proceedings of the 29th {ACM} International Conference on Architectural
Support for Programming Languages and Operating Systems, Volume 3,
{ASPLOS} 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024},
pages = {22--37},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3620666.3651354},
doi = {10.1145/3620666.3651354},
timestamp = {Sat, 04 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/ThomasWMILB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/biostec/BasuBCCB23,
author = {Semanti Basu and
Peter Bajcsy and
Thomas E. Cleveland IV and
Manuel J. Carrasco and
R. Iris Bahar},
editor = {Katja B{\"{u}}hler and
Ana L. N. Fred and
Hugo Gamboa},
title = {LipoPose: Adapting Cellpose to Lipid Nanoparticle Segmentation},
booktitle = {Proceedings of the 16th International Joint Conference on Biomedical
Engineering Systems and Technologies, {BIOSTEC} 2023, Volume 2: BIOIMAGING,
Lisbon, Portugal, February 16-18, 2023},
pages = {115--123},
publisher = {{SCITEPRESS}},
year = {2023},
url = {https://doi.org/10.5220/0011726800003414},
doi = {10.5220/0011726800003414},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/biostec/BasuBCCB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiuOGB22,
author = {Yanqi Liu and
Anthony Opipari and
Th{\'{e}}o Gu{\'{e}}rin and
Ruth Iris Bahar},
editor = {Michael Adler and
Paolo Ienne},
title = {Hardware Acceleration of Nonparametric Belief Propagation for Efficient
Robot Manipulation},
booktitle = {{FPGA} '22: The 2022 {ACM/SIGDA} International Symposium on Field-Programmable
Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022},
pages = {51},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3490422.3502329},
doi = {10.1145/3490422.3502329},
timestamp = {Mon, 14 Feb 2022 10:33:28 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LiuOGB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpec/ThomasCGPMHB22,
author = {Samuel Thomas and
Jiwon Choe and
Ofir Gordon and
Erez Petrank and
Tali Moreshet and
Maurice Herlihy and
R. Iris Bahar},
title = {Towards Hardware Accelerated Garbage Collection with Near-Memory Processing},
booktitle = {{IEEE} High Performance Extreme Computing Conference, {HPEC} 2022,
Waltham, MA, USA, September 19-23, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/HPEC55821.2022.9926323},
doi = {10.1109/HPEC55821.2022.9926323},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpec/ThomasCGPMHB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LiuOJB22,
author = {Yanqi Liu and
Anthony Opipari and
Odest Chadwicke Jenkins and
R. Iris Bahar},
editor = {Tulika Mitra and
Evangeline F. Y. Young and
Jinjun Xiong},
title = {A Reconfigurable Hardware Library for Robot Scene Perception},
booktitle = {Proceedings of the 41st {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2022, San Diego, California, USA, 30 October 2022
- 3 November 2022},
pages = {101:1--101:9},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3508352.3561110},
doi = {10.1145/3508352.3561110},
timestamp = {Tue, 06 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/LiuOJB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ipps/Bahar22,
author = {R. Iris Bahar},
title = {{EDAML} 2022 Invited Speaker 3: Scalable {ML} Architectures for Real-time
Energy-efficient Computing},
booktitle = {{IEEE} International Parallel and Distributed Processing Symposium,
{IPDPS} Workshops 2022, Lyon, France, May 30 - June 3, 2022},
pages = {1184},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/IPDPSW55747.2022.00196},
doi = {10.1109/IPDPSW55747.2022.00196},
timestamp = {Mon, 08 Aug 2022 16:44:20 +0200},
biburl = {https://dblp.org/rec/conf/ipps/Bahar22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/seed/NelsonIBL22,
author = {Casey Nelson and
Joseph Izraelevitz and
R. Iris Bahar and
Tamara Silbergleit Lehman},
title = {Eliminating Micro-Architectural Side-Channel Attacks using Near Memory
Processing},
booktitle = {2022 {IEEE} International Symposium on Secure and Private Execution
Environment Design (SEED), Storrs, CT, USA, September 26-27, 2022},
pages = {179--189},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/SEED55351.2022.00023},
doi = {10.1109/SEED55351.2022.00023},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/seed/NelsonIBL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spaa/ChoeCMHB22,
author = {Jiwon Choe and
Andrew Crotty and
Tali Moreshet and
Maurice Herlihy and
R. Iris Bahar},
editor = {Kunal Agrawal and
I{-}Ting Angelina Lee},
title = {HybriDS: Cache-Conscious Concurrent Data Structures for Near-Memory
Processing Architectures},
booktitle = {{SPAA} '22: 34th {ACM} Symposium on Parallelism in Algorithms and
Architectures, Philadelphia, PA, USA, July 11 - 14, 2022},
pages = {321--332},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3490148.3538591},
doi = {10.1145/3490148.3538591},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spaa/ChoeCMHB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SunJRDNMB21,
author = {Yi Sun and
Hui Jiang and
Lakshmi Ramakrishnan and
Jennifer Dworak and
Kundan Nepal and
Theodore W. Manikas and
R. Iris Bahar},
title = {Low Power Shift and Capture through ATPG-Configured Embedded Enable
Capture Bits},
booktitle = {{IEEE} International Test Conference, {ITC} 2021, Anaheim, CA, USA,
October 10-15, 2021},
pages = {319--323},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ITC50571.2021.00045},
doi = {10.1109/ITC50571.2021.00045},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SunJRDNMB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2110-04664,
author = {Semir Tatlidil and
Yanqi Liu and
Emily Sheetz and
R. Iris Bahar and
Steven A. Sloman},
title = {Using Human-Guided Causal Knowledge for More Generalized Robot Task
Planning},
journal = {CoRR},
volume = {abs/2110.04664},
year = {2021},
url = {https://arxiv.org/abs/2110.04664},
eprinttype = {arXiv},
eprint = {2110.04664},
timestamp = {Thu, 17 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2110-04664.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChowdhuryKZMBK20,
author = {Zamshed I. Chowdhury and
S. Karen Khatamifard and
Zhaoyong Zheng and
Tali Moreshet and
R. Iris Bahar and
Ulya R. Karpuzcu},
title = {Voltage Noise Mitigation With Barrier Approximation},
journal = {{IEEE} Comput. Archit. Lett.},
volume = {19},
number = {2},
pages = {155--158},
year = {2020},
url = {https://doi.org/10.1109/LCA.2020.3040088},
doi = {10.1109/LCA.2020.3040088},
timestamp = {Thu, 11 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cal/ChowdhuryKZMBK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/LiuCB20,
author = {Yanqi Liu and
Giuseppe Calderoni and
Ruth Iris Bahar},
editor = {Nele Mentens and
Leonel Sousa and
Pedro Trancoso and
Miquel Peric{\`{a}}s and
Ioannis Sourdis},
title = {Hardware Acceleration of Monte-Carlo Sampling for Energy Efficient
Robust Robot Manipulation},
booktitle = {30th International Conference on Field-Programmable Logic and Applications,
{FPL} 2020, Gothenburg, Sweden, August 31 - September 4, 2020},
pages = {284--290},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/FPL50879.2020.00054},
doi = {10.1109/FPL50879.2020.00054},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/fpl/LiuCB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LiuDCB20,
author = {Yanqi Liu and
Can Eren Derman and
Giuseppe Calderoni and
R. Iris Bahar},
title = {Hardware Acceleration of Robot Scene Perception Algorithms},
booktitle = {{IEEE/ACM} International Conference On Computer Aided Design, {ICCAD}
2020, San Diego, CA, USA, November 2-5, 2020},
pages = {164:1--164:8},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1145/3400302.3415766},
doi = {10.1145/3400302.3415766},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/LiuDCB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2005-01588,
author = {R. Iris Bahar and
Alex K. Jones and
Srinivas Katkoori and
Patrick H. Madden and
Diana Marculescu and
Igor L. Markov},
title = {Workshops on Extreme Scale Design Automation {(ESDA)} Challenges and
Opportunities for 2025 and Beyond},
journal = {CoRR},
volume = {abs/2005.01588},
year = {2020},
url = {https://arxiv.org/abs/2005.01588},
eprinttype = {arXiv},
eprint = {2005.01588},
timestamp = {Fri, 08 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2005-01588.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2007-07425,
author = {Yanqi Liu and
Giuseppe Calderoni and
R. Iris Bahar},
title = {Hardware Acceleration of Monte-Carlo Sampling for Energy Efficient
Robust Robot Manipulation},
journal = {CoRR},
volume = {abs/2007.07425},
year = {2020},
url = {https://arxiv.org/abs/2007.07425},
eprinttype = {arXiv},
eprint = {2007.07425},
timestamp = {Tue, 21 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2007-07425.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/Bahar19,
author = {R. Iris Bahar},
title = {Conference Reports: Recap of the 37th Edition of the International
Conference on Computer-Aided Design {(ICCAD} 2018)},
journal = {{IEEE} Des. Test},
volume = {36},
number = {2},
pages = {98--99},
year = {2019},
url = {https://doi.org/10.1109/MDAT.2019.2891761},
doi = {10.1109/MDAT.2019.2891761},
timestamp = {Fri, 13 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/Bahar19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/SunZJNDMB19,
author = {Yi Sun and
Fanchen Zhang and
Hui Jiang and
Kundan Nepal and
Jennifer Dworak and
Theodore W. Manikas and
R. Iris Bahar},
title = {Repurposing FPGAs for Tester Design to Enhance Field-Testing in a
3D Stack},
journal = {J. Electron. Test.},
volume = {35},
number = {6},
pages = {887--900},
year = {2019},
url = {https://doi.org/10.1007/s10836-019-05845-5},
doi = {10.1007/S10836-019-05845-5},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/SunZJNDMB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tetc/NepalHTBR19,
author = {Kumud Nepal and
Soheil Hashemi and
Hokchhay Tann and
R. Iris Bahar and
Sherief Reda},
title = {Automated High-Level Generation of Low-Power Approximate Computing
Circuits},
journal = {{IEEE} Trans. Emerg. Top. Comput.},
volume = {7},
number = {1},
pages = {18--30},
year = {2019},
url = {https://doi.org/10.1109/TETC.2016.2598283},
doi = {10.1109/TETC.2016.2598283},
timestamp = {Fri, 15 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tetc/NepalHTBR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/Papagiannopoulou19,
author = {Dimitra Papagiannopoulou and
Sungseob Whang and
Tali Moreshet and
R. Iris Bahar},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {IgnoreTM: Opportunistically Ignoring Timing Violations for Energy
Savings using {HTM}},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {1571--1574},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8715139},
doi = {10.23919/DATE.2019.8715139},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/Papagiannopoulou19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/green/Bahar19,
author = {Iris Bahar},
title = {Energy-efficient and Sustainable Computing across the Hardware/Software
Stack},
booktitle = {Tenth International Green and Sustainable Computing Conference, {IGSC}
2019, Alexandria, VA, USA, October 21-24, 2019},
pages = {1},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IGSC48788.2019.8957191},
doi = {10.1109/IGSC48788.2019.8957191},
timestamp = {Tue, 04 Feb 2020 18:04:59 +0100},
biburl = {https://dblp.org/rec/conf/green/Bahar19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icecsys/SunJRSNDMB19,
author = {Yi Sun and
Hui Jiang and
Lakshmi Ramakrishnan and
Matan Segal and
Kundan Nepal and
Jennifer Dworak and
Theodore W. Manikas and
R. Iris Bahar},
title = {Test Architecture for Fine Grained Capture Power Reduction},
booktitle = {26th {IEEE} International Conference on Electronics, Circuits and
Systems, {ICECS} 2019, Genoa, Italy, November 27-29, 2019},
pages = {558--561},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ICECS46596.2019.8964790},
doi = {10.1109/ICECS46596.2019.8964790},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/icecsys/SunJRSNDMB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iiswc/ChowdhuryKZMBK19,
author = {Zamshed I. Chowdhury and
S. Karen Khatamifard and
Zhaoyong Zheng and
Tali Moreshet and
R. Iris Bahar and
Ulya R. Karpuzcu},
title = {Barrier Synchronization vs. Voltage Noise: {A} Quantitative Analysis},
booktitle = {{IEEE} International Symposium on Workload Characterization, {IISWC}
2019, Orlando, FL, USA, November 3-5, 2019},
pages = {263--267},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IISWC47752.2019.9041950},
doi = {10.1109/IISWC47752.2019.9041950},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iiswc/ChowdhuryKZMBK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iros/ChenCSYLBJ19,
author = {Xiaotong Chen and
Rui Chen and
Zhiqiang Sui and
Zhefan Ye and
Yanqi Liu and
R. Iris Bahar and
Odest Chadwicke Jenkins},
title = {{GRIP:} Generative Robust Inference and Perception for Semantic Robot
Manipulation in Adversarial Environments},
booktitle = {2019 {IEEE/RSJ} International Conference on Intelligent Robots and
Systems, {IROS} 2019, Macau, SAR, China, November 3-8, 2019},
pages = {3988--3995},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IROS40897.2019.8967983},
doi = {10.1109/IROS40897.2019.8967983},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iros/ChenCSYLBJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/memsys/ChoeMBH19,
author = {Jiwon Choe and
Tali Moreshet and
R. Iris Bahar and
Maurice Herlihy},
title = {Attacking memory-hard scrypt with near-data-processing},
booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
2019, Washington, DC, USA, September 30 - October 03, 2019},
pages = {33--37},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3357526.3357570},
doi = {10.1145/3357526.3357570},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/memsys/ChoeMBH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spaa/ChoeHMHB19,
author = {Jiwon Choe and
Amy Huang and
Tali Moreshet and
Maurice Herlihy and
R. Iris Bahar},
editor = {Christian Scheideler and
Petra Berenbrink},
title = {Concurrent Data Structures with Near-Data-Processing: an Architecture-Aware
Implementation},
booktitle = {The 31st {ACM} on Symposium on Parallelism in Algorithms and Architectures,
{SPAA} 2019, Phoenix, AZ, USA, June 22-24, 2019},
pages = {297--308},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3323165.3323191},
doi = {10.1145/3323165.3323191},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/spaa/ChoeHMHB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BaharKM19,
author = {R. Iris Bahar and
Ulya R. Karpuzcu and
Sasa Misailovic},
title = {Special Session: Does Approximation Make Testing Harder (or Easier)?},
booktitle = {37th {IEEE} {VLSI} Test Symposium, {VTS} 2019, Monterey, CA, USA,
April 23-25, 2019},
pages = {1--9},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/VTS.2019.8758649},
doi = {10.1109/VTS.2019.8758649},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/BaharKM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asplos/2019,
editor = {Iris Bahar and
Maurice Herlihy and
Emmett Witchel and
Alvin R. Lebeck},
title = {Proceedings of the Twenty-Fourth International Conference on Architectural
Support for Programming Languages and Operating Systems, {ASPLOS}
2019, Providence, RI, USA, April 13-17, 2019},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3297858},
doi = {10.1145/3297858},
isbn = {978-1-4503-6240-5},
timestamp = {Sun, 07 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asplos/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-1903-08352,
author = {Xiaotong Chen and
Rui Chen and
Zhiqiang Sui and
Zhefan Ye and
Yanqi Liu and
R. Iris Bahar and
Odest Chadwicke Jenkins},
title = {{GRIP:} Generative Robust Inference and Perception for Semantic Robot
Manipulation in Adversarial Environments},
journal = {CoRR},
volume = {abs/1903.08352},
year = {2019},
url = {http://arxiv.org/abs/1903.08352},
eprinttype = {arXiv},
eprint = {1903.08352},
timestamp = {Sat, 23 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-1903-08352.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/ParameswaranBP18,
author = {Sri Parameswaran and
R. Iris Bahar and
David Z. Pan},
title = {Conference Reports: Report on the 2017 International Conference on
Computer-Aided Design {(ICCAD)}},
journal = {{IEEE} Des. Test},
volume = {35},
number = {2},
pages = {101--102},
year = {2018},
url = {https://doi.org/10.1109/MDAT.2018.2799991},
doi = {10.1109/MDAT.2018.2799991},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/ParameswaranBP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ijpp/Papagiannopoulou18,
author = {Dimitra Papagiannopoulou and
Andrea Marongiu and
Tali Moreshet and
Luca Benini and
Maurice Herlihy and
R. Iris Bahar},
title = {Hardware Transactional Memory Exploration in Coherence-Free Many-Core
Architectures},
journal = {Int. J. Parallel Program.},
volume = {46},
number = {6},
pages = {1304--1328},
year = {2018},
url = {https://doi.org/10.1007/s10766-018-0569-7},
doi = {10.1007/S10766-018-0569-7},
timestamp = {Wed, 01 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ijpp/Papagiannopoulou18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/HarrisB18,
author = {Christopher B. Harris and
R. Iris Bahar},
title = {Towards the Simulation Based Design and Validation of Mobile Robotic
Cyber-Physical Systems},
journal = {J. Low Power Electron.},
volume = {14},
number = {1},
pages = {148--156},
year = {2018},
url = {https://doi.org/10.1166/jolpe.2018.1540},
doi = {10.1166/JOLPE.2018.1540},
timestamp = {Fri, 22 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jolpe/HarrisB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DonatoBPZ18,
author = {Marco Donato and
R. Iris Bahar and
William R. Patterson and
Alexander Zaslavsky},
title = {A Sub-Threshold Noise Transient Simulator Based on Integrated Random
Telegraph and Thermal Noise Modeling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {3},
pages = {643--656},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2017.2717705},
doi = {10.1109/TCAD.2017.2717705},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/DonatoBPZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/LiuCBSYLJ18,
author = {Yanqi Liu and
Alessandro Costantini and
R. Iris Bahar and
Zhiqiang Sui and
Zhefan Ye and
Shiyang Lu and
Odest Chadwicke Jenkins},
editor = {Iris Bahar},
title = {Robust object estimation using generative-discriminative inference
for secure robotics applications},
booktitle = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2018, San Diego, CA, USA, November 05-08, 2018},
pages = {75},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240765.3243493},
doi = {10.1145/3240765.3243493},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/iccad/LiuCBSYLJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iccad/2018,
editor = {Iris Bahar},
title = {Proceedings of the International Conference on Computer-Aided Design,
{ICCAD} 2018, San Diego, CA, USA, November 05-08, 2018},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3240765},
doi = {10.1145/3240765},
isbn = {978-1-4503-5950-4},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Papagiannopoulou17,
author = {Dimitra Papagiannopoulou and
Andrea Marongiu and
Tali Moreshet and
Maurice Herlihy and
R. Iris Bahar},
title = {Edge-TM: Exploiting Transactional Memory for Error Tolerance and Energy
Efficiency},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {16},
number = {5s},
pages = {153:1--153:18},
year = {2017},
url = {https://doi.org/10.1145/3126556},
doi = {10.1145/3126556},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/Papagiannopoulou17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/TannHBR17,
author = {Hokchhay Tann and
Soheil Hashemi and
R. Iris Bahar and
Sherief Reda},
title = {Hardware-Software Codesign of Accurate, Multiplier-free Deep Neural
Networks},
booktitle = {Proceedings of the 54th Annual Design Automation Conference, {DAC}
2017, Austin, TX, USA, June 18-22, 2017},
pages = {28:1--28:6},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3061639.3062259},
doi = {10.1145/3061639.3062259},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/TannHBR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/HashemiATBR17,
author = {Soheil Hashemi and
Nicholas Anthony and
Hokchhay Tann and
R. Iris Bahar and
Sherief Reda},
editor = {David Atienza and
Giorgio Di Natale},
title = {Understanding the impact of precision quantization on the accuracy
and energy of neural networks},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {1474--1479},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927224},
doi = {10.23919/DATE.2017.7927224},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/HashemiATBR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpec/WhangRPMB17,
author = {Sungseob Whang and
Tymani Rachford and
Dimitra Papagiannopoulou and
Tali Moreshet and
R. Iris Bahar},
title = {Evaluating critical bits in arithmetic operations due to timing violations},
booktitle = {2017 {IEEE} High Performance Extreme Computing Conference, {HPEC}
2017, Waltham, MA, USA, September 12-14, 2017},
pages = {1--7},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/HPEC.2017.8091090},
doi = {10.1109/HPEC.2017.8091090},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpec/WhangRPMB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/PicardoDB17,
author = {Christopher B. Picardo and
Justin G. R. Delva and
R. Iris Bahar},
title = {Comprehensive comparison of gradient-based cross-spectral stereo matching
generated disparity maps},
booktitle = {{IEEE} 60th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2017, Boston, MA, USA, August 6-9, 2017},
pages = {200--204},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/MWSCAS.2017.8052895},
doi = {10.1109/MWSCAS.2017.8052895},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/PicardoDB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ngcas/HarrisB17,
author = {Christopher B. Harris and
R. Iris Bahar},
title = {A Research Tool for the Power and Performance Analysis of Sensor-Based
Mobile Robots},
booktitle = {New Generation of CAS, {NGCAS} 2017, Genova, Italy, September 6-9,
2017},
pages = {25--28},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/NGCAS.2017.25},
doi = {10.1109/NGCAS.2017.25},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ngcas/HarrisB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/TannHBR17,
author = {Hokchhay Tann and
Soheil Hashemi and
Iris Bahar and
Sherief Reda},
title = {Hardware-Software Codesign of Accurate, Multiplier-free Deep Neural
Networks},
journal = {CoRR},
volume = {abs/1705.04288},
year = {2017},
url = {http://arxiv.org/abs/1705.04288},
eprinttype = {arXiv},
eprint = {1705.04288},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/TannHBR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cases/CarlePMMHB16,
author = {Thomas Carle and
Dimitra Papagiannopoulou and
Tali Moreshet and
Andrea Marongiu and
Maurice Herlihy and
R. Iris Bahar},
title = {Thrifty-malloc: {A} {HW/SW} codesign for the dynamic management of
hardware transactional memory in embedded multicore systems},
booktitle = {2016 International Conference on Compilers, Architectures and Synthesis
for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA,
October 1-7, 2016},
pages = {20:1--20:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968455.2968513},
doi = {10.1145/2968455.2968513},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cases/CarlePMMHB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/TannHBR16,
author = {Hokchhay Tann and
Soheil Hashemi and
R. Iris Bahar and
Sherief Reda},
title = {Runtime configurable deep neural networks for energy-accuracy trade-off},
booktitle = {Proceedings of the Eleventh {IEEE/ACM/IFIP} International Conference
on Hardware/Software Codesign and System Synthesis, {CODES} 2016,
Pittsburgh, Pennsylvania, USA, October 1-7, 2016},
pages = {34:1--34:10},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2968456.2968458},
doi = {10.1145/2968456.2968458},
timestamp = {Sun, 08 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/codes/TannHBR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/DonatoBPZ16,
author = {Marco Donato and
R. Iris Bahar and
William R. Patterson and
Alexander Zaslavsky},
title = {A fast simulator for the analysis of sub-threshold thermal noise transients},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {56:1--56:6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2897960},
doi = {10.1145/2897937.2897960},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/DonatoBPZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/HashemiBR16,
author = {Soheil Hashemi and
R. Iris Bahar and
Sherief Reda},
title = {A low-power dynamic divider for approximate applications},
booktitle = {Proceedings of the 53rd Annual Design Automation Conference, {DAC}
2016, Austin, TX, USA, June 5-9, 2016},
pages = {105:1--105:6},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2897937.2897965},
doi = {10.1145/2897937.2897965},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/HashemiBR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpl/UluselPHRB16,
author = {Onur Ulusel and
Christopher B. Picardo and
Christopher B. Harris and
Sherief Reda and
R. Iris Bahar},
editor = {Paolo Ienne and
Walid A. Najjar and
Jason Helge Anderson and
Philip Brisk and
Walter Stechele},
title = {Hardware acceleration of feature detection and description algorithms
on low-power embedded platforms},
booktitle = {26th International Conference on Field Programmable Logic and Applications,
{FPL} 2016, Lausanne, Switzerland, August 29 - September 2, 2016},
pages = {1--9},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/FPL.2016.7577310},
doi = {10.1109/FPL.2016.7577310},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fpl/UluselPHRB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HanDBZP16,
author = {Xijing Han and
Marco Donato and
R. Iris Bahar and
Alexander Zaslavsky and
William R. Patterson},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Design of Error-Resilient Logic Gates with Reinforcement Using Implications},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {191--196},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902983},
doi = {10.1145/2902961.2902983},
timestamp = {Wed, 10 Mar 2021 14:55:38 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HanDBZP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/natw/ZhangSSNDMGBCP16,
author = {Fanchen Zhang and
Yi Sun and
Xi Shen and
Kundan Nepal and
Jennifer Dworak and
Theodore W. Manikas and
Ping Gui and
R. Iris Bahar and
Al Crouch and
John C. Potter},
title = {Using Existing Reconfigurable Logic in 3D Die Stacks for Test},
booktitle = {25th {IEEE} North Atlantic Test Workshop, {NATW} 2016, Providence,
RI, USA, May 9-11, 2016},
pages = {46--52},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/NATW.2016.15},
doi = {10.1109/NATW.2016.15},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/natw/ZhangSSNDMGBCP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/TannHBR16,
author = {Hokchhay Tann and
Soheil Hashemi and
R. Iris Bahar and
Sherief Reda},
title = {Runtime Configurable Deep Neural Networks for Energy-Accuracy Trade-off},
journal = {CoRR},
volume = {abs/1607.05418},
year = {2016},
url = {http://arxiv.org/abs/1607.05418},
eprinttype = {arXiv},
eprint = {1607.05418},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/TannHBR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/HashemiATBR16,
author = {Soheil Hashemi and
Nicholas Anthony and
Hokchhay Tann and
R. Iris Bahar and
Sherief Reda},
title = {Understanding the Impact of Precision Quantization on the Accuracy
and Energy of Neural Networks},
journal = {CoRR},
volume = {abs/1612.03940},
year = {2016},
url = {http://arxiv.org/abs/1612.03940},
eprinttype = {arXiv},
eprint = {1612.03940},
timestamp = {Mon, 13 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/HashemiATBR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NepalADBMG15,
author = {Kundan Nepal and
Soha Alhelaly and
Jennifer Dworak and
R. Iris Bahar and
Theodore W. Manikas and
Ping Guikundan},
title = {Repairing a 3-D Die-Stack Using Available Programmable Logic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {5},
pages = {849--861},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2399441},
doi = {10.1109/TCAD.2015.2399441},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NepalADBMG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tecs/Papagiannopoulou15,
author = {Dimitra Papagiannopoulou and
Giuseppe Capodanno and
Tali Moreshet and
Maurice Herlihy and
R. Iris Bahar},
title = {Energy-Efficient and High-Performance Lock Speculation Hardware for
Embedded Multicore Systems},
journal = {{ACM} Trans. Embed. Comput. Syst.},
volume = {14},
number = {3},
pages = {51:1--51:27},
year = {2015},
url = {https://doi.org/10.1145/2700097},
doi = {10.1145/2700097},
timestamp = {Tue, 08 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tecs/Papagiannopoulou15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BaharJX15,
author = {R. Iris Bahar and
Alex K. Jones and
Yuan Xie},
title = {Introduction to the Special Issue on Reliable, Resilient, and Robust
Design of Circuits and Systems},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {20},
number = {4},
pages = {59:1--59:2},
year = {2015},
url = {https://doi.org/10.1145/2796541},
doi = {10.1145/2796541},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BaharJX15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Papagiannopoulou15,
author = {Dimitra Papagiannopoulou and
Andrea Marongiu and
Tali Moreshet and
Luca Benini and
Maurice Herlihy and
R. Iris Bahar},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Playing with Fire: Transactional Memory Revisited for Error-Resilient
and Energy-Efficient MPSoC Execution},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {9--14},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742090},
doi = {10.1145/2742060.2742090},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Papagiannopoulou15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DonatoBPZ15,
author = {Marco Donato and
R. Iris Bahar and
William R. Patterson and
Alexander Zaslavsky},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {A Simulation Framework for Analyzing Transient Effects Due to Thermal
Noise in Sub-Threshold Circuits},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {45--50},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742066},
doi = {10.1145/2742060.2742066},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DonatoBPZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/HashemiBR15,
author = {Soheil Hashemi and
R. Iris Bahar and
Sherief Reda},
editor = {Diana Marculescu and
Frank Liu},
title = {{DRUM:} {A} Dynamic Range Unbiased Multiplier for Approximate Applications},
booktitle = {Proceedings of the {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 2015, Austin, TX, USA, November 2-6, 2015},
pages = {418--425},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ICCAD.2015.7372600},
doi = {10.1109/ICCAD.2015.7372600},
timestamp = {Mon, 26 Jun 2023 16:43:56 +0200},
biburl = {https://dblp.org/rec/conf/iccad/HashemiBR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nas/WangB15,
author = {Jun Wang and
Iris Bahar},
title = {Message from the program co-chairs},
booktitle = {10th {IEEE} International Conference on Networking, Architecture and
Storage, {NAS} 2015, Boston, MA, USA, August 6-7, 2015},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/NAS.2015.7255189},
doi = {10.1109/NAS.2015.7255189},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nas/WangB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/trets/UluselNBR14,
author = {Onur Ulusel and
Kumud Nepal and
R. Iris Bahar and
Sherief Reda},
title = {Fast Design Exploration for Performance, Power and Accuracy Tradeoffs
in FPGA-Based Accelerators},
journal = {{ACM} Trans. Reconfigurable Technol. Syst.},
volume = {7},
number = {1},
pages = {4:1--4:22},
year = {2014},
url = {https://doi.org/10.1145/2567661},
doi = {10.1145/2567661},
timestamp = {Fri, 24 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/trets/UluselNBR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NepalLBR14,
author = {Kumud Nepal and
Yueting Li and
R. Iris Bahar and
Sherief Reda},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {{ABACUS:} {A} technique for automated behavioral synthesis of approximate
computing circuits},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.374},
doi = {10.7873/DATE.2014.374},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/NepalLBR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/samos/PapagiannopoulouMMBHB14,
author = {Dimitra Papagiannopoulou and
Tali Moreshet and
Andrea Marongiu and
Luca Benini and
Maurice Herlihy and
R. Iris Bahar},
title = {Speculative synchronization for coherence-free embedded {NUMA} architectures},
booktitle = {XIVth International Conference on Embedded Computer Systems: Architectures,
Modeling, and Simulation, {SAMOS} 2014, Agios Konstantinos, Samos,
Greece, July 14-17, 2014},
pages = {99--106},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/SAMOS.2014.6893200},
doi = {10.1109/SAMOS.2014.6893200},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/samos/PapagiannopoulouMMBHB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dft/NepalSDMB13,
author = {Kundan Nepal and
Xi Shen and
Jennifer Dworak and
Theodore W. Manikas and
R. Iris Bahar},
title = {Built-in Self-Repair in a 3D die stack using programmable logic},
booktitle = {2013 {IEEE} International Symposium on Defect and Fault Tolerance
in {VLSI} and Nanotechnology Systems, {DFTS} 2013, New York City,
NY, USA, October 2-4, 2013},
pages = {243--248},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/DFT.2013.6653613},
doi = {10.1109/DFT.2013.6653613},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dft/NepalSDMB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/PapagiannopoulouBMHMB13,
author = {Dimitra Papagiannopoulou and
R. Iris Bahar and
Tali Moreshet and
Maurice Herlihy and
Andrea Marongiu and
Luca Benini},
editor = {Masoud Daneshtalab and
Ahmed Hemani and
Maurizio Palesi},
title = {Transparent and energy-efficient speculation on {NUMA} architectures
for embedded MPSoCs},
booktitle = {Proceedings of the 1st International Workshop on Many-core Embedded
Systems 2013, MES'2013, Held in conjunction with the 40th Annual {IEEE/ACM}
International Symposium on Computer Architecture, {ISCA} 2013, June
24, 2013},
pages = {58--61},
publisher = {{ACM}},
year = {2013},
url = {https://doi.org/10.1145/2489068.2489078},
doi = {10.1145/2489068.2489078},
timestamp = {Fri, 09 Jul 2021 15:51:20 +0200},
biburl = {https://dblp.org/rec/conf/isca/PapagiannopoulouBMHMB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/PapagiannopoulouPB13,
author = {Dimitra Papagiannopoulou and
Patipan Prasertsom and
R. Iris Bahar},
title = {Flexible data allocation for scratch-pad memories to reduce {NBTI}
effects},
booktitle = {International Symposium on Quality Electronic Design, {ISQED} 2013,
Santa Clara, CA, USA, March 4-6, 2013},
pages = {60--67},
publisher = {{IEEE}},
year = {2013},
url = {https://doi.org/10.1109/ISQED.2013.6523591},
doi = {10.1109/ISQED.2013.6523591},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/PapagiannopoulouPB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mse/BaharJKMMM13,
author = {R. Iris Bahar and
Alex K. Jones and
Srinivas Katkoori and
Patrick H. Madden and
Diana Marculescu and
Igor L. Markov},
title = {"Scaling" the impact of {EDA} education Preliminary findings
from the {CCC} workshop series on extreme scale design automation},
booktitle = {2013 {IEEE} International Conference on Microelectronic Systems Education,
{MSE} 2013, Austin, TX, USA, June 2-3, 2013},
pages = {64--67},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/MSE.2013.6566706},
doi = {10.1109/MSE.2013.6566706},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mse/BaharJKMMM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/FerriPBC12,
author = {Cesare Ferri and
Dimitra Papagiannopoulou and
R. Iris Bahar and
Andrea Calimera},
title = {NBTI-Aware Data Allocation Strategies for Scratchpad Based Embedded
Systems},
journal = {J. Electron. Test.},
volume = {28},
number = {3},
pages = {349--363},
year = {2012},
url = {https://doi.org/10.1007/s10836-012-5295-2},
doi = {10.1007/S10836-012-5295-2},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/FerriPBC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/DworakNASIB12,
author = {Jennifer Dworak and
Kundan Nepal and
Nuno Alves and
Yiwen Shi and
Nicholas Imbriglia and
R. Iris Bahar},
title = {Using implications to choose tests through suspect fault identification},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {18},
number = {1},
pages = {14:1--14:19},
year = {2012},
url = {https://doi.org/10.1145/2390191.2390205},
doi = {10.1145/2390191.2390205},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/DworakNASIB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeMB12,
author = {Roto Le and
Joseph L. Mundy and
R. Iris Bahar},
title = {High Performance Parallel {JPEG2000} Streaming Decoder Using {GPGPU-CPU}
Heterogeneous System},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {16--23},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.34},
doi = {10.1109/ASAP.2012.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeMB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fccm/NepalUBR12,
author = {Kumud Nepal and
Onur Ulusel and
R. Iris Bahar and
Sherief Reda},
title = {Fast Multi-Objective Algorithmic Design Co-Exploration for FPGA-based
Accelerators},
booktitle = {2012 {IEEE} 20th Annual International Symposium on Field-Programmable
Custom Computing Machines, {FCCM} 2012, 29 April - 1 May 2012, Toronto,
Ontario, Canada},
pages = {65--68},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/FCCM.2012.21},
doi = {10.1109/FCCM.2012.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/fccm/NepalUBR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DonatoCJBPZM12,
author = {Marco Donato and
Fabio Cremona and
Warren Jin and
R. Iris Bahar and
William R. Patterson and
Alexander Zaslavsky and
Joseph L. Mundy},
editor = {Erik Brunvard and
Ken Stevens and
Joseph R. Cavallaro and
Tong Zhang},
title = {A noise-immune sub-threshold circuit design based on selective use
of Schmitt-trigger logic},
booktitle = {Great Lakes Symposium on {VLSI} 2012, GLSVLSI'12, Salt Lake City,
UT, USA, May 3-4, 2012},
pages = {39--44},
publisher = {{ACM}},
year = {2012},
url = {https://doi.org/10.1145/2206781.2206792},
doi = {10.1145/2206781.2206792},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DonatoCJBPZM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/TadesseBG11,
author = {Desta Tadesse and
R. Iris Bahar and
Joel Grodstein},
title = {Test Vector Generation for Post-Silicon Delay Testing Using SAT-Based
Decision Problems},
journal = {J. Electron. Test.},
volume = {27},
number = {2},
pages = {123--136},
year = {2011},
url = {https://doi.org/10.1007/s10836-011-5205-z},
doi = {10.1007/S10836-011-5205-Z},
timestamp = {Fri, 11 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/et/TadesseBG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/codes/FerriMLBMBH11,
author = {Cesare Ferri and
Andrea Marongiu and
Benjamin Lipton and
R. Iris Bahar and
Tali Moreshet and
Luca Benini and
Maurice Herlihy},
editor = {Robert P. Dick and
Jan Madsen},
title = {SoC-TM: integrated {HW/SW} support for transactional memory programming
on embedded MPSoCs},
booktitle = {Proceedings of the 9th International Conference on Hardware/Software
Codesign and System Synthesis, {CODES+ISSS} 2011, part of ESWeek '11
Seventh Embedded Systems Week, Taipei, Taiwan, 9-14 October, 2011},
pages = {39--48},
publisher = {{ACM}},
year = {2011},
url = {https://doi.org/10.1145/2039370.2039380},
doi = {10.1145/2039370.2039380},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/codes/FerriMLBMBH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/AlvesSIDNB11,
author = {Nuno Alves and
Yiwen Shi and
Nicholas Imbriglia and
Jennifer Dworak and
Kundan Nepal and
R. Iris Bahar},
title = {Dynamic Test Set Selection Using Implication-Based On-Chip Diagnosis},
booktitle = {16th European Test Symposium, {ETS} 2011, Trondheim, Norway, May 23-27,
2011},
pages = {211},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ETS.2011.59},
doi = {10.1109/ETS.2011.59},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/ets/AlvesSIDNB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/latw/FerriPBC11,
author = {Cesare Ferri and
Dimitra Papagiannopoulou and
R. Iris Bahar and
Andrea Calimera},
title = {NBTI-aware data allocation strategies for scratchpad memory based
embedded systems},
booktitle = {12th Latin American Test Workshop, {LATW} 2011, Beach of Porto de
Galinhas, Brazil, March 27-30, 2011},
pages = {1--6},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/LATW.2011.5985932},
doi = {10.1109/LATW.2011.5985932},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/latw/FerriPBC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/sasp/LeBM11,
author = {Roto Le and
R. Iris Bahar and
Joseph L. Mundy},
title = {A novel parallel Tier-1 coder for {JPEG2000} using GPUs},
booktitle = {{IEEE} 9th Symposium on Application Specific Processors, {SASP} 2011,
San Diego, CA, USA, June 5-6, 2011},
pages = {129--136},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/SASP.2011.5941091},
doi = {10.1109/SASP.2011.5941091},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/sasp/LeBM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AlvesSDBN11,
author = {Nuno Alves and
Yiwen Shi and
Jennifer Dworak and
R. Iris Bahar and
Kundan Nepal},
title = {Enhancing online error detection through area-efficient multi-site
implications},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {241--246},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783728},
doi = {10.1109/VTS.2011.5783728},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AlvesSDBN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jpdc/FerriWMBH10,
author = {Cesare Ferri and
Samantha Wood and
Tali Moreshet and
R. Iris Bahar and
Maurice Herlihy},
title = {Embedded-TM: Energy and complexity-effective hardware transactional
memory for embedded multicore systems},
journal = {J. Parallel Distributed Comput.},
volume = {70},
number = {10},
pages = {1042--1052},
year = {2010},
url = {https://doi.org/10.1016/j.jpdc.2010.02.003},
doi = {10.1016/J.JPDC.2010.02.003},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jpdc/FerriWMBH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/CalimeraBMP10,
author = {Andrea Calimera and
R. Iris Bahar and
Enrico Macii and
Massimo Poncino},
title = {Dual-V\({}_{\mbox{t}}\) assignment policies in ITD-aware synthesis},
journal = {Microelectron. J.},
volume = {41},
number = {9},
pages = {547--553},
year = {2010},
url = {https://doi.org/10.1016/j.mejo.2009.12.004},
doi = {10.1016/J.MEJO.2009.12.004},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/CalimeraBMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AlvesBNDB10,
author = {Nuno Alves and
Alison Buben and
Kundan Nepal and
Jennifer Dworak and
R. Iris Bahar},
title = {A Cost Effective Approach for Online Error Detection Using Invariant
Relationships},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {29},
number = {5},
pages = {788--801},
year = {2010},
url = {https://doi.org/10.1109/TCAD.2010.2043590},
doi = {10.1109/TCAD.2010.2043590},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AlvesBNDB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/CalimeraBMP10,
author = {Andrea Calimera and
R. Iris Bahar and
Enrico Macii and
Massimo Poncino},
title = {Temperature-Insensitive Dual- V\({}_{\mbox{th}}\) Synthesis for Nanometer
{CMOS} Technologies Under Inverse Temperature Dependence},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {18},
number = {11},
pages = {1608--1620},
year = {2010},
url = {https://doi.org/10.1109/TVLSI.2009.2025884},
doi = {10.1109/TVLSI.2009.2025884},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/CalimeraBMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlvesNDB10,
author = {Nuno Alves and
Kundan Nepal and
Jennifer Dworak and
R. Iris Bahar},
editor = {R. Iris Bahar and
Fabrizio Lombardi and
David Atienza and
Erik Brunvand},
title = {Improving the testability and reliability of sequential circuits with
invariant logic},
booktitle = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
Providence, Rhode Island, USA, May 16-18 2010},
pages = {131--134},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1785481.1785513},
doi = {10.1145/1785481.1785513},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AlvesNDB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JannatySBMPZ10,
author = {Pooya Jannaty and
Florian C. Sabou and
R. Iris Bahar and
Joseph L. Mundy and
William R. Patterson and
Alexander Zaslavsky},
editor = {R. Iris Bahar and
Fabrizio Lombardi and
David Atienza and
Erik Brunvand},
title = {Numerical queue solution of thermal noise-induced soft errors in subthreshold
{CMOS} devices},
booktitle = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
Providence, Rhode Island, USA, May 16-18 2010},
pages = {281--286},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1785481.1785547},
doi = {10.1145/1785481.1785547},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JannatySBMPZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hipeac/FerriWMBH10,
author = {Cesare Ferri and
Samantha Wood and
Tali Moreshet and
R. Iris Bahar and
Maurice Herlihy},
editor = {Yale N. Patt and
Pierfrancesco Foglia and
Evelyn Duesterwald and
Paolo Faraboschi and
Xavier Martorell},
title = {Energy and Throughput Efficient Transactional Memory for Embedded
Multicore Systems},
booktitle = {High Performance Embedded Architectures and Compilers, 5th International
Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010. Proceedings},
series = {Lecture Notes in Computer Science},
volume = {5952},
pages = {50--65},
publisher = {Springer},
year = {2010},
url = {https://doi.org/10.1007/978-3-642-11515-8\_6},
doi = {10.1007/978-3-642-11515-8\_6},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hipeac/FerriWMBH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2010,
editor = {R. Iris Bahar and
Fabrizio Lombardi and
David Atienza and
Erik Brunvand},
title = {Proceedings of the 20th {ACM} Great Lakes Symposium on {VLSI} 2009,
Providence, Rhode Island, USA, May 16-18 2010},
publisher = {{ACM}},
year = {2010},
url = {https://doi.org/10.1145/1785481},
doi = {10.1145/1785481},
isbn = {978-1-4503-0012-4},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/nanoarch/2010,
editor = {Shamik Das and
Iris Bahar and
Michael T. Niemier},
title = {2010 {IEEE/ACM} International Symposium on Nanoscale Architectures,
{NANOARCH} 2010, Anaheim, CA, USA, June 17-18, 2010},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://ieeexplore.ieee.org/xpl/conhome/5506521/proceeding},
isbn = {978-1-4244-8020-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/nanoarch/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/Bahar09,
author = {R. Iris Bahar},
title = {Introduction to special section: Best of {NANOARCH} 2008},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {5},
number = {2},
pages = {6:1},
year = {2009},
url = {https://doi.org/10.1145/1543438.1543439},
doi = {10.1145/1543438.1543439},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jetc/Bahar09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/AlvesNDB09,
author = {Nuno Alves and
Kundan Nepal and
Jennifer Dworak and
R. Iris Bahar},
editor = {Luca Benini and
Giovanni De Micheli and
Bashir M. Al{-}Hashimi and
Wolfgang M{\"{u}}ller},
title = {Detecting errors using multi-cycle invariance information},
booktitle = {Design, Automation and Test in Europe, {DATE} 2009, Nice, France,
April 20-24, 2009},
pages = {791--796},
publisher = {{IEEE}},
year = {2009},
url = {https://doi.org/10.1109/DATE.2009.5090771},
doi = {10.1109/DATE.2009.5090771},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/AlvesNDB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LeRB09,
author = {Roto Le and
Sherief Reda and
R. Iris Bahar},
editor = {Paul Chow and
Peter Y. K. Cheung},
title = {High-performance, cost-effective heterogeneous 3D {FPGA} architectures},
booktitle = {Proceedings of the {ACM/SIGDA} 17th International Symposium on Field
Programmable Gate Arrays, {FPGA} 2009, Monterey, California, USA,
February 22-24, 2009},
pages = {286},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1508128.1508203},
doi = {10.1145/1508128.1508203},
timestamp = {Tue, 06 Nov 2018 16:58:23 +0100},
biburl = {https://dblp.org/rec/conf/fpga/LeRB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FerriBLP09,
author = {Cesare Ferri and
R. Iris Bahar and
Mirko Loghi and
Massimo Poncino},
editor = {Fabrizio Lombardi and
Sanjukta Bhanja and
Yehia Massoud and
R. Iris Bahar},
title = {Energy-optimal synchronization primitives for single-chip multi-processors},
booktitle = {Proceedings of the 19th {ACM} Great Lakes Symposium on {VLSI} 2009,
Boston Area, MA, USA, May 10-12 2009},
pages = {141--144},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1531542.1531578},
doi = {10.1145/1531542.1531578},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/FerriBLP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LeRB09,
author = {Roto Le and
Sherief Reda and
R. Iris Bahar},
editor = {Fabrizio Lombardi and
Sanjukta Bhanja and
Yehia Massoud and
R. Iris Bahar},
title = {High-performance, cost-effective heterogeneous 3D {FPGA} architectures},
booktitle = {Proceedings of the 19th {ACM} Great Lakes Symposium on {VLSI} 2009,
Boston Area, MA, USA, May 10-12 2009},
pages = {251--256},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1531542.1531603},
doi = {10.1145/1531542.1531603},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LeRB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/AlvesDBN09,
author = {Nuno Alves and
Jennifer Dworak and
R. Iris Bahar and
Kundan Nepal},
editor = {Jaijeet S. Roychowdhury},
title = {Compacting test vector sets via strategic use of implications},
booktitle = {2009 International Conference on Computer-Aided Design, {ICCAD} 2009,
San Jose, CA, USA, November 2-5, 2009},
pages = {83--88},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1687399.1687418},
doi = {10.1145/1687399.1687418},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccad/AlvesDBN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/RedaSB09,
author = {Sherief Reda and
Aung Si and
R. Iris Bahar},
editor = {J{\"{o}}rg Henkel and
Ali Keshavarzi and
Naehyuck Chang and
Tahir Ghani},
title = {Reducing the leakage and timing variability of 2D ICcs using 3D ICs},
booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics
and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
pages = {283--286},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1594233.1594303},
doi = {10.1145/1594233.1594303},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/RedaSB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/TadesseGB09,
author = {Desta Tadesse and
Joel Grodstein and
R. Iris Bahar},
editor = {Gordon W. Roberts and
Bill Eklow},
title = {AutoRex: An automated post-silicon clock tuning tool},
booktitle = {2009 {IEEE} International Test Conference, {ITC} 2009, Austin, TX,
USA, November 1-6, 2009},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/TEST.2009.5355650},
doi = {10.1109/TEST.2009.5355650},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/TadesseGB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2009,
editor = {Fabrizio Lombardi and
Sanjukta Bhanja and
Yehia Massoud and
R. Iris Bahar},
title = {Proceedings of the 19th {ACM} Great Lakes Symposium on {VLSI} 2009,
Boston Area, MA, USA, May 10-12 2009},
publisher = {{ACM}},
year = {2009},
url = {https://doi.org/10.1145/1531542},
doi = {10.1145/1531542},
isbn = {978-1-60558-522-2},
timestamp = {Wed, 24 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/BaharC08,
author = {R. Iris Bahar and
Krishnendu Chakrabarty},
title = {Introduction to joint {ACM} {JETC/TODAES} special issue on new, emerging,
and specialized technologies},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {4},
number = {2},
pages = {5:1--5:2},
year = {2008},
url = {https://doi.org/10.1145/1350763.1350765},
doi = {10.1145/1350763.1350765},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jetc/BaharC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/FerriRB08,
author = {Cesare Ferri and
Sherief Reda and
R. Iris Bahar},
title = {Parametric yield management for 3D ICs: Models and strategies for
improvement},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {4},
number = {4},
pages = {19:1--19:22},
year = {2008},
url = {https://doi.org/10.1145/1412587.1412592},
doi = {10.1145/1412587.1412592},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/FerriRB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jolpe/CalimeraDSSBMMP08,
author = {Andrea Calimera and
Karthik Duraisami and
Ashoka Visweswara Sathanur and
Prassanna Sithambaram and
R. Iris Bahar and
Alberto Macii and
Enrico Macii and
Massimo Poncino},
title = {Thermal-Aware Design Techniques for Nanometer {CMOS} Circuits},
journal = {J. Low Power Electron.},
volume = {4},
number = {3},
pages = {374--384},
year = {2008},
url = {https://doi.org/10.1166/jolpe.2008.190},
doi = {10.1166/JOLPE.2008.190},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jolpe/CalimeraDSSBMMP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BaharC08,
author = {R. Iris Bahar and
Krishnendu Chakrabarty},
title = {Introduction to joint {ACM} {JETC/TODAES} special issue on new, emerging,
and specialized technologies},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {13},
number = {2},
pages = {36:1--36:2},
year = {2008},
url = {https://doi.org/10.1145/1344418.1344432},
doi = {10.1145/1344418.1344432},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BaharC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CalimeraMPB08,
author = {Andrea Calimera and
Enrico Macii and
Massimo Poncino and
R. Iris Bahar},
editor = {Vijaykrishnan Narayanan and
Zhiyuan Yan and
Enrico Macii and
Sanjukta Bhanja},
title = {Temperature-insensitive synthesis using multi-vt libraries},
booktitle = {Proceedings of the 18th {ACM} Great Lakes Symposium on {VLSI} 2008,
Orlando, Florida, USA, May 4-6, 2008},
pages = {5--10},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1366110.1366116},
doi = {10.1145/1366110.1366116},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CalimeraMPB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FerriVMBH08,
author = {Cesare Ferri and
Amber Viescas and
Tali Moreshet and
R. Iris Bahar and
Maurice Herlihy},
editor = {Vijaykrishnan Narayanan and
Zhiyuan Yan and
Enrico Macii and
Sanjukta Bhanja},
title = {Energy efficient synchronization techniques for embedded architectures},
booktitle = {Proceedings of the 18th {ACM} Great Lakes Symposium on {VLSI} 2008,
Orlando, Florida, USA, May 4-6, 2008},
pages = {435--440},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1366110.1366213},
doi = {10.1145/1366110.1366213},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/FerriVMBH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/CalimeraBMP08,
author = {Andrea Calimera and
R. Iris Bahar and
Enrico Macii and
Massimo Poncino},
editor = {Vijaykrishnan Narayanan and
C. P. Ravikumar and
J{\"{o}}rg Henkel and
Ali Keshavarzi and
Vojin G. Oklobdzija and
Barry M. Pangrle},
title = {Reducing leakage power by accounting for temperature inversion dependence
in dual-Vt synthesized circuits},
booktitle = {Proceedings of the 2008 International Symposium on Low Power Electronics
and Design, 2008, Bangalore, India, August 11-13, 2008},
pages = {217--220},
publisher = {{ACM}},
year = {2008},
url = {https://doi.org/10.1145/1393921.1393978},
doi = {10.1145/1393921.1393978},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/CalimeraBMP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/NepalADB08,
author = {Kundan Nepal and
Nuno Alves and
Jennifer Dworak and
R. Iris Bahar},
editor = {Douglas Young and
Nur A. Touba},
title = {Using Implications for Online Error Detection},
booktitle = {2008 {IEEE} International Test Conference, {ITC} 2008, Santa Clara,
California, USA, October 26-31, 2008},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/TEST.2008.4700614},
doi = {10.1109/TEST.2008.4700614},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/NepalADB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TadesseBG08,
author = {Desta Tadesse and
R. Iris Bahar and
Joel Grodstein},
title = {Fast Measurement of the "Non-Deterministic Zone" in Microprocessor
Debug Using Maximum Likelihood Estimation},
booktitle = {26th {IEEE} {VLSI} Test Symposium {(VTS} 2008), April 27 - May 1,
2008, San Diego, California, {USA}},
pages = {339--344},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/VTS.2008.18},
doi = {10.1109/VTS.2008.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/TadesseBG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/computer/BaharHHJLMOP07,
author = {R. Iris Bahar and
Dan W. Hammerstrom and
Justin E. Harlow III and
William H. Joyner Jr. and
Clifford Lau and
Diana Marculescu and
Alex Orailoglu and
Massoud Pedram},
title = {Architectures for Silicon Nanoelectronics and Beyond},
journal = {Computer},
volume = {40},
number = {1},
pages = {25--33},
year = {2007},
url = {https://doi.org/10.1109/MC.2007.7},
doi = {10.1109/MC.2007.7},
timestamp = {Wed, 12 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/computer/BaharHHJLMOP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/et/NepalBMPZ07,
author = {Kundan Nepal and
R. Iris Bahar and
Joseph L. Mundy and
William R. Patterson and
Alexander Zaslavsky},
title = {Designing Nanoscale Logic Circuits Based on Markov Random Fields},
journal = {J. Electron. Test.},
volume = {23},
number = {2-3},
pages = {255--266},
year = {2007},
url = {https://doi.org/10.1007/s10836-006-0553-9},
doi = {10.1007/S10836-006-0553-9},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/et/NepalBMPZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/FerriMBBH07,
author = {Cesare Ferri and
Tali Moreshet and
R. Iris Bahar and
Luca Benini and
Maurice Herlihy},
title = {A hardware/software framework for supporting transactional memory
in a MPSoC environment},
journal = {{SIGARCH} Comput. Archit. News},
volume = {35},
number = {1},
pages = {47--54},
year = {2007},
url = {https://doi.org/10.1145/1241601.1241611},
doi = {10.1145/1241601.1241611},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/FerriMBBH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NepalBMPZ07,
author = {Kundan Nepal and
R. Iris Bahar and
Joseph L. Mundy and
William R. Patterson and
Alexander Zaslavsky},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Interactive presentation: Techniques for designing noise-tolerant
multi-level combinational circuits},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {576--581},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://doi.org/10.1109/DATE.2007.364655},
doi = {10.1109/DATE.2007.364655},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/NepalBMPZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TadesseSLBG07,
author = {Desta Tadesse and
D. Sheffield and
E. Lenge and
R. Iris Bahar and
Joel Grodstein},
editor = {Rudy Lauwereins and
Jan Madsen},
title = {Accurate timing analysis using {SAT} and pattern-dependent delay models},
booktitle = {2007 Design, Automation and Test in Europe Conference and Exposition,
{DATE} 2007, Nice, France, April 16-20, 2007},
pages = {1018--1023},
publisher = {{EDA} Consortium, San Jose, CA, {USA}},
year = {2007},
url = {https://doi.org/10.1109/DATE.2007.364427},
doi = {10.1109/DATE.2007.364427},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/TadesseSLBG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/FerriRB07,
author = {Cesare Ferri and
Sherief Reda and
R. Iris Bahar},
editor = {Georges G. E. Gielen},
title = {Strategies for improving the parametric yield and profits of 3D ICs},
booktitle = {2007 International Conference on Computer-Aided Design, {ICCAD} 2007,
San Jose, CA, USA, November 5-8, 2007},
pages = {220--226},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ICCAD.2007.4397269},
doi = {10.1109/ICCAD.2007.4397269},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/FerriRB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/nanoarch/LiMPKZB07,
author = {Hua Li and
Joseph L. Mundy and
William R. Patterson and
Dimitrios Kazazis and
Alexander Zaslavsky and
R. Iris Bahar},
title = {Thermally-induced soft errors in nanoscale {CMOS} circuits},
booktitle = {2007 {IEEE} International Symposium on Nanoscale Architectures, {NANOARCH}
2007, San Jose, CA, USA, October 21-22, 2007},
pages = {62--69},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/NANOARCH.2007.4400859},
doi = {10.1109/NANOARCH.2007.4400859},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/nanoarch/LiMPKZB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/micro/NepalBMPZ06,
author = {Kundan Nepal and
R. Iris Bahar and
Joseph L. Mundy and
William R. Patterson and
Alexander Zaslavsky},
title = {{MRF} Reinforcer: {A} Probabilistic Element for Space Redundancy in
Nanoscale Circuits},
journal = {{IEEE} Micro},
volume = {26},
number = {5},
pages = {19--27},
year = {2006},
url = {https://doi.org/10.1109/MM.2006.96},
doi = {10.1109/MM.2006.96},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/micro/NepalBMPZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SongNBG06,
author = {Hui{-}Yuan Song and
Kundan Nepal and
R. Iris Bahar and
Joel Grodstein},
title = {Timing analysis for full-custom circuits using symbolic {DC} formulations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {25},
number = {9},
pages = {1815--1830},
year = {2006},
url = {https://doi.org/10.1109/TCAD.2005.859510},
doi = {10.1109/TCAD.2005.859510},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SongNBG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/StojanovicBDW06,
author = {Vladimir Stojanovic and
R. Iris Bahar and
Jennifer Dworak and
Richard Weiss},
editor = {Ellen Sentovich},
title = {A cost-effective implementation of an ECC-protected instruction queue
for out-of-order microprocessors},
booktitle = {Proceedings of the 43rd Design Automation Conference, {DAC} 2006,
San Francisco, CA, USA, July 24-28, 2006},
pages = {705--708},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1146909.1147087},
doi = {10.1145/1146909.1147087},
timestamp = {Thu, 10 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/dac/StojanovicBDW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NepalBMPZ06,
author = {Kundan Nepal and
R. Iris Bahar and
Joseph L. Mundy and
William R. Patterson and
Alexander Zaslavsky},
editor = {Georges G. E. Gielen},
title = {Designing {MRF} based error correcting circuits for memory elements},
booktitle = {Proceedings of the Conference on Design, Automation and Test in Europe,
{DATE} 2006, Munich, Germany, March 6-10, 2006},
pages = {792--793},
publisher = {European Design and Automation Association, Leuven, Belgium},
year = {2006},
url = {https://doi.org/10.1109/DATE.2006.244144},
doi = {10.1109/DATE.2006.244144},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/NepalBMPZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NepalBMPZ06,
author = {Kundan Nepal and
R. Iris Bahar and
Joseph L. Mundy and
William R. Patterson and
Alexander Zaslavsky},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Optimizing noise-immune nanoscale circuits using principles of Markov
random fields},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {149--152},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127945},
doi = {10.1145/1127908.1127945},
timestamp = {Wed, 16 Aug 2023 21:16:32 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NepalBMPZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Bahar06,
author = {R. Iris Bahar},
title = {Trends and Future Directions in Nano Structure Based Computing and
Fabrication},
booktitle = {24th International Conference on Computer Design {(ICCD} 2006), 1-4
October 2006, San Jose, CA, {USA}},
pages = {522--527},
publisher = {{IEEE}},
year = {2006},
url = {https://doi.org/10.1109/ICCD.2006.4380865},
doi = {10.1109/ICCD.2006.4380865},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Bahar06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/spaa/MoreshetBH06,
author = {Tali Moreshet and
R. Iris Bahar and
Maurice Herlihy},
editor = {Phillip B. Gibbons and
Uzi Vishkin},
title = {Energy implications of multiprocessor synchronization},
booktitle = {{SPAA} 2006: Proceedings of the 18th Annual {ACM} Symposium on Parallelism
in Algorithms and Architectures, Cambridge, Massachusetts, USA, July
30 - August 2, 2006},
pages = {329},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1148109.1148166},
doi = {10.1145/1148109.1148166},
timestamp = {Wed, 21 Nov 2018 11:13:10 +0100},
biburl = {https://dblp.org/rec/conf/spaa/MoreshetBH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/dt/BaharTSL05,
author = {R. Iris Bahar and
Mehdi Baradaran Tahoori and
Sandeep K. Shukla and
Fabrizio Lombardi},
title = {Guest Editors' Introduction: Challenges for Reliable Design at the
Nanoscale},
journal = {{IEEE} Des. Test Comput.},
volume = {22},
number = {4},
pages = {295--297},
year = {2005},
url = {https://doi.org/10.1109/MDT.2005.84},
doi = {10.1109/MDT.2005.84},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/dt/BaharTSL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BaharSNG05,
author = {R. Iris Bahar and
Hui{-}Yuan Song and
Kundan Nepal and
Joel Grodstein},
title = {Symbolic failure analysis of complex {CMOS} circuits due to excessive
leakage current and charge sharing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {24},
number = {4},
pages = {502--515},
year = {2005},
url = {https://doi.org/10.1109/TCAD.2005.844105},
doi = {10.1109/TCAD.2005.844105},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BaharSNG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/NepalBMPZ05,
author = {Kundan Nepal and
R. Iris Bahar and
Joseph L. Mundy and
William R. Patterson and
Alexander Zaslavsky},
editor = {William H. Joyner Jr. and
Grant Martin and
Andrew B. Kahng},
title = {Designing logic circuits for probabilistic computation in the presence
of noise},
booktitle = {Proceedings of the 42nd Design Automation Conference, {DAC} 2005,
San Diego, CA, USA, June 13-17, 2005},
pages = {485--490},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1065579.1065706},
doi = {10.1145/1065579.1065706},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/NepalBMPZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/MoreshetBH05,
author = {Tali Moreshet and
R. Iris Bahar and
Maurice Herlihy},
editor = {Kaushik Roy and
Vivek Tiwari},
title = {Energy reduction in multiprocessor systems using transactional memory},
booktitle = {Proceedings of the 2005 International Symposium on Low Power Electronics
and Design, 2005, San Diego, California, USA, August 8-10, 2005},
pages = {331--334},
publisher = {{ACM}},
year = {2005},
url = {https://doi.org/10.1145/1077603.1077683},
doi = {10.1145/1077603.1077683},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/MoreshetBH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/taco/BaiB04,
author = {Yu Bai and
R. Iris Bahar},
title = {A low-power in-order/out-of-order issue queue},
journal = {{ACM} Trans. Archit. Code Optim.},
volume = {1},
number = {2},
pages = {152--179},
year = {2004},
url = {https://doi.org/10.1145/1011528.1011530},
doi = {10.1145/1011528.1011530},
timestamp = {Wed, 17 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/taco/BaiB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/MoreshetB04,
author = {Tali Moreshet and
R. Iris Bahar},
title = {Effects of speculation on performance and issue queue design},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {12},
number = {10},
pages = {1123--1126},
year = {2004},
url = {https://doi.org/10.1109/TVLSI.2004.834226},
doi = {10.1109/TVLSI.2004.834226},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/MoreshetB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NepalSBG04,
author = {Kundan Nepal and
Hui{-}Yuan Song and
R. Iris Bahar and
Joel Grodstein},
editor = {David Garrett and
John C. Lach and
Charles A. Zukowski},
title = {{RESTA:} a robust and extendable symbolic timing analysis tool},
booktitle = {Proceedings of the 14th {ACM} Great Lakes Symposium on {VLSI} 2004,
Boston, MA, USA, April 26-28, 2004},
pages = {407--412},
publisher = {{ACM}},
year = {2004},
url = {https://doi.org/10.1145/988952.989050},
doi = {10.1145/988952.989050},
timestamp = {Fri, 20 Aug 2021 16:30:37 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NepalSBG04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BaiB04,
author = {Yu Bai and
R. Iris Bahar},
title = {Reducing Issue Queue Power for Multimedia Applications using a Feedback
Control Algorithm},
booktitle = {22nd {IEEE} International Conference on Computer Design: {VLSI} in
Computers {\&} Processors {(ICCD} 2004), 11-13 October 2004, San
Jose, CA, USA, Proceedings},
pages = {54--57},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ICCD.2004.1347898},
doi = {10.1109/ICCD.2004.1347898},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BaiB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MehtaSBLW04,
author = {Nikil Mehta and
Brian Singer and
R. Iris Bahar and
Michael Leuchtenburg and
Richard S. Weiss},
title = {Fetch Halting on Critical Load Misses},
booktitle = {22nd {IEEE} International Conference on Computer Design: {VLSI} in
Computers {\&} Processors {(ICCD} 2004), 11-13 October 2004, San
Jose, CA, USA, Proceedings},
pages = {244--249},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.org/10.1109/ICCD.2004.1347929},
doi = {10.1109/ICCD.2004.1347929},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MehtaSBLW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/IEEEinteract/ChiSBW03,
author = {Eric Chi and
A. Michael Salem and
R. Iris Bahar and
Richard S. Weiss},
title = {Combining Software and Hardware Monitoring for Improved Power and
Performance Tuning},
booktitle = {7th Annual Workshop on Interaction between Compilers and Computer
Architecture {(INTERACT-7} 2003), 8 February 2003, Anaheim, CA, {USA}},
pages = {57--64},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/INTERA.2003.1192356},
doi = {10.1109/INTERA.2003.1192356},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/IEEEinteract/ChiSBW03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MoreshetB03,
author = {Tali Moreshet and
R. Iris Bahar},
title = {Power-aware issue queue design for speculative instructions},
booktitle = {Proceedings of the 40th Design Automation Conference, {DAC} 2003,
Anaheim, CA, USA, June 2-6, 2003},
pages = {634--637},
publisher = {{ACM}},
year = {2003},
url = {https://doi.org/10.1145/775832.775991},
doi = {10.1145/775832.775991},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/MoreshetB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BaharMC03,
author = {R. Iris Bahar and
Joseph L. Mundy and
Jie Chen},
title = {A Probabilistic-Based Design Methodology for Nanoscale Computation},
booktitle = {2003 International Conference on Computer-Aided Design, {ICCAD} 2003,
San Jose, CA, USA, November 9-13, 2003},
pages = {480--486},
publisher = {{IEEE} Computer Society / {ACM}},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/ICCAD.2003.1257854},
doi = {10.1109/ICCAD.2003.1257854},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BaharMC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SongBBG03,
author = {Hui{-}Yuan Song and
S. Bohidar and
R. Iris Bahar and
Joel Grodstein},
title = {Symbolic Failure Analysis of Custom Circuits due to Excessive Leakage
Current},
booktitle = {21st International Conference on Computer Design {(ICCD} 2003),VLSI
in Computers and Processors, 13-15 October 2003, San Jose, CA, USA,
Proceedings},
pages = {70--75},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ICCD.2003.1240875},
doi = {10.1109/ICCD.2003.1240875},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SongBBG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/BaiB03,
author = {Yu Bai and
R. Iris Bahar},
title = {A Dynamically Reconfigurable Mixed In-Order/Out-of-Order Issue Queue
for Power-Aware Microprocessors},
booktitle = {2003 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
2003), New Trends and Technologies for {VLSI} Systems Design, 20-21
February 2003, Tampa, FL, {USA}},
pages = {139--148},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ISVLSI.2003.1183365},
doi = {10.1109/ISVLSI.2003.1183365},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/BaiB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iwls/SongBG02,
author = {Hui{-}Yuan Song and
R. Iris Bahar and
Joel Grodstein},
title = {Timing Analysis for Full-Custom Circuits Using Symbolic {DC} Formulations},
booktitle = {11th {IEEE/ACM} International Workshop on Logic {\&} Synthesis,
{IWLS} 2002, June 4-7, 2002, New Orleans, Louisiana, {USA}},
pages = {203--208},
year = {2002},
timestamp = {Sun, 04 Aug 2019 18:01:44 +0200},
biburl = {https://dblp.org/rec/conf/iwls/SongBG02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isca/BaharM01,
author = {R. Iris Bahar and
Srilatha Manne},
editor = {Per Stenstr{\"{o}}m},
title = {Power and energy reduction via pipeline balancing},
booktitle = {Proceedings of the 28th Annual International Symposium on Computer
Architecture, {ISCA} 2001, G{\"{o}}teborg, Sweden, June 30-July
4, 2001},
pages = {218--229},
publisher = {{ACM}},
year = {2001},
url = {https://doi.org/10.1145/379240.379265},
doi = {10.1145/379240.379265},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isca/BaharM01.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/BaharLM00,
author = {R. Iris Bahar and
Ernest T. Lampe and
Enrico Macii},
title = {Power optimization of technology-dependent circuits based on symbolic
computation of logic implications},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {5},
number = {3},
pages = {267--293},
year = {2000},
url = {https://doi.org/10.1145/348019.348028},
doi = {10.1145/348019.348028},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/BaharLM00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/pacs/MaroBB00,
author = {Roberto Maro and
Yu Bai and
R. Iris Bahar},
editor = {Babak Falsafi and
T. N. Vijaykumar},
title = {Dynamically Reconfiguring Processor Resources to Reduce Power Consumption
in High-Performance Processors},
booktitle = {Power-Aware Computer Systems, First International Workshop, {PACS}
2000, Cambridge, MA, USA, November 12, 2000, Revised Papers},
series = {Lecture Notes in Computer Science},
volume = {2008},
pages = {97--111},
publisher = {Springer},
year = {2000},
url = {https://doi.org/10.1007/3-540-44572-2\_8},
doi = {10.1007/3-540-44572-2\_8},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/pacs/MaroBB00.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/sigarch/BaharCG99,
author = {R. Iris Bahar and
Brad Calder and
Dirk Grunwald},
title = {A comparison of software code reordering and victim buffers},
journal = {{SIGARCH} Comput. Archit. News},
volume = {27},
number = {1},
pages = {51--54},
year = {1999},
url = {https://doi.org/10.1145/309758.309781},
doi = {10.1145/309758.309781},
timestamp = {Thu, 30 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/sigarch/BaharCG99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/FiskB99,
author = {Brian R. Fisk and
R. Iris Bahar},
title = {The Non-Critical Buffer: Using Load Latency Tolerance to Improve Data
Cache Efficiency},
booktitle = {Proceedings of the {IEEE} International Conference On Computer Design,
{VLSI} in Computers and Processors, {ICCD} '99, Austin, Texas, USA,
October 10-13, 1999},
pages = {538--545},
publisher = {{IEEE} Computer Society},
year = {1999},
url = {https://doi.org/10.1109/ICCD.1999.808593},
doi = {10.1109/ICCD.1999.808593},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/FiskB99.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/BaharAM98,
author = {R. Iris Bahar and
Gianluca Albera and
Srilatha Manne},
editor = {Anantha P. Chandrakasan and
Sayfe Kiaei},
title = {Power and performance tradeoffs using various caching strategies},
booktitle = {Proceedings of the 1998 International Symposium on Low Power Electronics
and Design, 1998, Monterey, California, USA, August 10-12, 1998},
pages = {64--69},
publisher = {{ACM}},
year = {1998},
url = {https://doi.org/10.1145/280756.295115},
doi = {10.1145/280756.295115},
timestamp = {Mon, 27 Sep 2021 11:47:11 +0200},
biburl = {https://dblp.org/rec/conf/islped/BaharAM98.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/fmsd/BaharFGHMPS97,
author = {R. Iris Bahar and
Erica A. Frohm and
Charles M. Gaona and
Gary D. Hachtel and
Enrico Macii and
Abelardo Pardo and
Fabio Somenzi},
title = {Algebraic Decision Diagrams and Their Applications},
journal = {Formal Methods Syst. Des.},
volume = {10},
number = {2/3},
pages = {171--206},
year = {1997},
url = {https://doi.org/10.1023/A:1008699807402},
doi = {10.1023/A:1008699807402},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/fmsd/BaharFGHMPS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BaharCHMS97,
author = {R. Iris Bahar and
Hyunwoo Cho and
Gary D. Hachtel and
Enrico Macii and
Fabio Somenzi},
title = {Symbolic timing analysis and resynthesis for low power of combinational
circuits containing false paths},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {16},
number = {10},
pages = {1101--1115},
year = {1997},
url = {https://doi.org/10.1109/43.662674},
doi = {10.1109/43.662674},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BaharCHMS97.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/BaharBHMSS96,
author = {R. Iris Bahar and
M. Burns and
Gary D. Hachtel and
Enrico Macii and
H. Shin and
Fabio Somenzi},
editor = {Mark Horowitz and
Jan M. Rabaey and
Brock Barton and
Massoud Pedram},
title = {Symbolic computation of logic implications for technology-dependent
low-power synthesis},
booktitle = {Proceedings of the 1996 International Symposium on Low Power Electronics
and Design, 1996, Monterey, California, USA, August 12-14, 1996},
pages = {163--168},
publisher = {{IEEE}},
year = {1996},
url = {https://doi.org/10.1109/LPE.1996.547500},
doi = {10.1109/LPE.1996.547500},
timestamp = {Mon, 09 Aug 2021 14:54:04 +0200},
biburl = {https://dblp.org/rec/conf/islped/BaharBHMSS96.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dac/MannePBHSMP95,
author = {Srilatha Manne and
Abelardo Pardo and
R. Iris Bahar and
Gary D. Hachtel and
Fabio Somenzi and
Enrico Macii and
Massimo Poncino},
editor = {Bryan Preas},
title = {Computing the Maximum Power Cycles of a Sequential Circuit},
booktitle = {Proceedings of the 32st Conference on Design Automation, San Francisco,
California, USA, Moscone Center, June 12-16, 1995},
pages = {23--28},
publisher = {{ACM} Press},
year = {1995},
url = {https://doi.org/10.1145/217474.217501},
doi = {10.1145/217474.217501},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/dac/MannePBHSMP95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BaharS95,
author = {R. Iris Bahar and
Fabio Somenzi},
editor = {Richard L. Rudell},
title = {Boolean techniques for low power driven re-synthesis},
booktitle = {Proceedings of the 1995 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1995, San Jose, California, USA, November 5-9, 1995},
pages = {428--432},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1995},
url = {https://doi.org/10.1109/ICCAD.1995.480151},
doi = {10.1109/ICCAD.1995.480151},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BaharS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/PardoBMFHS95,
author = {Abelardo Pardo and
R. Iris Bahar and
Srilatha Manne and
Peter Feldmann and
Gary D. Hachtel and
Fabio Somenzi},
editor = {Massoud Pedram and
Robert W. Brodersen and
Kurt Keutzer},
title = {{CMOS} dynamic power estimation based on collapsible current source
transistor modeling},
booktitle = {Proceedings of the 1995 International Symposium on Low Power Design
1995, Dana Point, California, USA, April 23-26, 1995},
pages = {111--116},
publisher = {{ACM}},
year = {1995},
url = {https://doi.org/10.1145/224081.224101},
doi = {10.1145/224081.224101},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/PardoBMFHS95.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/eurodac/BaharCHMS94,
author = {R. Iris Bahar and
Hyunwoo Cho and
Gary D. Hachtel and
Enrico Macii and
Fabio Somenzi},
editor = {Robert Werner},
title = {Timing Analysis of Combinational Circuits using ADD's},
booktitle = {{EDAC} - The European Conference on Design Automation, {ETC} - European
Test Conference, {EUROASIC} - The European Event in {ASIC} Design,
Proceedings, February 28 - March 3, 1994, Paris, France},
pages = {625--629},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/EDTC.1994.326813},
doi = {10.1109/EDTC.1994.326813},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/eurodac/BaharCHMS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BaharHPPS94,
author = {R. Iris Bahar and
Gary D. Hachtel and
Abelardo Pardo and
Massimo Poncino and
Fabio Somenzi},
title = {An ADD-based algorithm for shortest path back-tracing of large graphs},
booktitle = {Fourth Great Lakes Symposium on Design Automation of High Performance
{VLSI} Systems, {GLSV} '94, Notre Dame, IN, USA, March 4-5, 1994},
pages = {248--251},
publisher = {{IEEE}},
year = {1994},
url = {https://doi.org/10.1109/GLSV.1994.289960},
doi = {10.1109/GLSV.1994.289960},
timestamp = {Wed, 16 Oct 2019 14:14:57 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BaharHPPS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BaharHMS94,
author = {R. Iris Bahar and
Gary D. Hachtel and
Enrico Macii and
Fabio Somenzi},
editor = {Jochen A. G. Jess and
Richard L. Rudell},
title = {A symbolic method to reduce power consumption of circuits containing
false paths},
booktitle = {Proceedings of the 1994 {IEEE/ACM} International Conference on Computer-Aided
Design, {ICCAD} 1994, San Jose, California, USA, November 6-10, 1994},
pages = {368--371},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1994},
url = {https://doi.org/10.1109/ICCAD.1994.629820},
doi = {10.1109/ICCAD.1994.629820},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BaharHMS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccad/BaharFGHMPS93,
author = {R. Iris Bahar and
Erica A. Frohm and
Charles M. Gaona and
Gary D. Hachtel and
Enrico Macii and
Abelardo Pardo and
Fabio Somenzi},
editor = {Michael R. Lightner and
Jochen A. G. Jess},
title = {Algebraic decision diagrams and their applications},
booktitle = {Proceedings of the 1993 {IEEE/ACM} International Conference on Computer-Aided
Design, 1993, Santa Clara, California, USA, November 7-11, 1993},
pages = {188--191},
publisher = {{IEEE} Computer Society / {ACM}},
year = {1993},
url = {https://doi.org/10.1109/ICCAD.1993.580054},
doi = {10.1109/ICCAD.1993.580054},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccad/BaharFGHMPS93.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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