BibTeX records: Arnaldo Azevedo

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@article{DBLP:journals/jrtip/ZattSAASB13,
  author       = {Bruno Zatt and
                  Leandro M. de L. Silva and
                  Arnaldo Azevedo and
                  Luciano Volcan Agostini and
                  Altamiro Amadeu Susin and
                  Sergio Bampi},
  title        = {A reduced memory bandwidth and high throughput {HDTV} motion compensation
                  decoder for {H.264/AVC} High 4: 2: 2 profile},
  journal      = {J. Real Time Image Process.},
  volume       = {8},
  number       = {1},
  pages        = {127--140},
  year         = {2013},
  url          = {https://doi.org/10.1007/s11554-011-0216-7},
  doi          = {10.1007/S11554-011-0216-7},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jrtip/ZattSAASB13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/sigbed/GoossensACGGKLMMNNS13,
  author       = {Kees Goossens and
                  Arnaldo Azevedo and
                  Karthik Chandrasekar and
                  Manil Dev Gomony and
                  Sven Goossens and
                  Martijn Koedam and
                  Yonghui Li and
                  Davit Mirzoyan and
                  Anca Mariana Molnos and
                  Ashkan Beyranvand Nejad and
                  Andrew Nelson and
                  Shubhendu Sinha},
  title        = {Virtual execution platforms for mixed-time-criticality systems: the
                  CompSOC architecture and design flow},
  journal      = {{SIGBED} Rev.},
  volume       = {10},
  number       = {3},
  pages        = {23--34},
  year         = {2013},
  url          = {https://doi.org/10.1145/2544350.2544353},
  doi          = {10.1145/2544350.2544353},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/sigbed/GoossensACGGKLMMNNS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@book{DBLP:series/sbcs/JuurlinkACAMR12,
  author       = {Ben H. H. Juurlink and
                  Mauricio Alvarez{-}Mesa and
                  Chi Ching Chi and
                  Arnaldo Azevedo and
                  Cor Meenderinck and
                  Alex Ram{\'{\i}}rez},
  title        = {Scalable Parallel Programming Applied to {H.264/AVC} Decoding},
  series       = {Springer Briefs in Computer Science},
  publisher    = {Springer},
  year         = {2012},
  url          = {https://doi.org/10.1007/978-1-4614-2230-3},
  doi          = {10.1007/978-1-4614-2230-3},
  isbn         = {978-1-4614-2229-7},
  timestamp    = {Fri, 29 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/series/sbcs/JuurlinkACAMR12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccd/AzevedoVG12,
  author       = {Arnaldo Azevedo and
                  Bart Vermeulen and
                  Kees Goossens},
  title        = {Architecture and design flow for a debug event distribution interconnect},
  booktitle    = {30th International {IEEE} Conference on Computer Design, {ICCD} 2012,
                  Montreal, QC, Canada, September 30 - Oct. 3, 2012},
  pages        = {439--444},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/ICCD.2012.6378676},
  doi          = {10.1109/ICCD.2012.6378676},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccd/AzevedoVG12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/thipeac/AzevedoJMTHARV11,
  author       = {Arnaldo Azevedo and
                  Ben H. H. Juurlink and
                  Cor Meenderinck and
                  Andrei Sergeevich Terechko and
                  Jan Hoogerbrugge and
                  Mauricio Alvarez and
                  Alex Ram{\'{\i}}rez and
                  Mateo Valero},
  title        = {A Highly Scalable Parallel Implementation of {H.264}},
  journal      = {Trans. High Perform. Embed. Archit. Compil.},
  volume       = {4},
  pages        = {111--134},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-3-642-24568-8\_6},
  doi          = {10.1007/978-3-642-24568-8\_6},
  timestamp    = {Fri, 29 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/thipeac/AzevedoJMTHARV11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/arcs/AzevedoJ11,
  author       = {Arnaldo Azevedo and
                  Ben H. H. Juurlink},
  editor       = {Mladen Berekovic and
                  William Fornaciari and
                  Uwe Brinkschulte and
                  Cristina Silvano},
  title        = {An Instruction to Accelerate Software Caches},
  booktitle    = {Architecture of Computing Systems - {ARCS} 2011 - 24th International
                  Conference, Como, Italy, February 24-25, 2011. Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {6566},
  pages        = {158--170},
  publisher    = {Springer},
  year         = {2011},
  url          = {https://doi.org/10.1007/978-3-642-19137-4\_14},
  doi          = {10.1007/978-3-642-19137-4\_14},
  timestamp    = {Wed, 25 Sep 2019 18:15:27 +0200},
  biburl       = {https://dblp.org/rec/conf/arcs/AzevedoJ11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ijertcs/AzevedoJ10,
  author       = {Arnaldo Azevedo and
                  Ben H. H. Juurlink},
  title        = {A Multidimensional Software Cache for Scratchpad-Based Systems},
  journal      = {Int. J. Embed. Real Time Commun. Syst.},
  volume       = {1},
  number       = {4},
  pages        = {1--20},
  year         = {2010},
  url          = {https://doi.org/10.4018/jertcs.2010100101},
  doi          = {10.4018/JERTCS.2010100101},
  timestamp    = {Sun, 06 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/ijertcs/AzevedoJ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/micro/RamirezCJASAMCIG10,
  author       = {Alex Ram{\'{\i}}rez and
                  Felipe Cabarcas and
                  Ben H. H. Juurlink and
                  Mauricio Alvarez{-}Mesa and
                  Friman S{\'{a}}nchez and
                  Arnaldo Azevedo and
                  Cor Meenderinck and
                  Catalin Bogdan Ciobanu and
                  Sebasti{\'{a}}n Isaza and
                  Georgi Gaydadjiev},
  title        = {The {SARC} Architecture},
  journal      = {{IEEE} Micro},
  volume       = {30},
  number       = {5},
  pages        = {16--29},
  year         = {2010},
  url          = {https://doi.org/10.1109/MM.2010.79},
  doi          = {10.1109/MM.2010.79},
  timestamp    = {Fri, 29 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/micro/RamirezCJASAMCIG10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/rasi/AlvarezRVAM09,
  author       = {Mauricio Alvarez and
                  Alex Ram{\'{\i}}rez and
                  Mateo Valero and
                  Arnaldo Azevedo and
                  Cor Meenderinck},
  title        = {Evaluaci{\'{o}}n del rendimiento paralelo en el nivel macro bloque
                  del decodificador {H.264} en una arquitectura multiprocesador cc-NUMA},
  journal      = {Rev. Avances en Sistemas Inform{\'{a}}tica},
  volume       = {6},
  number       = {1},
  pages        = {219--228},
  year         = {2009},
  url          = {http://www.minas.medellin.unal.edu.co/index.php?option=com\_docman\&\#38;task=doc\_view\&\#38;gid=571\&\#38;tmpl=component\&\#38;format=raw\&\#38;Itemid=285},
  timestamp    = {Mon, 30 Jan 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/rasi/AlvarezRVAM09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/vlsisp/MeenderinckAJAR09,
  author       = {Cor Meenderinck and
                  Arnaldo Azevedo and
                  Ben H. H. Juurlink and
                  Mauricio Alvarez and
                  Alex Ram{\'{\i}}rez},
  title        = {Parallel Scalability of Video Decoders},
  journal      = {J. Signal Process. Syst.},
  volume       = {57},
  number       = {2},
  pages        = {173--194},
  year         = {2009},
  url          = {https://doi.org/10.1007/s11265-008-0256-9},
  doi          = {10.1007/S11265-008-0256-9},
  timestamp    = {Mon, 30 Jan 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsisp/MeenderinckAJAR09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/asap/FilhoJ09,
  author       = {Arnaldo P. Azevedo Filho and
                  Ben H. H. Juurlink},
  title        = {Scalar Processing Overhead on SIMD-Only Architectures},
  booktitle    = {20th {IEEE} International Conference on Application-Specific Systems,
                  Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
                  MA, {USA}},
  pages        = {183--190},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/ASAP.2009.12},
  doi          = {10.1109/ASAP.2009.12},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/asap/FilhoJ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/hipeac/AzevedoMJTHAR09,
  author       = {Arnaldo Azevedo and
                  Cor Meenderinck and
                  Ben H. H. Juurlink and
                  Andrei Sergeevich Terechko and
                  Jan Hoogerbrugge and
                  Mauricio Alvarez and
                  Alex Ram{\'{\i}}rez},
  editor       = {Andr{\'{e}} Seznec and
                  Joel S. Emer and
                  Michael F. P. O'Boyle and
                  Margaret Martonosi and
                  Theo Ungerer},
  title        = {Parallel {H.264} Decoding on an Embedded Multicore Processor},
  booktitle    = {High Performance Embedded Architectures and Compilers, Fourth International
                  Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {5409},
  pages        = {404--418},
  publisher    = {Springer},
  year         = {2009},
  url          = {https://doi.org/10.1007/978-3-540-92990-1\_29},
  doi          = {10.1007/978-3-540-92990-1\_29},
  timestamp    = {Fri, 29 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hipeac/AzevedoMJTHAR09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/icpads/MesaRAMJV09,
  author       = {Mauricio Alvarez{-}Mesa and
                  Alex Ram{\'{\i}}rez and
                  Arnaldo Azevedo and
                  Cor Meenderinck and
                  Ben H. H. Juurlink and
                  Mateo Valero},
  title        = {Scalability of Macroblock-level Parallelism for {H.264} Decoding},
  booktitle    = {15th {IEEE} International Conference on Parallel and Distributed Systems,
                  {ICPADS} 2009, Shenzhen, China, December 8-11, 2009},
  pages        = {236--243},
  publisher    = {{IEEE} Computer Society},
  year         = {2009},
  url          = {https://doi.org/10.1109/ICPADS.2009.124},
  doi          = {10.1109/ICPADS.2009.124},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/icpads/MesaRAMJV09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/issoc/AzevedoJ09,
  author       = {Arnaldo Azevedo and
                  Ben H. H. Juurlink},
  title        = {An efficient software cache for {H.264} motion compensation},
  booktitle    = {2008 {IEEE} International Symposium on System-on-Chip, {SOC} 2009,
                  Tampere, Finland, October 6-7, 2008},
  pages        = {147--150},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/SOCC.2009.5335657},
  doi          = {10.1109/SOCC.2009.5335657},
  timestamp    = {Mon, 06 Apr 2020 12:19:37 +0200},
  biburl       = {https://dblp.org/rec/conf/issoc/AzevedoJ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dsd/GiorgiPPAJ08,
  author       = {Roberto Giorgi and
                  Zdravko Popovic and
                  Nikola Puzovic and
                  Arnaldo Azevedo and
                  Ben H. H. Juurlink},
  editor       = {Luca Fanucci},
  title        = {Analyzing Scalability of Deblocking Filter of {H.264} via {TLP} Exploitation
                  in a New Many-Core Architecture},
  booktitle    = {11th Euromicro Conference on Digital System Design: Architectures,
                  Methods and Tools, {DSD} 2008, Parma, Italy, September 3-5, 2008},
  pages        = {189--194},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/DSD.2008.93},
  doi          = {10.1109/DSD.2008.93},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/dsd/GiorgiPPAJ08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/AzevedoMJAR08,
  author       = {Arnaldo Azevedo and
                  Cor Meenderinck and
                  Ben H. H. Juurlink and
                  Mauricio Alvarez and
                  Alex Ram{\'{\i}}rez},
  title        = {Analysis of video filtering on the cell processor},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
                  May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  pages        = {488--491},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISCAS.2008.4541461},
  doi          = {10.1109/ISCAS.2008.4541461},
  timestamp    = {Fri, 29 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/AzevedoMJAR08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jbcs/AgostiniFSRZPPBS07,
  author       = {Luciano Volcan Agostini and
                  Arnaldo P. Azevedo Filho and
                  Wagston T. Staehler and
                  Vagner S. Rosa and
                  Bruno Zatt and
                  Ana Cristina Medina Pinto and
                  Roger Endrigo Carvalho Porto and
                  Sergio Bampi and
                  Altamiro Amadeu Susin},
  title        = {Design and {FPGA} Prototyping of a {H.264/AVC} Main Profile},
  journal      = {J. Braz. Comput. Soc.},
  volume       = {13},
  number       = {1},
  pages        = {25--36},
  year         = {2007},
  url          = {https://doi.org/10.1007/BF03192399},
  doi          = {10.1007/BF03192399},
  timestamp    = {Tue, 25 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jbcs/AgostiniFSRZPPBS07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iscas/AzevedoZAB07,
  author       = {Arnaldo Azevedo and
                  Bruno Zatt and
                  Luciano Volcan Agostini and
                  Sergio Bampi},
  title        = {MoCHA: a Bi-Predictive Motion Compensation Hardware for {H.264/AVC}
                  Decoder Targeting {HDTV}},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2007), 27-20
                  May 2007, New Orleans, Louisiana, {USA}},
  pages        = {1617--1620},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISCAS.2007.378828},
  doi          = {10.1109/ISCAS.2007.378828},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/AzevedoZAB07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isvlsi/ZattAASB07,
  author       = {Bruno Zatt and
                  Arnaldo Azevedo and
                  Luciano Volcan Agostini and
                  Altamiro Amadeu Susin and
                  Sergio Bampi},
  title        = {Memory Hierarchy Targeting Bi-Predictive Motion Compensation for {H.264/AVC}
                  Decoder},
  booktitle    = {2007 {IEEE} Computer Society Annual Symposium on {VLSI} {(ISVLSI}
                  2007), May 9-11, 2007, Porto Alegre, Brazil},
  pages        = {445--446},
  publisher    = {{IEEE} Computer Society},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISVLSI.2007.64},
  doi          = {10.1109/ISVLSI.2007.64},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isvlsi/ZattAASB07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/rsp/RosaSAZPABS07,
  author       = {Vagner S. Rosa and
                  Wagston T. Staehler and
                  Arnaldo Azevedo and
                  Bruno Zatt and
                  Roger Endrigo Carvalho Porto and
                  Luciano Volcan Agostini and
                  Sergio Bampi and
                  Altamiro Amadeu Susin},
  title        = {{FPGA} Prototyping Strategy for a {H.264/AVC} Video Decoder},
  booktitle    = {18th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
                  2007), 28-30 May 2007, Porto Alegre, RS, Brazil},
  pages        = {174--180},
  publisher    = {{IEEE} Computer Society},
  year         = {2007},
  url          = {https://doi.org/10.1109/RSP.2007.23},
  doi          = {10.1109/RSP.2007.23},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rsp/RosaSAZPABS07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/fpl/AgostiniARBSBS06,
  author       = {Luciano Volcan Agostini and
                  Arnaldo Azevedo and
                  Vagner S. Rosa and
                  Eduardo A. Berriel and
                  Tatiana Gadelha Serra dos Santos and
                  Sergio Bampi and
                  Altamiro Amadeu Susin},
  title        = {{FPGA} Design of {A} {H.264/AVC} Main Profile Decoder for {HDTV}},
  booktitle    = {Proceedings of the 2006 International Conference on Field Programmable
                  Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/FPL.2006.311258},
  doi          = {10.1109/FPL.2006.311258},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpl/AgostiniARBSBS06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/vlsi/AzevedoZAB06,
  author       = {Arnaldo Azevedo and
                  Bruno Zatt and
                  Luciano Volcan Agostini and
                  Sergio Bampi},
  title        = {Motion Compensation Decoder Architecture for {H.264/AVC} Main Profile
                  Targeting {HDTV}},
  booktitle    = {{IFIP} VLSI-SoC 2006, {IFIP} {WG} 10.5 International Conference on
                  Very Large Scale Integration of System-on-Chip, Nice, France, 16-18
                  October 2006},
  pages        = {52--57},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/VLSISOC.2006.313203},
  doi          = {10.1109/VLSISOC.2006.313203},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/AzevedoZAB06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/rsp/AzevedoAWB05,
  author       = {Arnaldo Azevedo and
                  Luciano Volcan Agostini and
                  Fl{\'{a}}vio Rech Wagner and
                  Sergio Bampi},
  title        = {Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined
                  {VLIW} Units},
  booktitle    = {16th {IEEE} International Workshop on Rapid System Prototyping {(RSP}
                  2005), 8-10 June 2005, Montreal, Canada},
  pages        = {255--257},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/RSP.2005.10},
  doi          = {10.1109/RSP.2005.10},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/rsp/AzevedoAWB05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sbcci/SoaresSA04,
  author       = {Rodrigo Soares and
                  Ivan Saraiva Silva and
                  Arnaldo Azevedo},
  editor       = {Edna Natividade da Silva Barros and
                  Fl{\'{a}}vio Rech Wagner and
                  Luigi Carro and
                  Franz{-}Josef Rammig},
  title        = {When reconfigurable architecture meets network-on-chip},
  booktitle    = {Proceedings of the 17th Annual Symposium on Integrated Circuits and
                  Systems Design, {SBCCI} 2004, Pernambuco, Brazil, September 7-11,
                  2004},
  pages        = {216--221},
  publisher    = {{ACM}},
  year         = {2004},
  url          = {https://doi.org/10.1145/1016568.1016626},
  doi          = {10.1145/1016568.1016626},
  timestamp    = {Fri, 03 Jun 2022 10:53:26 +0200},
  biburl       = {https://dblp.org/rec/conf/sbcci/SoaresSA04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/ipps/SoaresAS03,
  author       = {Rodrigo Soares and
                  Arnaldo Azevedo and
                  Ivan Saraiva Silva},
  title        = {{X4CP32:} {A} Coarse Grain General Purpose Reconfigurable Microprocessor},
  booktitle    = {17th International Parallel and Distributed Processing Symposium {(IPDPS}
                  2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings},
  pages        = {171},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/IPDPS.2003.1213315},
  doi          = {10.1109/IPDPS.2003.1213315},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/ipps/SoaresAS03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sbac-pad/SoaresAS03,
  author       = {Rodrigo Soares and
                  Arnaldo Azevedo and
                  Ivan Saraiva Silva},
  title        = {{X4CP32:} {A} New Parallel/Reconfigurable General-Purpose Processor},
  booktitle    = {15th Symposium on Computer Architecture and High Performance Computing
                  {(SBAC-PAD} 2003), 10-12 November 2003, Sao Paulo, Brazil},
  pages        = {260--268},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/CAHPC.2003.1250346},
  doi          = {10.1109/CAHPC.2003.1250346},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/sbac-pad/SoaresAS03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/sbcci/AzevedoSS03,
  author       = {Arnaldo Azevedo and
                  Rodrigo Soares and
                  Ivan Saraiva Silva},
  title        = {A New Hybrid Parallel/Reconfigurable Architecture: The {X4CP32}},
  booktitle    = {Proceedings of the 16th Annual Symposium on Integrated Circuits and
                  Systems Design, {SBCCI} 2003, Sao Paulo, Brazil, September 8-11, 2003},
  pages        = {225--230},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/SBCCI.2003.1232833},
  doi          = {10.1109/SBCCI.2003.1232833},
  timestamp    = {Fri, 17 Jun 2022 15:49:04 +0200},
  biburl       = {https://dblp.org/rec/conf/sbcci/AzevedoSS03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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