default search action
BibTeX records: Sumit Ahuja
@book{DBLP:books/daglib/0031973, author = {Sumit Ahuja and Avinash Lakshminarayana and Sandeep Kumar Shukla}, title = {Low Power Design with High-Level Power Estimation and Power-Aware Synthesis}, publisher = {Springer}, year = {2012}, url = {https://doi.org/10.1007/978-1-4614-0872-7}, doi = {10.1007/978-1-4614-0872-7}, isbn = {978-1-4614-0871-0}, timestamp = {Wed, 14 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/books/daglib/0031973.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isvlsi/LakshminarayanaAS11, author = {Avinash Lakshminarayana and Sumit Ahuja and Sandeep K. Shukla}, title = {High Level Power Estimation Models for FPGAs}, booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2011, 4-6 July 2011, Chennai, India}, pages = {7--12}, publisher = {{IEEE} Computer Society}, year = {2011}, url = {https://doi.org/10.1109/ISVLSI.2011.79}, doi = {10.1109/ISVLSI.2011.79}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isvlsi/LakshminarayanaAS11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jolpe/AhujaZLS10, author = {Sumit Ahuja and Wei Zhang and Avinash Lakshminarayana and Sandeep K. Shukla}, title = {Power Aware High Level Synthesis of Hardware Coprocessors}, journal = {J. Low Power Electron.}, volume = {6}, number = {3}, pages = {376--389}, year = {2010}, url = {https://doi.org/10.1166/jolpe.2010.1092}, doi = {10.1166/JOLPE.2010.1092}, timestamp = {Fri, 22 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jolpe/AhujaZLS10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/acsd/BrandtSAS10, author = {Jens Brandt and Klaus Schneider and Sumit Ahuja and Sandeep K. Shukla}, editor = {Lu{\'{\i}}s Gomes and Victor Khomenko and Jo{\~{a}}o M. Fernandes}, title = {The Model Checking View to Clock Gating and Operand Isolation}, booktitle = {10th International Conference on Application of Concurrency to System Design, {ACSD} 2010, Braga, Portugal, 21-25 June 2010}, pages = {181--190}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/ACSD.2010.22}, doi = {10.1109/ACSD.2010.22}, timestamp = {Thu, 11 Jul 2024 20:37:24 +0200}, biburl = {https://dblp.org/rec/conf/acsd/BrandtSAS10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/AhujaZS10, author = {Sumit Ahuja and Wei Zhang and Sandeep K. Shukla}, title = {System level simulation guided approach to improve the efficacy of clock-gating}, booktitle = {{IEEE} International High Level Design Validation and Test Workshop, {HLDVT} 2010, Anaheim, CA, USA, 10-12 June 2010}, pages = {9--16}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/HLDVT.2010.5496669}, doi = {10.1109/HLDVT.2010.5496669}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/AhujaZS10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/LakshminarayanaAS10, author = {Avinash Lakshminarayana and Sumit Ahuja and Sandeep K. Shukla}, title = {Coprocessor design space exploration using high level synthesis}, booktitle = {11th International Symposium on Quality of Electronic Design {(ISQED} 2010), 22-24 March 2010, San Jose, CA, {USA}}, pages = {879--884}, publisher = {{IEEE}}, year = {2010}, url = {https://doi.org/10.1109/ISQED.2010.5450474}, doi = {10.1109/ISQED.2010.5450474}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isqed/LakshminarayanaAS10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsid/AhujaZLS10, author = {Sumit Ahuja and Wei Zhang and Avinash Lakshminarayana and Sandeep K. Shukla}, title = {A Methodology for Power Aware High-Level Synthesis of Co-processors from Software Algorithms}, booktitle = {{VLSI} Design 2010: 23rd International Conference on {VLSI} Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010}, pages = {282--287}, publisher = {{IEEE} Computer Society}, year = {2010}, url = {https://doi.org/10.1109/VLSI.Design.2010.58}, doi = {10.1109/VLSI.DESIGN.2010.58}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsid/AhujaZLS10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/dt/AhujaGSS09, author = {Sumit Ahuja and Swathi T. Gurumani and Chad Spackman and Sandeep K. Shukla}, title = {Hardware Coprocessor Synthesis from an {ANSI} {C} Specification}, journal = {{IEEE} Des. Test Comput.}, volume = {26}, number = {4}, pages = {58--67}, year = {2009}, url = {https://doi.org/10.1109/MDT.2009.81}, doi = {10.1109/MDT.2009.81}, timestamp = {Sun, 17 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/dt/AhujaGSS09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jolpe/AhujaMLS09, author = {Sumit Ahuja and Deepak Mathaikutty and Avinash Lakshminarayana and Sandeep K. Shukla}, title = {\emph{SCoPE}: Statistical Regression Based Power Models for Co-Processors Power Estimation}, journal = {J. Low Power Electron.}, volume = {5}, number = {4}, pages = {407--415}, year = {2009}, url = {https://doi.org/10.1166/jolpe.2009.1040}, doi = {10.1166/JOLPE.2009.1040}, timestamp = {Fri, 22 May 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jolpe/AhujaMLS09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/AhujaS09, author = {Sumit Ahuja and Sandeep K. Shukla}, title = {{MCBCG:} Model Checking Based Sequential Clock-Gating}, booktitle = {{IEEE} International High Level Design Validation and Test Workshop, {HLDVT} 2009, San Francisco, CA, USA, 4-6 November 2009}, pages = {20--25}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/HLDVT.2009.5340181}, doi = {10.1109/HLDVT.2009.5340181}, timestamp = {Wed, 16 Oct 2019 14:14:57 +0200}, biburl = {https://dblp.org/rec/conf/hldvt/AhujaS09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isqed/AhujaMSSSD09, author = {Sumit Ahuja and Deepak Mathaikutty and Gaurav Singh and Joe Stetzer and Sandeep K. Shukla and Ajit Dingankar}, title = {Power estimation methodology for a high-level synthesis framework}, booktitle = {10th International Symposium on Quality of Electronic Design {(ISQED} 2009), 16-18 March 2009, San Jose, CA, {USA}}, pages = {541--546}, publisher = {{IEEE} Computer Society}, year = {2009}, url = {https://doi.org/10.1109/ISQED.2009.4810352}, doi = {10.1109/ISQED.2009.4810352}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/isqed/AhujaMSSSD09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/socc/AhujaMLS09, author = {Sumit Ahuja and Deepak Mathaikutty and Avinash Lakshminarayana and Sandeep K. Shukla}, title = {Accurate power estimation of hardware co-processors using system level simulation}, booktitle = {Annual {IEEE} International SoC Conference, SoCC 2009, September 9-11, 2009, Belfast, Northern Ireland, UK, Proceedings}, pages = {399--402}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/SOCCON.2009.5398009}, doi = {10.1109/SOCCON.2009.5398009}, timestamp = {Wed, 16 Oct 2019 14:14:53 +0200}, biburl = {https://dblp.org/rec/conf/socc/AhujaMLS09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtv/AhujaMS08, author = {Sumit Ahuja and Deepak Mathaikutty and Sandeep K. Shukla}, title = {Applying Verification Collaterals for Accurate Power Estimation}, booktitle = {Ninth International Workshop on Microprocessor Test and Verification, {MTV} 2008, Austin, Texas, USA, 8-10 December 2008}, pages = {61--66}, publisher = {{IEEE} Computer Society}, year = {2008}, url = {https://doi.org/10.1109/MTV.2008.16}, doi = {10.1109/MTV.2008.16}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtv/AhujaMS08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jolpe/SinghSAS07, author = {Gaurav Singh and Jacob B. Schwartz and Sumit Ahuja and Sandeep K. Shukla}, title = {Techniques for Power-Aware Hardware Synthesis from Concurrent Action Oriented Specifications}, journal = {J. Low Power Electron.}, volume = {3}, number = {2}, pages = {156--166}, year = {2007}, url = {https://doi.org/10.1166/jolpe.2007.134}, doi = {10.1166/JOLPE.2007.134}, timestamp = {Wed, 02 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jolpe/SinghSAS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/hldvt/MathaikuttyADS07, author = {Deepak Mathaikutty and Sumit Ahuja and Ajit Dingankar and Sandeep K. Shukla}, title = {Model-driven test generation for system level validation}, booktitle = {{IEEE} International High Level Design Validation and Test Workshop, {HLDVT} 2007, Irvine, CA, USA, November 7-9, 2007}, pages = {83--90}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/HLDVT.2007.4392792}, doi = {10.1109/HLDVT.2007.4392792}, timestamp = {Thu, 23 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/hldvt/MathaikuttyADS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memocode/SimpsonYSAS07, author = {Eric Simpson and Pengyuan Yu and Patrick Schaumont and Sumit Ahuja and Sandeep K. Shukla}, title = {{VT} Matrix Multiply Design for {MEMOCODE} '07}, booktitle = {5th {ACM} {\&} {IEEE} International Conference on Formal Methods and Models for Co-Design {(MEMOCODE} 2007), May 30 - June 1st, Nice, France}, pages = {95--96}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/MEMCOD.2007.371240}, doi = {10.1109/MEMCOD.2007.371240}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memocode/SimpsonYSAS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/mtv/AhujaMSD07, author = {Sumit Ahuja and Deepak Mathaikutty and Sandeep K. Shukla and Ajit Dingankar}, editor = {Magdy S. Abadir and Li{-}C. Wang and Jayanta Bhadra}, title = {Assertion-Based Modal Power Estimation}, booktitle = {Eighth International Workshop on Microprocessor Test and Verification {(MTV} 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, {USA}}, pages = {3--7}, publisher = {{IEEE} Computer Society}, year = {2007}, url = {https://doi.org/10.1109/MTV.2007.10}, doi = {10.1109/MTV.2007.10}, timestamp = {Fri, 24 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/mtv/AhujaMSD07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/dagstuhl/SinghRAS07, author = {Gaurav Singh and S. S. Ravi and Sumit Ahuja and Sandeep K. Shukla}, editor = {Luca Benini and Naehyuck Chang and Ulrich Kremer and Christian W. Probst}, title = {Complexity of Scheduling in Synthesizing Hardware from Concurrent Action Oriented Specifications}, booktitle = {Power-aware Computing Systems, 21.01. - 26.01.2007}, series = {Dagstuhl Seminar Proceedings}, volume = {07041}, publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany}, year = {2007}, url = {http://drops.dagstuhl.de/opus/volltexte/2007/1105}, timestamp = {Wed, 02 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/dagstuhl/SinghRAS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.