Volume 59-II, Number 1, January 2012
Chin-Fu Li, Shih-Chieh Chou, Guan-Hong Ke, Po-Chiun Huang: A Power-Efficient Noise Suppression Technique Using Signal-Nulled Feedback for Low-Noise Wideband Amplifiers. 1-5- Svetozar S. Broussev, Ivan S. Uzunov, Nikolay T. Tchamov: Design Considerations in Tapped-Inductor Fourth-Order Dual-Band VCO. 6-10
- Tapio A. Lehtonen, Pekko Ruippo, Teppo Keitaanniemi, Nikolay T. Tchamov: A Darlington-Enhanced CMOS Oscillator Architecture. 11-15
- Xianhe Huang, Yan Wang, Wei Fu: Optimization and Realization of a 315-MHz Low-Phase-Noise Voltage-Controlled SAW Oscillator. 16-19
- Andrea Bevilacqua, Pietro Andreani: Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator. 20-24
- Svetozar S. Broussev, Nikolay T. Tchamov: Quality Factor Analysis for Cross-Coupled LC Oscillators Using a Time-Varying Root Locus. 25-29
- Yang Xu, Baoyong Chi, Xiaobao Yu, Nan Qi, Patrick Chiang, Zhihua Wang: Power-Scalable, Complex Bandpass/Low-Pass Filter With I/Q Imbalance Calibration for a Multimode GNSS Receiver. 30-34
- Jun Yu, Meng Tong Tan, Wang Ling Goh, Stephen M. Cox: A Dual-Feedforward Carrier-Modulated Second-Order Class-D Amplifier With Improved THD. 35-39
- Xin Ming, Qiang Li, Ze-kun Zhou, Bo Zhang: An Ultrafast Adaptively Biased Capacitorless LDO With Dynamic Charging Control. 40-44
- Jia-Hui Wang, Chien-Hung Tsai, Sheng-Wen Lai: A Low-Dropout Regulator With Tail Current Control for DPWM Clock Correction. 45-49
- Young-Jin Moon, Yong-Seong Roh, Jung-Chul Gong, Changsik Yoo: Load-Independent Current Control Technique of a Single-Inductor Multiple-Output Switching DC-DC converter. 50-54
- Yingchieh Ho, Chiachi Chang, Chauchin Su: Design of a Subthreshold-Supply Bootstrapped CMOS Inverter Based on an Active Leakage-Current Reduction Technique. 55-59
- Zaka Ullah Sheikh, Oscar Gustafsson: Linear Programming Design of Coefficient Decimation FIR Filters. 60-64
- Shin-Chi Lai, Yi-Ping Yeh, Wen-Chieh Tseng, Sheau-Fang Lei: Low-Cost and High-Accuracy Design of Fast Recursive MDCT/MDST/IMDCT/IMDST Algorithms and Their Realization. 65-69
Volume 59-II, Number 2, February 2012
- Young-Seok Park, Woo-Young Choi: On-Chip Compensation of Ring VCO Oscillation Frequency Changes Due to Supply Noise and Process Variation. 73-77
- Ming Li, Rony E. Amaya: Design of mM-W Fully Integrated CMOS Standing-Wave VCOs Using Low-Loss CPW Resonators. 78-82
- Jia-Ming Liu, Shih-Hsiung Chien, Tai-Haur Kuo: Optimal Design for Delta-Sigma Modulators With Root Loci Inside Unit Circle. 83-87
- Yi-Da Wu, Kok-Choon Cheng, Chih-Cheng Lu, Hsin Chen: Embedded Analog Nonvolatile Memory With Bidirectional and Linear Programmability. 88-92
- F. Xavier Moncunill-Geniz, Jordi Bonet-Dalmau, Pere Palà-Schönwälder, Francisco del Águìla López, M. Rosa Giralt-Mas: A High-Resolution UWB IR Superregenerative Receiver Front End With an SRD Quench Shaper. 93-97
- Florent de Dinechin: Multiplication by Rational Constants. 98-102
- Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee: A True Random-Based Differential Power Analysis Countermeasure Circuit for an AES Engine. 103-107
- Pierce Chuang, David Li, Manoj Sachdev: A Low-Power High-Performance Single-Cycle Tree-Based 64-Bit Binary Comparator. 108-112
- Alfonso Fernández-Vázquez, Gordana Jovanovic-Dolecek: Maximally Flat CIC Compensation Filter: Design and Multiplierless Implementation. 113-117
- Bodong Li, Xieping Gao, Fen Xiao: A New Design Method of the Starting Block in Lattice Structure of Arbitrary-Length Linear Phase Paraunitary Filter Bank by Combining Two Polyphase Matrices. 118-122
- Wei Zhang, Housheng Su, Fanglai Zhu, Dong Yue: A Note on Observers for Discrete-Time Lipschitz Nonlinear Systems. 123-127
- Pingping Chen, Lin Wang, Guanrong Chen: DDCSK-Walsh Coding: A Reliable Chaotic Modulation-Based Transmission Technique. 128-132
Volume 59-II, Number 3, March 2012
- Chaitanya Mohan, Paul M. Furth: A 16-Ώ Audio Amplifier With 93.8-mW Peak Load Power and 1.43-mW Quiescent Power Consumption. 133-137
- Marco Zamprogno, Alberto Minuti, Francesca Girardi, Pierangelo Confalonieri, Germano Nicollini: A 10-b 100-kS/s 1-mW General-Purpose ADC for Cellular Telephones. 138-142
- Kwang-Chun Choi, Seung-Woo Lee, Bhum-Cheol Lee, Woo-Young Choi: A Time-to-Digital Converter Based on a Multiphase Reference Clock and a Binary Counter With a Novel Sampling Error Corrector. 143-147
- Yi-Chieh Huang, Ping-Ying Wang, Shen-Iuan Liu: An All-Digital Jitter Tolerance Measurement Technique for CDR Circuits. 148-152
- ZiJie Hu, Koen Mouthaan: Design and Stability Analysis of a Low-Voltage Subharmonic Cascode FET Mixer. 153-157
- Wei Zhang, Zhe Jiang, Zhiyu Gao, Yanyan Liu: An Efficient VLSI Architecture for Lifting-Based Discrete Wavelet Transform. 158-162
- Xinmiao Zhang, Jiangli Zhu, Wei Zhang: Efficient Reencoder Architectures for Algebraic Soft-Decision Reed-Solomon Decoding. 163-167
- Fabio Frustaci, Pasquale Corsonello, Stefania Perri: Analytical Delay Model Considering Variability Effects in Subthreshold Domain. 168-172
- Jong-Woo Kim, Joo-Seong Kim, Bai-Sun Kong: Low-Voltage CMOS Differential Logic Style With Supply Voltage Approaching Device Threshold. 173-177
- Chih-Ting Yeh, Ming-Dou Ker: New Design of 2 x VDD-Tolerant Power-Rail ESD Clamp Circuit for Mixed-Voltage I/O Buffers in 65-nm CMOS Technology. 178-182
- Shing-Chow Chan, Y. J. Chu: A New State-Regularized QRRLS Algorithm With a Variable Forgetting Factor. 183-187
- Nattapol Sitthimahachaikul, Lakshmi P. Rao, Paul J. Hurst: Canceling the ISI Due to Finite S/H Bandwidth in a Circular Buffer Forward Equalizer. 188-192
Volume 59-II, Number 4, April 2012
- Rahul Sarpeshkar: Universal Principles for Ultra Low Power and Energy Efficient Design. 193-198
- Pei-Kang Tsai, Tzuen-Hsi Huang: Integration of Current-Reused VCO and Frequency Tripler for 24-GHz Low-Power Phase-Locked Loop Applications. 199-203
- Longxing Shi, Chao Chen, Jianhui Wu, Meng Zhang: A 1.5-V Current Mirror Double-Balanced Mixer With 10-dBm IIP3 and 9.5-dB Conversion Gain. 204-208
- Chang-Kyung Seong, Jinsoo Rhim, Woo-Young Choi: A 10-Gb/s Adaptive Look-Ahead Decision Feedback Equalizer With an Eye-Opening Monitor. 209-213
- Marco Sosio, Antonio Liscidini, Rinaldo Castello: A 2G/3G Cellular Analog Baseband Based on a Filtering ADC. 214-218
- Ramzi Darraji, Fadhel M. Ghannouchi: RF/DSP Codesign Methodology of Enhanced Doherty Amplifiers. 219-223
- Zhisheng Li, Guy Torfs, Johan Bauwelinck, Xin Yin, Jan Vandewege, Christophe van Praet, Peter Spiessens, Huub Tubbax, Frederic Stubbe: A 2.45-GHz +20-dBm Fast Switching Class-E Power Amplifier With 43% PAE and a 18-dB-Wide Power Range in 0.18-µm CMOS. 224-228
- Punith R. Surkanti, Paul M. Furth: Converting a Three-Stage Pseudoclass-AB Amplifier to a True-Class-AB Amplifier. 229-233
- Brandon Rumberg, David W. Graham: A Low-Power and High-Precision Programmable Analog Filter Bank. 234-238
- Longxing Shi, Wei Zhao, Jianhui Wu, Chao Chen: Digital Background Calibration Techniques for Pipelined ADC Based on Comparator Dithering. 239-243
- Leonel Sousa, Samuel Antao: MRC-Based RNS Reverse Converters for the Four-Moduli Sets 2n+1, 2n-1, 2n, 22n+1-1 and 2n+1, 2n-1, 22n, 22n+1-1. 244-248
- Andrea Calimera, Enrico Macii, Massimo Poncino: Design Techniques for NBTI-Tolerant Power-Gating Architectures. 249-253
Volume 59-II, Number 5, May 2012
- Tai Nghia Nguyen, Jong-Wook Lee: A K-band CMOS Differential Vackar VCO With the Gate Inductive Feedback. 257-261
- Qiong Zou, Kaixue Ma, Kiat Seng Yeo, Wei Meng Lim: Design of a Ku-band Low-Phase-Noise VCO Using the Dual LC Tanks. 262-266
- I-Ting Lee, Hung-Yu Lu, Shen-Iuan Liu: A 6-GHz All-Digital Fractional-N Frequency Synthesizer Using FIR-Embedded Noise Filtering Technique. 267-271
- Alper Ucar, Ediz Çetin, Izzet Kale: A Continuous-Time Delta-Sigma Modulator for RF Subsampling Receivers. 272-276
- Sang Min Lee, Shahin Mehdizad Taleie, Ganesh R. Saripalli, Dongwon Seo: Clock-Phase-Noise-Induced TX Leakage Estimation of a Baseband Wireless Transmitter DAC. 277-281
- Yunho Choi, Youngsu Kim, Huy Hoang, Franklin Bien: A 3.1-4.8-GHz IR-UWB All-Digital Pulse Generator With Variable Channel Selection in 0.13-µm CMOS Technology. 282-286
- Jen-Wei Lee, Ju-Hung Hsiao, Hsie-Chia Chang, Chen-Yi Lee: An Efficient DPA Countermeasure With Randomized Montgomery Operations for DF-ECC Processor. 287-291
- Shen-Fu Hsiao, Hou-Jen Ko, Chia-Sheng Wen: Two-Level Hardware Function Evaluation Based on Correction of Normalized Piecewise Difference Functions. 292-296
- Doru-Florin Chiper: Radix-2 Fast Algorithm for Computing Discrete Hartley Transform of Type III. 297-301
- Botond Sandor Kirei, Marius Neag, Marina Dana Topa: Blind Frequency-Selective I/Q Mismatch Compensation Using Subband Processing. 302-306
- Ashkan Ashrafi: On the SFDR Upperbound in DDFS Utilizing Polynomial Interpolation Methods. 307-311
- Hua Yang, Guo-Ping Jiang: High-Efficiency Differential-Chaos-Shift-Keying Scheme for Chaos-Based Noncoherent Communication. 312-316
- Leonel Sousa, Samuel Antao: Corrections to "MRC-Based RNS Reverse Converters for the Four-Moduli Sets 2n+1, 2n-1, 2n, 22n+1-1 and 2n+1, 2n-1, 22n, 22n+1-1". 317
Volume 59-II, Number 6, June 2012
- Janakan Sivasubramaniam, Hassan O. Elwan, Ali Ismail, Edward Youssoufian, Dzung Le, Mohammed Omar, Ahmed Emira: A 70-mW ISDB-T Tuner for VHF and UHF Bands. 321-325
- Shayan Shahramian, Hemesh Yasotharan, Anthony Chan Carusone: Decision Feedback Equalizer Architectures With Multiple Continuous-Time Infinite Impulse Response Filters. 326-330
- Xiao Pu, Ajay Kumar, Krishnaswamy Nagaraj: Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference. 331-335
- Jinho Han, Jaehyeok Yang, Hyeon-Min Bae: Analysis of a Frequency Acquisition Technique With a Stochastic Reference Clock Generator. 336-340
- Ze-kun Zhou, Pei-Sheng Zhu, Yue Shi, Hui-ying Wang, Ying-qian Ma, Xiang-zhu Xu, Lin Tan, Xin Ming, Bo Zhang: A CMOS Voltage Reference Based on Mutual Compensation of Vtn and Vtp. 341-345
- Xuan Zhang, Bojiong Ni, Ishita Mukhopadhyay, Alyssa B. Apsel: Improving Absolute Accuracy of Integrated Resistors With Device Diversification. 346-350
- Po-Yu Kuo, Siwat Saibua, Guanming Huang, Dian Zhou: An Efficient Method for Evaluating Analog Circuit Performance Bounds Under Process Variations. 351-355
- Edward N. Y. Ho, Philip K. T. Mok: Wide-Loading-Range Fully Integrated LDR With a Power-Supply Ripple Injection Filter. 356-360
- Xin Zhang, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya: A 1-V-Input Switched-Capacitor Voltage Converter With Voltage-Reference-Free Pulse-Density Modulation. 361-365
- Håkan Johansson: Fractional-Delay and Supersymmetric Mth-Band Linear-Phase FIR Filters Utilizing Partially Symmetric and Antisymmetric Impulse Responses. 366-370
- Yu-Chi Tsao, Ken Choi: Area-Efficient VLSI Implementation for Parallel Linear-Phase FIR Digital Filters of Odd Length Based on Fast FIR Algorithm. 371-375
- Xinmiao Zhang, Yu Zheng: Systematically Re-encoded Algebraic Soft-Decision Reed-Solomon Decoder. 376-380
- Kai He, Jin Sha, Zhongfeng Wang: Nonbinary LDPC Code Decoder Architecture With Efficient Check Node Processing. 381-385
Volume 59-II, Number 7, July 2012
- Tai Nghia Nguyen, Jong-Wook Lee: Ultralow-Power Ku-Band Dual-Feedback Armstrong VCO With a Wide Tuning Range. 394-398
- Prashant Dekate, William Redman-White, Domine Leenaerts, John R. Long: Broad-Band Odd-Number CMOS Prescalers With Quadrature/Symmetrical Outputs. 399-403
- Tomislav Matic, Tomislav Svedek, Marijan Herceg: A Method for the Schmitt-Trigger Propagation-Delay Compensation in Asynchronous Sigma-Delta Modulator. 404-408
- Hyouk-Kyu Cha, Woo-Tae Park, Minkyu Je: A CMOS Rectifier With a Cross-Coupled Latched Comparator for Wireless Power Transfer in Biomedical Applications. 409-413
- Jinyong Jeon, Yong-Joon Jeon, Young-Suk Son, Gyu-Hyeong Cho: A Direct Fast Feedback Current Driver Using an Inverting Amplifier for High-Quality AMOLED Displays. 414-418
- Leonard T. Bruton, Arjuna Madanayake, Chamith Wijenayake, Mona Maini: Continuous-Time Analog Two-Dimensional IIR Beam Filters. 419-423
- Ching-Che Chung, Duo Sheng, Chia-Lin Chang, Wei-Da Ho, Yang-Di Lin, Fang-Nien Lu: An All-Digital Large-N Audio Frequency Synthesizer for HDMI Applications. 424-428
- Ming-Hung Chang, Yi-Te Chiu, Wei Hwang: Design and Iso-Area Vmin Analysis of 9T Subthreshold SRAM With Bit-Interleaving Scheme in 65-nm CMOS. 429-433
- Basant K. Mohanty, Anurag Mahajan, Pramod Kumar Meher: Area- and Power-Efficient Architecture for High-Throughput Implementation of Lifting 2-D DWT. 434-438
- Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, M. Togo, N. Horiguchi, Guido Groeseneken: Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements. 439-442
- Tao Li, Wei Xing Zheng: New Stability Criterion for Fixed-Point State-Space Digital Filters With Generalized Overflow Arithmetic. 443-447
- Georges Kaddoum, François Gagnon: Design of a High-Data-Rate Differential Chaos-Shift Keying System. 448-452
- Qiao Zhu, Guang-Da Hu, Yi-Xin Yin: Lyapunov-Type Theorem of General Two-Dimensional Nonlinear Parameter-Varying FM Second Model. 453-457
Volume 59-II, Number 8, August 2012
- Behnam Sedighi, Johann-Christoph Scheytt: Low-Power SiGe BiCMOS Transimpedance Amplifier for 25-GBaud Optical Links. 461-465
- Fei Yuan, Yushi Zhou: A Phasor-Domain Study of Lock Range of Harmonic Oscillators With Multiple Injections. 466-470
- Timon Brückner, Matthias Lorenz, Christoph Zorn, Joachim Becker, Wolfgang Mathis, Maurits Ortmanns: Hardware-Accelerated Simulation Environment for CT Sigma-Delta Modulators Using an FPGA. 471-475
- Tao Mai, Yannis P. Tsividis: Internally Non-LTI Systems Based on Delays, With Application to Companding Signal Processors. 476-480
- Hyung-Min Lee, Maysam Ghovanloo: An Adaptive Reconfigurable Active Voltage Doubler/Rectifier for Extended-Range Inductive Power Transmission. 481-485
- Chutham Sawigun, Andreas Demosthenous, Xiao Liu, Wouter A. Serdijn: A Compact Rail-to-Rail Class-AB CMOS Buffer With Slew-Rate Enhancement. 486-490
- Young-Hoon Song, Samuel Palermo: A 6-Gbit/s Hybrid Voltage-Mode Transmitter With Current-Mode Equalization in 90-nm CMOS. 491-495
- Sergio Decherchi, Paolo Gastaldo, Alessio Leoncini, Rodolfo Zunino: Efficient Digital Implementation of Extreme Learning Machines for Classification. 496-500
- Roberto Gutierrez, Vicente Torres-Carot, Javier Valls: Hardware Architecture of a Gaussian Noise Generator Based on the Inversion Method. 501-505
- Muhammad Bilal, Shahid Masud, Shahrukh Athar: FPGA Design for Statistics-Inspired Approximate Sum-of-Squared-Error Computation in Multimedia Applications. 506-510
- Shin-Chi Lai, Yi-Ping Yeh, Sheau-Fang Lei: Corrections to 'Area- and Power-Efficient Design of Daubechies Wavelet Transforms Using Folded AIQ Mapping'. 511-514
- Wu-Hua Chen, Zipeng Wang, Xiaomei Lu: On Sampled-Data Control for Master-Slave Synchronization of Chaotic Lur'e Systems. 515-519
- Veaceslav Spinu, Nikolaos Athanasopoulos, Mircea Lazar, Georges Bitsoris: Stabilization of Bilinear Power Converters by Affine State Feedback Under Input and State Constraints. 520-524
- Ping Zhou, Tianyou Chai, Jin-Hui Zhao: DOB Design for Nonminimum-Phase Delay Systems and Its Application in Multivariable MPC Control. 525-529
Volume 59-II, Number 9, September 2012
- Mahmut E. Sinangil, Marcus Yip, Masood Qazi, Rahul Rithe, Joyce Kwong, Anantha P. Chandrakasan: Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems. 533-537
- Man Keun Kang, Tae Wook Kim: CMOS IR-UWB Receiver for ±9.7-mm Range Finding in a Multipath Environment. 538-542
- Hong Gul Han, Tae Wook Kim: A CMOS RF Programmable-Gain Amplifier for Digital TV With a +9-dBm IIP3 Cross-Coupled Common-Gate LNA. 543-547
- Amany El-Gouhary, Nathan M. Neihart: Inductor-Based Tuning in LC-Quadrature Oscillators: A Comparative Study. 548-552
- Wang-Soo Kim, Chang-Kyung Seong, Woo-Young Choi: A 5.4-Gbit/s Adaptive Continuous-Time Linear Equalizer Using Asynchronous Undersampling Histograms. 553-557
- Naga Sasidhar, David Gubbins, Pavan Kumar Hanumolu, Un-Ku Moon: Rail-to-Rail Input Pipelined ADC Incorporating Multistage Signal Mapping. 558-562
- Henry Park, Chih-Kong Ken Yang: Nearly Exact Analytical Formulation of the DNL Yield of the Digital-to-Analog Converter. 563-567
- Golam Chowdhury, A. Hassibi: An On-Chip Temperature Sensor With a Self-Discharging Diode in 32-nm SOI CMOS. 568-572
- Wei Zhao, Kwangsik Choi, Scott Bauman, Zeynep Dilli, Thomas Salter, Martin Peckerar: A Radio-Frequency Energy Harvesting Scheme for Use in Low-Power Ad Hoc Distributed Networks. 573-577
- I. Made Darmayuda, Yuan Gao, Meng Tong Tan, San-Jeow Cheng, Yuanjin Zheng, Minkyu Je, Chun-Huat Heng: A Self-Powered Power Conditioning IC for Piezoelectric Energy Harvesting From Short-Duration Vibrations. 578-582
- Pedro Reviriego, Oscar Ruano, Juan Antonio Maestro: Implementing Concurrent Error Detection in Infinite-Impulse-Response Filters. 583-586
- Woojin Rim, Woong Choi, Jongsun Park: Adaptive Clock Generation Technique for Variation-Aware Subthreshold Logics. 587-591
- Chao Gu, Jiaxiang Zhao, Wei Xu, Dongyan Sun: Design of Linear-Phase Notch Filters Based on the OMP Scheme and the Chebyshev Window. 592-596
- Zbigniew Galias, Xinghuo Yu: Dynamical Behaviors of Discretized Second-Order Terminal Sliding-Mode Control Systems. 597-601
- Liping Chen, Yi Chai, Ranchao Wu, Jing Yang: Stability and Stabilization of a Class of Nonlinear Fractional-Order Systems With Caputo Derivative. 602-606
- Zdenek Biolek, Dalibor Biolek, Viera Biolkova: Computation of the Area of Memristor Pinched Hysteresis Loop. 607-611
Volume 59-II, Number 10, 2012
- Pieter A. J. Nuyts, Brecht François, Wim Dehaene, Patrick Reynaert: A CMOS Burst-Mode Transmitter With Watt-Level RF PA and Flexible Fully Digital Front-End. 613-617
- Tomasz Podsiadlik, John Dooley, Ronan Farrell: Improved Coding-Efficiency Two-Level Source Encoder for RF Switch-Mode Power Amplifiers. 618-622
- Chi-Hsien Lin, Hong-Yeh Chang: A Low-Phase-Noise CMOS Quadrature Voltage-Controlled Oscillator Using a Self-Injection-Coupled Technique. 623-627
- Salvatore Levantino, Paolo Maffezzoni, Federico Pepe, Andrea Bonfanti, Carlo Samori, Andrea L. Lacaita: Efficient Calculation of the Impulse Sensitivity Function in Oscillators. 628-632
- Gennady A. Leonov, Nikolay V. Kuznetsov, M. V. Yuldashev, R. V. Yuldashev: Analytical Method for Computation of Phase-Detector Characteristic. 633-637
- Michele Bonnin, Fernando Corinto, Marco Gilli: Phase Space Decomposition for Phase Noise and Synchronization Analysis of Planar Nonlinear Oscillators. 638-642
- María de Rodanas Valero Bernal, Santiago Celma, Nicolás J. Medrano-Marqués, Belén Calvo: An Ultralow-Power Low-Voltage Class-AB Fully Differential OpAmp for Long-Life Autonomous Portable Equipment. 643-647
- Aliakbar Ghadiri, Kambiz K. Moez: Bandwidth Enhancement of On-Chip Transformers Using Negative Capacitance. 648-652
- Daeyun Kim, Minkyu Song: An Enhanced Dynamic-Range CMOS Image Sensor Using a Digital Logarithmic Single-Slope ADC. 653-657
- Eugene Paperno: Extending Blackman's Formula to Feedback Networks With Multiple Dependent Sources. 658-662
- Xinmiao Zhang, Zhongfeng Wang: A Low-Complexity Three-Error-Correcting BCH Decoder for Optical Transport Network. 663-667
- Chien-Ying Yu, Ching-Che Chung, Chia-Jung Yu, Chen-Yi Lee: A Low-Power DCO Using Interlaced Hysteresis Delay Cells. 673-677
- Vikram Pudi, K. Sridharan: New Decomposition Theorems on Majority Logic for Low-Delay Adder Designs in Quantum Dot Cellular Automata. 678-682
- Chien-Cheng Tseng, Su-Ling Lee: Designs of Fixed-Fractional-Delay Filters Using Fractional-Derivative Constraints. 683-687
- Rafael C. D. Paiva, Stefano D'Angelo, Jyri Pakarinen, Vesa Välimäki: Emulation of Operational Amplifiers and Diodes in Audio Distortion Circuits. 688-692
- Yu Jiang, Zhong-Ping Jiang: Robust Adaptive Dynamic Programming for Large-Scale Systems With an Application to Multimachine Power Systems. 693-697
Volume 59-II, Number 11, November 2012
- Okan Zafer Batur, E. Akdag, H. K. Akkurt, Ahmet Öncü, M. Koca, Günhan Dündar: An Ultra Low-Power Dual-Band IR-UWB Transmitter in 130-nm CMOS. 701-705
- Rong-Fu Ye, Tzyy-Sheng Horng, Jian-Ming Wu: Ultralow Power Injection-Locked GFSK Receiver for Short-Range Wireless Systems. 706-710
- Jonathan K. Brown, David D. Wentzloff: A Clock-Harvesting Receiver Using 3G CDMA Signals in the 1900-MHz Band. 711-715
- Jang-Woo Lee, Chang-Hyun Bae, Younghoon Kim, Changsik Yoo: Measurement of Intersymbol Interference Jitter by Fractional Oversampling for Adaptive Equalization. 716-720
- Dong-Woo Jee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim: A 1.9-GHz Fractional-N Digital PLL With Subexponent ΔΣ TDC and IIR-Based Noise Cancellation. 721-725
- Jonas Fritzin, Christer Svensson, Atila Alvandpour: Analysis of a 5.5-V Class-D Stage Used in +30-dBm Outphasing RF PAs in 130- and 65-nm CMOS. 726-730
- Qun Jane Gu, Kang Yang, Yi Xue, Zhiwei Xu, Adrian Tang, Chin-Chung Nien, T. H. Wu, Jenn-Hwan Tarng, Mau-Chung Frank Chang: A CMOS Integrated W-band Passive Imager. 736-740
- Young-Deuk Jeon, Jae-Won Nam, Kwi-Dong Kim, Tae Moon Roh, Jong-Kee Kwon: A Dual-Channel Pipelined ADC With Sub-ADC Based on Flash-SAR Architecture. 741-745
- Ren-Li Chen, Soon-Jyh Chang: A 6-bit Current-Steering DAC With Compound Current Cells for Both Communication and Rail-to-Rail Voltage-Source Applications. 746-750
- Jorge Fernandez-Berni, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez: Ultralow-Power Processing Array for Image Enhancement and Edge Detection. 751-755
- Henri Ruotsalainen, Holger Arthaber, Gottfried Magerl: A New Quadrature PWM Modulator With Tunable Center Frequency for Digital RF Transmitters. 756-760
- Hans Raben, Johan Borg, Jonny Johansson: A Model for MOS Diodes With Vth Cancellation in RFID Rectifiers. 761-765
- Kai Wang, Michael Z. Q. Chen: Generalized Series-Parallel RLC Synthesis Without Minimization for Biquadratic Impedances. 766-770
- Jun Yu, Wang Ling Goh, Muthukumaraswamy Annamalai Arasu, Minkyu Je: A 60-V, >225°C Half-Bridge Driver for Piezoelectric Acoustic Transducer, on SOI CMOS. 771-775
- Florent Gamand, Ming Dong Li, Christophe Gaquiere: A 10-MHz GaN HEMT DC/DC Boost Converter for Power Amplifier Applications. 776-779
- Jong-Min Baek, Dong-Jin Seo, Jung-Hoon Chun, Kee-Won Kwon: A Dual Charge Pump for Quiescent Touch Sensor Power Supply. 780-784
- Byoungho Kim, Jacob A. Abraham: Imbalance-Based Self-Test for High-Speed Mixed-Signal Embedded Systems. 785-789
- Jui-Jen Wu, Meng-Fan Chang, Shau-Wei Lu, Robert Lo, Quincy Li: A 45-nm Dual-Port SRAM Utilizing Write-Assist Cells Against Simultaneous Access Disturbances. 790-794
- José Luis Imaña: Efficient Polynomial Basis Multipliers for Type-II Irreducible Pentanomials. 795-799
- Jean-Charles Naud, Daniel Menard, Gabriel Caffarena, Olivier Sentieys: A Discrete Model for Correlation Between Quantization Noises. 800-804
- Zhenwei Miao, Xudong Jiang: Further Properties and a Fast Realization of the Iterative Truncated Arithmetic Mean Filter. 810-814
- Evren Cesur, Nerhun Yildiz, Vedat Tavsanoglu: On an Improved FPGA Implementation of CNN-Based Gabor-Type Filters. 815-819
- Shiping Wen, Zhigang Zeng, Tingwen Huang: H∞ Filtering for Neutral Systems With Mixed Delays and Multiplicative Noises. 820-824
- Xiaoguang Dong, Jianbin Qiu, You Ma, Huijun Gao: A New Approach to H∞ Filter Design for Systems With Time-Varying State Delay. 825-829
- Yogesh N. Joglekar, Natalia Meijome: Fourier Response of a Memristor: Generation of High Harmonics With Increasing Weights. 830-834
- Fei Chen, LinYing Xiang, Weiyao Lan, Guanrong Chen: Coordinated Tracking in Mean Square for a Multi-Agent System With Noisy Channels and Switching Directed Network Topologies. 835-839
Volume 59-II, Number 12, December 2012
- Massimo Alioto: Guest Editorial for the Special Issue on Ultra-Low-Voltage VLSI Circuits and Systems for Green Computing. 849-852
- Brian Zimmer, Seng Oon Toh, Huy Vo, Yunsup Lee, Olivier Thomas, Krste Asanovic, Borivoje Nikolic: SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS. 853-857
- Meilin Zhang, Vladimir Stojanovic, Paul Ampadu: Reliable Ultra-Low-Voltage Cache Design for Many-Core Systems. 858-862
- Chien-Yu Lu, Ming-Hsien Tu, Hao-I Yang, Ya-Ping Wu, Huan-Shun Huang, Yuh-Jiun Lin, Kuen-Di Lee, Yung-Shin Kao, Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang: A 0.33-V, 500-kHz, 3.94-µW 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist. 863-867
- Anh-Tuan Do, Truc Quynh Nguyen, Kiat Seng Yeo, Tony Tae-Hyoung Kim: Sensing Margin Enhancement Techniques for Ultra-Low-Voltage SRAMs Utilizing a Bitline-Boosting Current and Equalized Bitline Leakage. 868-872
- Adam Teman, Anatoli Mordakhay, Janna Mezhibovsky, Alexander Fish: A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability. 873-877
- Ming-Long Fan, Vita Pi-Ho Hu, Yin-Nien Chen, Pin Su, Ching-Te Chuang: Variability Analysis of Sense Amplifier for FinFET Subthreshold SRAM Applications. 878-882
- Na Gong, Shixiong Jiang, Anoosha Challapalli, Sherwin Fernandes, Ramalingam Sridhar: Ultra-Low Voltage Split-Data-Aware Embedded SRAM for Mobile Video Applications. 883-887
- Kuo-Hsing Cheng, Jen-Chieh Liu, Hong-Yi Huang: A 0.6-V 800-MHz All-Digital Phase-Locked Loop With a Digital Supply Regulator. 888-892
- Kwanyeob Chae, Saibal Mukhopadhyay: All-Digital Adaptive Clocking to Tolerate Transient Supply Noise in a Low-Voltage Operation. 893-897
- Nele Reynders, Wim Dehaene: Variation-Resilient Building Blocks for Ultra-Low-Energy Sub-Threshold Design. 898-902
- Armin Tajalli, Yusuf Leblebici: Wide-Range Dynamic Power Management in Low-Voltage Low-Power Subthreshold SCL. 903-907
- Pei-Yao Chang, Tay-Jyi Lin, Jinn-Shyan Wang, Yen-Hsiang Yu: A 4R/2W Register File Design for UDVS Microprocessors in 65-nm CMOS. 908-912
- Chris Winstead, Joachim Neves Rodrigues: Ultra-Low-Power Error Correction Circuits: Technology Scaling and Sub-VT Operation. 913-917
- Ryo Takahashi, Hidehiro Takata, Tadashi Yasufuku, Hiroshi Fuketa, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai: Large Within-Die Gate Delay Variations in Sub-Threshold Logic Circuits at Low Temperature. 918-921
- Marco Lanuzza, Pasquale Corsonello, Stefania Perri: Low-Power Level Shifter for Multi-Supply Voltage Designs. 922-926
- Mohammad Reza Kakoee, Igor Loi, Luca Benini: Variation-Tolerant Architecture for Ultra Low Power Shared-L1 Processor Clusters. 927-931
- Carlos Galup-Montoro, Márcio C. Schneider, Marcio Bender Machado: Ultra-Low-Voltage Operation of CMOS Analog Circuits: Amplifiers, Oscillators, and Rectifiers. 932-936
- Alicia Klinefelter, Yanqing Zhang, Brian P. Otis, Benton H. Calhoun: A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC. 937-941
- Peter Grossmann, Miriam Leeser, Marvin Onabajo: Minimum Energy Analysis and Experimental Verification of a Latch-Based Subthreshold FPGA. 942-946
- David Bol, Cédric Hocquet, Francesco Regazzoni: A Fast ULV Logic Synthesis Flow in Many-Vt CMOS Processes for Minimum Energy Under Timing Constraints. 947-951
- Dongsuk Jeon, Mingoo Seok, Zhengya Zhang, David Blaauw, Dennis Sylvester: Design Methodology for Voltage-Overscaled Ultra-Low-Power Systems. 952-956
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last updated on 2014-07-12T195749 by the dblp team