Volume 41, Number 1, January 1992

• 
  Ilana David, Ran Ginosar, Michael Yoeli: An Efficient Implementation of Boolean Functions as Self-Timed Circuits. 2-11
• 
  Ilana David, Ran Ginosar, Michael Yoeli: Implementing Sequential Machines as Self-Timed Circuits. 12-17
• 
  Chuan-lin Wu, Manjai Lee: Performance Analysis of Multistage Interconnection Network Configurations and Operations. 18-27
• 
  Yoshinori Yamamoto, Masao Mukaidono: P-Functions-Ternary Logic Functions Capable of Correcting Input Failures and Suitable for Treating Ambiguities. 28-35
• 
  Ambuj Goyal, Perwez Shahabuddin, Philip Heidelberger, Victor F. Nicola, Peter W. Glynn: A Unified Framework for Simulating Markovian Models of Highly Dependable Systems. 36-51
• 
  John Y. Sayah, Charles R. Kime: Test Scheduling in High Performance VLSI System Implementations. 52-67
• 
  Richard Fujimoto, Jya-Jang Tsai, Ganesh Gopalakrishnan: Design and Evaluation of the Rollback Chip: Special Purpose Hardware for Time Warp. 68-82
• 
  Krishna P. Belkhale, Prithviraj Banerjee: Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach. 83-96

• 
  Peter J. Varman, Kshitij Doshi: Sorting with Linear Speedup on a Pipelined Hypercube. 97-103
• 
  Yirng-An Chen, Youn-Long Lin, Long-Wen Chang: A Systolic Algorithm for the k-Nearest Neighbors Problem. 103-108
• 
  Benjamin Arazi: A Circular Binary Search. 109-112
• 
  Oscar H. Ibarra, Tao Jiang, Hui Wang: String Editing on a One-Way Linear Array of Finite-State Machines. 112-118
• 
  Guan-Ing Chen, Ten-Hwang Lai: Constructing Parallel Paths Betweesn Two Subcubes. 118-123
• 
  A. Boneh, Jacob Savir: Statistical Resistance to Detection. 123-126

Volume 41, Number 2, February 1992

• 
  Anthony J. McAuley: Four State Asynchronous Architectures. 129-142
• 
  Anujan Varma, Suresh Chalasani: Fault-Tolerance Analysis of One-Sided Crosspoint Switching Networks. 143-158
• 
  Yiwan Wong, Jean-Marc Delosme: Optimization of Computation Time for Systolic Arrays. 159-177
• 
  Kriss A. Schueller, Jon T. Butler: On the Design of Cost-Tables for Realizing Multiple-Valued Circuits. 178-189
• 
  Weijia Shang, José A. B. Fortes: Independent Partitioning of Algorithms with Uniform Dependencies. 190-206
• 
  Rick Bubenik, Willy Zwaenepoel: Optimistic Make. 207-217

• 
  Lowell Campbell, Gunnar E. Carlsson, Michael J. Dinneen, Vance Faber, Michael R. Fellows, Michael A. Langston, James W. Moore, Andrew P. Mullhaupt, Harlan B. Sexton: Small Diameter Symmetric Networks from Linear Groups. 218-220
• 
  Sy-Yen Kuo, W. Kent Fuchs: Fault Diagnosis and Spare Allocation for Yield Enhancement in Large Reconfigurable PLA's. 221-226
• 
  David T. Harper III: Increased Memory Performance During Vector Accesses Through the use of Linear Address Transformations. 227-230
• 
  Rami G. Melhem: Bi-Level Reconfigurations of Fault Tolerant Arrays. 231-239
• 
  Sivarama P. Dandamudi, Derek L. Eager: Hot-Spot Contention in Binary Hypercube Networks. 239-244
• 
  F. Zeynep Köksal, Melek D. Yücel: Comments on the Decoding Algorithms of DBEC-TBED Reed-Solomon Codes. 244-247
• 
  William J. Dally: A Fast Translation Method for Paging on top of Segmentation. 247-250
• 
  Jacob Savir, William H. McAnney: A Multiple Seed Linear Feedback Shift Register. 250-252
• 
  C. L. Chen: Symbol Error-Correcting Codes for Computer Memory Systems. 252-256

Volume 41, Number 3, March 1992

• 
  Nicholas S. Bowen, Christos Nikolaou, Arif Ghafoor: On the Assignment Problem of Arbitrary Process Systems to Heterogeneous Distributed Computer Systems. 257-273
• 
  Darwen Rau, José A. B. Fortes, Howard Jay Siegel: Destination Tag Routing Techniques Based on a State Model for the IADM Network. 274-285
• 
  Xian-He Sun, Hong Zhang, Lionel M. Ni: Efficient Tridiagonal Solvers on Multicomputers. 286-296
• 
  MenChow Chiang, Gurindar S. Sohi: Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-Oriented Environment. 297-317
• 
  Douglas M. Blough, Andrzej Pelc: Complexity of Fault Diagnosis in Comparison Models. 318-324
• 
  Kostas N. Oikonomou: Abstractions of Finite-State Machines and Immediately-Detectable Output Faults. 325-338

• 
  Peter R. Cappello, Willard L. Miranker: Systolic Super Summation with Reduced Hardware. 339-342
• 
  P. K. Lui, Jon C. Muzio: Boolean Matrix Transforms for the Minimization of Modulo-2 Canonical Expansions. 342-348
• 
  Barry Wilkinson: Comments on ``Design and Analysis of Arbitration Protocols''. 348-351
• 
  Chein-Wei Jen, Ding-Ming Kwai: Data Flow Representation of Iterative Algorithms for Systolic Arrays. 351-355
• 
  Jong-Chuang Tsay, Sy Yuan: Some Combinatorial Aspects of Parallel Algorithm Design for Matrix Multiplication. 355-361
• 
  Hong Jiang, Kenneth C. Smith: PPMB: A Partial-Multiple-Bus Multiprocessor Architecture with Improved Cost-Effectiveness. 361-366
• 
  Tai-Ching Tuan: On Optimal Single Jog River Routing. 366-369
• 
  Majid Sarrafzadeh, C. K. Wong: Bottleneck Steiner Trees in the Plane. 370-374
• 
  Kwang-Ting Cheng, Vishwani D. Agrawal: Initializability Consideration in Sequential Machine Synthesis. 374-379
• 
  Mohammed Atiquzzaman, W. H. Shehadah: A Microprocessor-Based Office Image Processing System-An Extension of Work. 379-384

Volume 41, Number 4, April 1992

• 
  Dominique Thiébaut, Joel L. Wolf, Harold S. Stone: Synthetic Traces for Trace-Driven Simulation of Cache Memories. 388-410, (Corrigendum: IEEE Transactions on Computers 42(5): 635-636, Comments: IEEE Transactions on Computers 43(1): 125-126)
• 
  Dimitris Nikolos, Alexandros Krokos: Theory and Design of t-Error Correcting, k-Error Detecting and d-Unidirectional Error Detecting Codes with d > k > t. 411-419
• 
  Yennun Huang, Pankaj Jalote: Effect of Fault Tolerance on Response Time-Analysis of the Primary Site Approach. 420-428
• 
  Ahmed E. Barbour: Solutions to the Minimization Problem of Fault-Tolerant Logic Circuits. 429-443
• 
  Jack W. Davidson, John R. Rabung, David B. Whalley: Relating Static and Dynamic Machine Code Measurements. 444-454
• 
  Wim P. Groenendijk, Hanoch Levy: Performance Analysis of Transaction Driven Computer Systems via Queueing Analysis of Polling Models. 455-466
• 
  Po-Jen Chuang, Nian-Feng Tzeng: A Fast Recognition-Complete Processor Allocation Strategy for Hypercube Computers. 467-479
• 
  Charles Knessl, Charles Tier: Asymptotic Expansions for Large Closed Queueing Networks with Multiple Job Classes. 480-488

• 
  Snehamay Kundu: Basis Sets for Synthesis of Switching Functions. 489-493
• 
  Yehoshua Perl, Loizos Gabriel: Arithmetic Interpolation Search for Alphabetic Tables. 493-499
• 
  De-Lei Lee: Architecture of an Array Processor Using a Nonlinear Skewing Scheme. 499-505
• 
  Chris J. Mitchell: Authenticating Multicast Internet Electronic Mail Messages Using a Bidirectional MAC is Insecure. 505-507
• 
  Dilip Sarkar, Amar Mukherjee: Design of Optimal Systolic Algorithms for the Transitive Closure Problem. 508-512

Volume 41, Number 5, May 1992

• 
  Nicholas S. Bowen, Dhiraj K. Pradhan: Virtual Checkpoints: Architecture and Performance. 516-525
• 
  E. N. Elnozahy, Willy Zwaenepoel: Manetho: Transparent Rollback-Recovery with Low Overhead, Limited Rollback, and Fast Output Commit. 526-531
• 
  V. S. S. Nair, Yatin Vasant Hoskote, Jacob A. Abraham: Probabilistic Evaluation of On-Line Checks in Fault-Tolerant Multiprocessor Systems. 532-541
• 
  Santosh K. Shrivastava, Paul D. Ezhilchelvan, Neil A. Speirs, Sha Tao, Alan Tully: Principal Features of the VOLTAN Family of Reliable Node Architectures for Distributed Systems. 542-549
• 
  Robert Geist, A. Jefferson Offutt, Frederick C. Harris Jr.: Estimation and Enhancement of Real-Time Software Reliability Through Mutation Analysis. 550-558
• 
  Edward W. Czeck, Daniel P. Siewiorek: Observations on the Effects of Fault Manifestation as a Function of Workload. 559-566
• 
  Dong Tang, Ravishankar K. Iyer: Analysis and Modeling of Correlated Failures in Multicomputer Systems. 567-577
• 
  Frank Thomson Leighton, Bruce M. Maggs: Fast Algorithms for Routing Around Faults in Multibutterflies and Randomly-Wired Splitter Networks. 578-587
• 
  Shantanu Dutt, John P. Hayes: Some Practical Issues in the Design of Fault-Tolerant Multiprocessors. 588-598
• 
  Jehoshua Bruck, Robert Cypher, Danny Soroker: Tolerating Faults in Hypercubes Using Subcube Partitioning. 599-605
• 
  Sampath Rangarajan, Donald S. Fussell: Diagnosing Arbitrarily Connected Parallel Computers with High Probability. 606-615
• 
  Ronald P. Bianchini Jr., Richard W. Buskens: Implementation of On-Line Distributed System-Level Diagnosis Theory. 616-626
• 
  Irith Pomeranz, Sudhakar M. Reddy: The Multiple Observation Time Test Strategy. 627-637
• 
  Nirmal R. Saxena, Piero Franco, Edward J. McCluskey: Simple Bounds on Serial Signature Analysis Aliasing for Random Testing. 638-645
• 
  Yervant Zorian, André Ivanov: An Effective BIST Scheme for ROM's. 646-653
• 
  Xiaoqing Wen, Kozo Kinoshita: A Testable Design of Logic Circuits under Highly Observable Condition. 654-659

Volume 41, Number 6, June 1992

• 
  Heh-Tyan Liaw, Chen-Shang Lin: On the OBDD-Representation of General Boolean Functions. 661-664
• 
  Dominique Thiébaut, Harold S. Stone: Improving Disk Cache Hit-Ratios Through Cache Partitioning. 665-676
• 
  Masaru Takesue: Cache Memories for Data Flow Machines. 677-687
• 
  Eun Sei Park, M. Ray Mercer, Thomas W. Williams: The Total Delay Fault Model and Statistical Delay Fault Coverage. 688-698
• 
  Krishna P. Belkhale, Prithviraj Banerjee: Parallel Algorithms for Geometric Connected Component Labeling on a Hypercube Multiprocessor. 699-709
• 
  John K. Antonio, Garng M. Huang, Wei Kang Tsai: A Fast Distributed Shortest Path Algorithm for a Class of Hierarchically Clustered Data Networks. 710-724
• 
  Yuval Tamir, Gregory L. Frazier: Dynamically-Allocated Multi-Queue Buffers for VLSI Communication Switches. 725-737
• 
  Barry Wilkinson: On Crossbar Switch and Multiple Bus Interconnection Networks with Overlapping Connectivity. 738-746
• 
  Ashwani K. Ramani, Pradip K. Chande, Pramod C. Sharma: A General Model for Performance Investigations of Priority Based Multiprocessor System. 747-754
• 
  Mee Yee Chan, Francis Y. L. Chin: General Schedulers for the Pinwheel Problem Based on Double-Integer Reduction. 755-768

• 
  Pierre Hansen, Keh-Wei Lih: Improved Algorithms for Partitioning Problems in Parallel, Pipelined, and Distributed Computing. 769-771
• 
  Jean R. S. Blair, Errol L. Lloyd: Minimizing External Wires in Generalized Single-Row Routing. 771-776
• 
  Richard S. Stevens, David J. Kaplan: Determinacy of Generalized Schema. 776-779
• 
  Andrzej Pelc: Optimal Fault Diagnosis in Comparison Models. 779-786
• 
  Mark G. Arnold, Thomas A. Bailey, John R. Cowles: Comments on "An Architecture for Addition and Subtraction of Long Word Length Numbers in the Logarithmic Number System''. 786-788

Volume 41, Number 7, July 1992

• 
  Anoop Gupta, Wolf-Dietrich Weber: Cache Invalidation Patterns in Shared-Memory Multiprocessors. 794-810, (Correction: IEEE Transactions on Computers 41(12): 1631-1632)
• 
  Jaswinder Pal Singh, Harold S. Stone, Dominique Thiébaut: A Model of Workloads and Its Use in Miss-Rate Prediction for Fully Associative Caches. 811-825
• 
  Augustus K. Uht: Concurrency Extraction via Hardware Methods Executing the Static Instruction Stream. 826-841
• 
  Anindo Bagchi, S. Louis Hakimi: Data Transfers in Broadcast Networks. 842-847
• 
  Miguel Angel Fiol, Anna S. Lladó: The Partial Line Digraph Technique in the Design of Large Interconnection Networks. 848-857
• 
  Morteza Afghahi, Christer Svensson: Performance of Synchronous and Asynchronous Schemes for VLSI Systems. 858-872

• 
  Ching-Tien Ho: An Observation on the Bisectional Interconnection Networks. 873-877
• 
  Cheol-Hoon Lee, Dongmyun Lee, Myunghwan Kim: Optimal Task Assignment in Linear Array Networks. 877-880
• 
  D. L. Tao, Carlos R. P. Hartmann, Parag K. Lala: A General Technique for Designing Totally Self-Checking Checker for 1-out-of-N Code with Minimum Gate Delay. 881-886
• 
  Naofumi Takagi, Shuzo Yajima: Modular Multiplication Hardware Algorithms with a Redundant Representation and Their Application to RSA Cryptosystem. 887-891
• 
  Nick Kanopoulos, Dimitris Pantzartzis, Frederick R. Bartram: Design of Self-Checking Circuits Using DCVS Logic: A Case Study. 891-896
• 
  Andrea S. LaPaugh, Richard J. Lipton, Jonathan S. Sandberg: How to Store a Triangular Matrix. 896-899
• 
  Arun K. Somani, Vinod K. Agarwal: Distributed Diagnosis Algorithms for Regular Interconnected Structures. 899-906
• 
  Anastasios Vergis: On the Testability of One-Dimensional ILA's for Multiple Sequential Faults. 906-916

Volume 41, Number 8, August 1992

• 
  Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija: Delay Optimization of Carry-Skip Adders and Block Carry-Lookahead Adders Using Multidimensional Dynamic Programming. 920-930
• 
  Thomas Lynch, Earl E. Swartzlander Jr.: A Spanning Tree Carry Lookahead Adder. 931-939
• 
  Zhi-Jian (Alex) Mou, Francis Jutand: ``Overturned-Stairs'' Adder Trees and Multiplier Design. 940-948
• 
  Naofumi Takagi: A Radix-4 Modular Multiplication Hardware Algorithm for Modular Exponentiation. 949-956
• 
  Alexander Skavantzos, Poornachandra B. Rao: New Multipliers Modulo 2^N - 1. 957-961
• 
  M. Anwarul Hasan, Muzhong Wang, Vijay K. Bhargava: Modular Construction of Low Complexity Parallel Multipliers for a Class of Finite Fields GF(2^m). 962-971
• 
  M. Anwarul Hasan, Vijay K. Bhargava: Bit-Serial Systolic Divider and Multiplier for Finite Fields GF(2^m). 972-980
• 
  Derek C. Wong, Michael J. Flynn: Fast Division Using Accurate Quotient Approximations to Reduce the Number of Iterations. 981-995
• 
  Tomás Lang, Paolo Montuschi: Higher Radix Square Root with Prescaling. 996-1009
• 
  Dirk Timmermann, Helmut Hahn, Bedrich J. Hosticka: Low Latency Time CORDIC Algorithms. 1010-1015
• 
  Jeong-A. Lee, Tomás Lang: Constant-Factor Redundant CORDIC for Angle Calculation and Rotation. 1016-1025
• 
  Mi Lu, Jen-Shiun Chiang: A Novel Division Algorithm for the Residue Number System. 1026-1032
• 
  Hidetoshi Yokoo: Overflow/Underflow-Free Floating-Point Number Representations with Self-Delimiting Variable-Length Exponent Field. 1033-1039
• 
  Mark G. Arnold, Thomas A. Bailey, John R. Cowles, Mark D. Winkel: Applying Features of IEEE 754 to Sign/Logarithm Arithmetic. 1040-1050

Volume 41, Number 9, September 1992

• 
  Harold S. Stone, John Turek, Joel L. Wolf: Optimal Partitioning of Cache Memory. 1054-1068
• 
  Barry S. Fagin: Fast Addition of Large Integers. 1069-1077
• 
  Charles H. Stapper, Hsing-San Lee: Synergistic Fault-Tolerance for Memory Chips. 1078-1087
• 
  Aloke Guha, Larry L. Kinney: Relating the Cyclic Behavior of Linear and Intrainverted Feedback Shift Registers. 1088-1100
• 
  Thyagaraju R. Damarla: Generalized Transforms for Multiple Valued Circuits and Their Fault Detection. 1101-1109
• 
  Mirjana Zafirovic-Vukotic, Ignas G. Niemegeers: A Performance Modeling and Evaluation of the Cambridge Fast Ring. 1110-1125
• 
  Douglas M. Blough, Gregory F. Sullivan, Gerald M. Masson: Efficient Diagnosis of Multiprocessor Systems under Probabilistic Models. 1126-1136
• 
  Charles B. Silio Jr., Hatem M. Ghafir, Manish R. Parikh: An Approximate Method for the Performance Analysis of PLAYTHROUGH Rings. 1137-1155
• 
  Sol M. Shatz, Jia-Ping Wang, Masanori Goto: Task Allocation for Maximizing Reliability of Distributed Computer Systems. 1156-1168

• 
  Vicki H. Allan, Bogong Su, Pantung Wijaya, Jian Wang: Foresighted Instruction Scheduling Under Timing Constraints. 1169-1172
• 
  Kuo-Liang Chung, Wen-Chin Chen, Ferng-Ching Lin: On the Complexity of Search Algorithms. 1172-1180
• 
  Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin, TingTing Hwang: ELM-A Fast Addition Algorithm Discovered by a Program. 1181-1184
• 
  Nen-Fu Huang: On the Complexity of Two Circle Strongly Connecting Problems. 1185-1188
• 
  Jacobus H. Weber, Cornelis de Vroedt, Dick E. Boekee: Necessary and Sufficient Conditions on Block Codes Correcting/Detecting Errors of Various Types. 1189-1193
• 
  Noé Lopez-Benitez, José A. B. Fortes: Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays. 1193-1200

Volume 41, Number 10, October 1992

• 
  Isaac D. Scherson, David A. Kramer, Brian D. Alleyne: Bit-Parallel Arithmetic in a Massively-Parallel Associative Processor. 1201-1210
• 
  Hans Mulder, Michael J. Flynn: Processor Architecture and Data Buffering. 1211-1222
• 
  Patrick W. Dowd: Wavelength Division Multiple Access Channel Hypercube Processor Interconnection. 1223-1241
• 
  Tze Chiang Lee, John P. Hayes: A Fault-Tolerant Communication Scheme for Hypercube Computers. 1242-1256
• 
  Dilip D. Kandlur, Kang G. Shin: Traffic Routing for Multicomputer Networks with Virtual Cut-Through Capability. 1257-1270
• 
  Philippe Nain, Donald F. Towsley: Comparison of Hybrid Minimum Laxity/First-In-First-Out Scheduling Policies for Real-Time Multiprocessors. 1271-1278
• 
  Robert F. Berry: Computer Benchmark Evaluation and Design of Experiments, a Case Study. 1279-1289
• 
  Randy Allen, Ken Kennedy: Vector Register Allocation. 1290-1317

• 
  Jehoshua Bruck, Mario Blaum: New Techniques for Constructing EC/AUED Codes. 1318-1324
• 
  Ronald J. Cosentino, John J. Vaccaro: Adaptation of the Mactaggart and Jack Complex Multiplication Algorithm for Floating-Point Operators. 1324-1326
• 
  Kwang Soo Hong, Joseph Y.-T. Leung: On-Line Scheduling of Real-Time Tasks. 1326-1331
• 
  Alexander Skavantzos, Thanos Stouraitis: Decomposition of Complex Multipliers Using Polynomial Encoding. 1331-1333, (comments: March 94)
• 
  Y. C. Lim: Single-Precision Multiplier with Reduced Circuit Complexity for Signal Processing Applications. 1333-1336
• 
  Brian Alspach: Cayley Graphs with Optimal Fault Tolerance. 1337-1339
• 
  Fabrizio Lombardi, Chao Feng, Wei-Kang Huang: Detection and Location of Multiple Faults in Baseline Interconnection Networks. 1340-1344
• 
  Sterling R. Whitaker, Gary K. Maki: Self Synchronized Asynchronous Sequential Pass Transistor Circuits. 1344-1348

Volume 41, Number 11, November 1992

• 
  Janusz A. Brzozowski, Jo C. Ebergen: On the Delay-Sensitivity of Gate Networks. 1349-1360
• 
  Yao-Ming Yeh, Tse-Yun Feng: On a Class of Rearrangeable Networks. 1361-1379
• 
  Endre Boros, Peter L. Hammer, Ron Shamir: A Polynomial Algorithm for Balancing Acyclic Data Flow Graphs. 1380-1385
• 
  Abhijit Sengupta, Anton T. Dahbura: On Self-Diagnosable Multiprocessor Systems: Diagnosis by the Comparison Approach. 1386-1396
• 
  Seyed H. Hosseini, Nizar Jamal: Efficient Distributed Algorithms for Self Testing of Multiple Processor Systems. 1397-1409
• 
  Pierre Fraigniaud: Asymptotically Optimal Broadcasting and Gossiping in Faulty Hypercube Multicomputers. 1410-1419
• 
  Nian-Feng Tzeng: A Cost-Effective Combining Structure for Large-Scale Shared-Memory Multiprocessors. 1420-1429
• 
  Douglas M. Blough, Gregory F. Sullivan, Gerald M. Masson: Intermittent Fault Diagnosis in Multiprocessor Systems. 1430-1441
• 
  Elias Drakopoulos, Matt J. Merges: Performance Analysis of Client-Server Storage Systems. 1442-1452
• 
  Glenn A. Orton, Lloyd E. Peppard, Stafford E. Tavares: New Fault Tolerant Techniques for Residue Number Systems. 1453-1464
• 
  Sampalli Srinivas, Nripendra N. Biswas: Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures. 1465-1478

• 
  David Goldfeld, Tuvi Etzion: UPP Graphs and UMFA Networks-Architecture for Parallel Systems. 1479-1483
• 
  Jordi Cortadella, José M. Llabería: Evaluation of A + B = K Conditions Without Carry Propagation. 1484-1488, (comments: March 94)
• 
  Jon M. Peha, Fouad A. Tobagi: Comments on ``Tolerance of Double-Loop Computer Networks to Multinode Failures''. IEEE Trans. Comput., vol. 38, no. 5, pp. 738-741, May 1989. 1488-1490
• 
  Guu-chang Yang, Thomas E. Fuja: The Reliability of Systems with Two Levels of Fault Tolerance: The Return of the "Birthday Surprise". 1490-1496

Volume 41, Number 12, December 1992

• 
  Milos D. Ercegovac, Tomás Lang: On-the-Fly Rounding. 1497-1503
• 
  Divyakant Agrawal, Jonathan R. Agre: Recovering from Multiple Process Failures in the Time Warp Mechanism. 1504-1514
• 
  Gwan S. Choi, Ravishankar K. Iyer: FOCUS: An Experimental Environment for Fault Sensitivity Analysis. 1515-1526
• 
  Franz Fink, Karl Fuchs, Michael H. Schulz: Robust and Nonrobust Path Delay Fault Simulation by Parallel Processing of Patterns. 1527-1536
• 
  Wen-mei W. Hwu, Pohua P. Chang: Efficient Instruction Sequencing with Inline Target Insertion. 1537-1551
• 
  Trevor G. Clarkson, Denise Gorse, John G. Taylor, C. K. Ng: Learning Probabilistic RAM Nets Using VLSI Structures. 1552-1561
• 
  Andrzej Hlawiczka: Parallel Signature Analyzers Using Hybrid Design of Their Linear Feedbacks. 1562-1571
• 
  Ramesh Krishnamurti: An Approximation Algorithm for Scheduling Tasks on Varying Partition Sizes in Partitionable Multiprocessor Systems. 1572-1579
• 
  Rohit Kapur, M. Ray Mercer: Bounding Signal Probabilities for Testability Measurement Using Conditional Syndromes. 1580-1588

• 
  Matthew T. O'Keefe, José A. B. Fortes, Benjamin W. Wah: On the Relationship Between Two Systolic Array Design Mehodologies. 1589-1593
• 
  Graham M. Megson: A Fast Faddeev Array. 1594-1600
• 
  Bella Bose, Sulaiman Al-Bassam: Byte Unidirectional Error Correcting and Detecting Codes. 1601-1606
• 
  Paolo Montuschi, Luigi Ciminiera: Design of a Radix 4 Division Unit with Simple Selection Table. 1606-1611
• 
  Nhon T. Quach, Michael J. Flynn: High-Speed Addition in CMOS. 1612-1615
• 
  Sy-Yen Kuo, Sheng-Chiech Liang: Concurrent Error Detection and Correction in Real-Time Systolic Sorting Arrays. 1615-1620
• 
  Ahmed E. Kamal: An Algorithm for the Efficient Utilization of Bandwidth in the Slotted Ring. 1620-1627
• 
  Eric J. Schwabe: A Benes-like Theorem for the Shuffle-Exchange Graph. 1627-1630

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