Volume 2, Number 1, March 2005

• 
  Brad Calder, Dean M. Tullsen: Introduction. 1-2
• 
  Yuanyuan Zhou, Pin Zhou, Feng Qin, Wei Liu, Josep Torrellas: Efficient and flexible architectural support for dynamic monitoring. 3-33
• 
  Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar: A way-halting cache for low-energy high-performance systems. 34-54
• 
  Jaume Abella, Antonio González, Xavier Vera, Michael F. P. O'Boyle: IATAC: a smart predictor to turn-off L2 cache lines. 55-77
• 
  John W. Haskins Jr., Kevin Skadron: Accelerated warmup for sampled microarchitecture simulation. 78-108

Volume 2, Number 2, June 2005

• 
  Tao Li, Ravi Bhargava, Lizy Kurian John: Adapting branch-target buffer to improve the target predictability of java code. 109-130
• 
  Lingli Zhang, Chandra Krintz: The design, implementation, and evaluation of adaptive code unloading for resource-constrained devices. 131-164
• 
  Prasad A. Kulkarni, Stephen Hines, David B. Whalley, Jason Hiser, Jack W. Davidson, Douglas L. Jones: Fast and efficient searches for effective optimization-phase sequences. 165-198
• 
  Esther Salamí, Mateo Valero: Dynamic memory interval test vs. interprocedural pointer analysis in multimedia applications. 199-219

Volume 2, Number 3, September 2005

• 
  Yan Meng, Timothy Sherwood, Ryan Kastner: Exploring the limits of leakage power reduction in caches. 221-246
• 
  María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas: Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors. 247-279
• 
  David Tarjan, Kevin Skadron: Merging path and gshare indexing in perceptron branch prediction. 280-300
• 
  Xiangyu Zhang, Rajiv Gupta: Whole execution traces and their applications. 301-334

Volume 2, Number 4, December 2005

• 
  Wankang Zhao, David B. Whalley, Christopher A. Healy, Frank Mueller: Improving WCET by applying a WC code-positioning optimization. 335-365
• 
  George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee: Software-controlled fault tolerance. 366-396
• 
  Jian Li, José F. Martínez: Power-performance considerations of parallel computing on chip multiprocessors. 397-422
• 
  Saurabh Sharma, Jesse G. Beu, Thomas M. Conte: Spectral prefetcher: An effective mechanism for L2 cache prefetching. 423-450

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