Volume 44, Number 1, January 2004

• 
  Enrique Miranda, Jordi Suñé: Electron transport through broken down ultra-thin SiO₂ layers in MOS devices. 1-23
• 
  M. M. De Souza, S. K. Manhas, D. Chandra Sekhar, A. S. Oates, Prasad Chaparala: Influence of mobility model on extraction of stress dependent source-drain series resistance. 25-32
• 
  Steven H. Voldman: A review of electrostatic discharge (ESD) in advanced semiconductor technology. 33-46
• 
  Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, Sang Sik Park, Jung Chak Ahn, Yong Hee Lee: Effects of electrical stress on mid-gap interface trap density and capture cross sections in n-MOSFETs characterized by pulsed interface probing measurements. 47-51
• 
  Mohamed A. Imam, Mohamed A. Osman, Ashraf A. Osman: Simulation of partially and near fully depleted SOI MOSFET devices and circuits using SPICE compatible physical subcircuit model. 53-63
• 
  A. Bravaix, D. Goguenheim, N. Revil, E. Vincent: Hole injection enhanced hot-carrier degradation in PMOSFETs used for systems on chip applications with 6.5-2 nm thick gate-oxides. 65-77
• 
  G. Bonnet, P. Austin, J. L. Sanchez: New distributed model of NPT IGBT dedicated to power circuits design. 79-88
• 
  Enhai Zhao, Zeynep Çelik-Butler, Frank Thiel, Ranadeep Dutta: Origin of 1/f noise in lateral PNP bipolar transistors. 89-94
• 
  Josep Altet, Jean-Michel Rampnoux, Jean-Christophe Batsale, Stefan Dilhaire, Antonio Rubio, Wilfrid Claeys, Stéphane Grauby: Applications of temperature phase measurements to IC testing. 95-103
• 
  Tong Yan Tee, Zhaowei Zhong: Integrated vapor pressure, hygroswelling, and thermo-mechanical stress modeling of QFN package during reflow with interfacial fracture mechanics analysis. 105-114
• 
  P. Towashiraporn, G. Subbarayan, B. McIlvanie, B. C. Hunter, D. Love, B. Sullivan: The effect of model building on the accuracy of fatigue life predictions in electronic packages. 115-127
• 
  Rajendra M. Patrikar, K. Murali, Li Er Ping: Thermal distribution calculations for block level placement in embedded systems. 129-134
• 
  Jad S. Rasul: Chip on paper technology utilizing anisotropically conductive adhesive for smart label applications. 135-140
• 
  Jiri Jakovenko, Miroslav Husak, Tibor Lalinsky: Design and simulation of micromechanical thermal converter for RF power sensor microsystem. 141-148
• 
  Taizo Tomioka, Tomohiro Iguchi, Ikuo Mori: Thermosonic flip-chip bonding for SAW filter. 149-154
• 
  Jong-heon Kim, In-Soo Kang, Chi-jung Song, Young-Jik Hur, Hak-Nam Kim, Esdy Baek, Tae-Jun Seo: Flip-chip packaging solution for CMOS image sensor device. 155-161
• 
  E. Miranda, E. Mallaina: Single-equation model for low and high voltage soft breakdown conduction. 163-166
• 
  K. S. Kim, H. I. Kim, C. H. Yu, E. G. Chang: Fatigue analysis of high-speed photodiode submodule by using FEM. 167-171
• 
  Mile K. Stojcev, Goran L. Djordjevic, Tatjana R. Stankovic: Implementation of self-checking two-level combinational logic on FPGA and CPLD circuits. 173-178
• 
  Mile K. Stojcev: System on chip design languages; Anne Mignotte, Eugenio Villar, Lynn Horobin, editors, Kluwer Academic Publishers, Boston, 2002. Hardcover, pp 283, plus IX, ISBN 1-4020-7046-2. 179
• 
  Mile K. Stojcev: Design criteria for low distortion in feedback OPAMP circuits; Bjornar Hernes, Trond Saether, Kluwer Academic Publishers, Boston, 2003. Hardcover, pp 160, plus XXV, ISBN 1-4020-7356-9. 181-182

Volume 44, Number 2, February 2004

• 
  Young-Hee Kim, Jack C. Lee: Reliability characteristics of high-k dielectrics. 183-193
• 
  Christine S. Hau-Riege: An introduction to Cu electromigration. 195-205
• 
  Yi-Mu Lee, Yider Wu, Gerald Lucovsky: Breakdown and reliability of p-MOS devices with stacked RPECVD oxide/nitride gate dielectric under constant voltage stress. 207-212
• 
  Chih-Yao Huang, Wei-Fang Chen, Song-Yu Chuan, Fu-Chien Chiu, Jeng-Chou Tseng, I-Cheng Lin, Chuan-Jane Chao, Len-Yi Leu, Ming-Dou Ker: Design optimization of ESD protection and latchup prevention for a serial I/O IC. 213-221
• 
  A. Bouhdada, R. Marrakh, F. Vigué, J.-P. Faurie: Modeling of the spectral response of PIN photodetectors Impact of exposed zone thickness, surface recombination velocity and trap concentration. 223-228
• 
  Takeshi Yanagisawa, Takeshi Kojima, Tadamasa Koyanagi: Behavior of Cu(In, Ga)Se₂ solar cells under light/damp heat over time. 229-235
• 
  Hyun Ho Kim, Byeong Kwon Ju, Yun Hi Lee, Si Hyung Lee, Jeon Kook Lee, Soo Won Kim: Fabrication of suspended thin film resonator for application of RF bandpass filter. 237-243
• 
  Simone Lee, Ramesh Ramadoss, Michael Buck, V. M. Bright, K. C. Gupta, Y. C. Lee: Reliability testing of flexible printed circuit-based RF MEMS capacitive switches. 245-250
• 
  Yi Tao, Ajay P. Malshe, William D. Brown: Selective bonding and encapsulation for wafer-level vacuum packaging of MEMS and related micro systems. 251-258
• 
  Jason Y. L. Goh, Mark C. Pitter, Chung W. See, Michael G. Somekh, Daniel Vanderstraeten: Sub-pixel image correlation: an alternative to SAM and dye penetrant for crack detection and mechanical stress localisation in semiconductor packages. 259-267
• 
  Ikuo Shohji, Hideo Mori, Yasumitsu Orii: Solder joint reliability evaluation of chip scale package using a modified Coffin-Manson equation. 269-274
• 
  Daniel T. Rooney, N. Todd Castello, Mike Cibulsky, Doug Abbott, Dongji Xie: Materials characterization of the effect of mechanical bending on area array package interconnects. 275-285
• 
  Cristina Lopez, Liang Chai, Aziz Shaikh, Vern Stygar: Wire bonding characteristics of gold conductors for low temperature co-fired ceramic applications. 287-294
• 
  Y. P. Wu, M. O. Alam, Y. C. Chan, B. Y. Wu: Dynamic strength of anisotropic conductive joints in flip chip on glass and flip chip on flex packages. 295-302
• 
  Katsuhito Yoshida, Hideaki Morigami: Thermal properties of diamond/copper composite material. 303-308
• 
  Barbara Pahl, Christine Kallmayer, Rolf Aschenbrenner, Herbert Reichl: Long time reliability study of soldered flip chips on flexible substrates. 309-314
• 
  Seok Hwan Moon, Gunn Hwang, Sang Choon Ko, Youn Tae Kim: Experimental study on the thermal performance of micro-heat pipe with cross-section of polygon. 315-321
• 
  Esther Wai Ching Yau, Jing Feng Gong, Philip Chan: Al surface morphology effect on flip-chip solder bump shear strength. 323-331
• 
  Arun Ramakrishnan, Michael G. Pecht: Load characterization during transportation. 333-338
• 
  Juan A. Carrasco, Víctor Suñé: Combinatorial methods for the evaluation of yield and operational reliability of fault-tolerant systems-on-chip. 339-350
• 
  W. Dabrowski, Pawel Grybos, T. Fiutowski: Design for good matching in multichannel low-noise amplifier for recording neuronal signals in modern neuroscience experiments. 351-361
• 
  Mile K. Stojcev: Interconnecting and Computing over Satellite Networks; Yongguang Zhang (Ed.). Kluwer Academic Publishers, Boston, 2003. Hardcover, pp 262, plus XXII, ISBN 1-4020-7424-7. 363-364

Volume 44, Number 3, March 2004

• 
  Baozhen Li, Timothy D. Sullivan, Tom C. Lee, Dinesh Badami: Reliability challenges for copper interconnects. 365-380
• 
  Ming-C. Cheng, Feixia Yu, Lin Jun, Min Shen, Goodarz Ahmadi: Steady-state and dynamic thermal models for heat flow analysis of silicon-on-insulator MOSFETs. 381-396
• 
  Gregory Freeman, Jae-Sung Rieh, Zhijian Yang, Fernando J. Guarín: Reliability and performance scaling of very high speed SiGe HBTs. 397-410
• 
  K.-H. Allers: Prediction of dielectric reliability from I-V characteristics: Poole-Frenkel conduction mechanism leading to sqrt(E) model for silicon nitride MIM capacitor. 411-423
• 
  Kyungmee O. Kim, Way Kuo, Wen Luo: A relation model of gate oxide yield and reliability. 425-434
• 
  Xiangbin Zeng, X. W. Sun, Junfeng Li, Johnny K. O. Sin: Improving reliability of poly-Si TFTs with channel layer and gate oxide passivated by NH₃/N₂O plasma. 435-442
• 
  Pierre Temple-Boyer, J. Launay, I. Humenyuk, T. Do Conto, A. Martinez, C. Bériet, A. Grisel: Study of front-side connected chemical field effect transistor for water analysis. 443-447
• 
  S. Nakajima, S. Nakamura, T. Ueki, T. Sakai: Sample preparation techniques for physical analysis of VLSIs. 449-458
• 
  Jie-Hua Zhao: A three-parameter Weibull-like fitting function for flip-chip die strength data. 459-470
• 
  Yu Gu, Toshio Nakamura: Interfacial delamination and fatigue life estimation of 3D solder bumps in flip-chip packages. 471-483
• 
  S. Nurmi, J. Sundelin, Eero Ristolainen, T. Lepistö: The effect of solder paste composition on the reliability of SnAgCu joints. 485-494
• 
  S. C. Tan, Y. C. Chan, Y. W. Chiu, C. W. Tan: Thermal stability performance of anisotropic conductive film at different bonding temperatures. 495-503
• 
  M. A. Uddin, M. O. Alam, Y. C. Chan, H. P. Chan: Adhesion strength and contact resistance of flip chip on flex packages--effect of curing degree of anisotropic conductive film. 505-514
• 
  Tadanori Shimoto, Katsumi Kikuchi, Kazuhiro Baba, Koji Matsui, Hirokazu Honda, Keiichiro Kata: High-performance FCBGA based on multi-layer thin-substrate packaging technology. 515-520
• 
  Beth Keser, Li Wetz, Jerry White: WL-CSP reliability with various solder alloys and die thicknesses. 521-531
• 
  Li Zhang, Vivek Arora, Luu Nguyen, Nikhil Kelkar: Numerical and experimental analysis of large passivation opening for solder joint reliability improvement of micro SMD packages. 533-541
• 
  R. Khlil, A. El Hdiy, A. F. Shulekin, S. E. Tyaginov, M. I. Vexler: Soft breakdown of MOS tunnel diodes with a spatially non-uniform oxide thickness. 543-546
• 
  Mile K. Stojcev: Power-Constrained Testing of VLSI Circuits. Nikola Nikolici, Bashir M. Al-Hashimi. Kluwer Academic Publishers, Boston, 2003. Hardcover, pp 178, plus XI, ISBN 1-4020-7235-X. 547-548

Volume 44, Number 4, April 2004

• 
  Jorge Salcedo-Suñer, Charvaka Duvvury, Roger Cline, Alfonso Cadena-Hernandez: Latchup in voltage tolerant circuits: a new phenomenon. 549-562
• 
  J. A. Felix, J. R. Schwank, Daniel M. Fleetwood, M. R. Shaneyfelt, Evgeni P. Gusev: Effects of radiation and charge trapping on the reliability of high-kappa gate dielectrics. 563-575
• 
  P. T. Lai, J. P. Xu, H. P. Wu, C. L. Chan: Interfacial properties and reliability of SiO₂ grown on 6H-SiC in dry O₂ plus trichloroethylene. 577-580
• 
  Guo Lihui, Zhang Yibin, Su Yong Jie Jeffrey: Integrating thick copper/Black Diamond^TM layer in CMOS interconnect process for RF passive components. 581-585
• 
  Teija Uusluoto, Paavo Jalonen, Harri Laaksonen, Aulis Tuominen: Metallization of microvias by sputter-deposition. 587-593
• 
  N. H. Yeung, Victor Lau, Y. C. Chan: Bias-HAST on tape ball grid array (TBGA) test pattern. 595-602
• 
  T. Y. Lin, B. Njoman, D. Crouthamel, K. H. Chua, S. Y. Teo, Y. Y. Ma: The impact of moisture in mold compound preforms on the warpage of PBGA packages. 603-609
• 
  Xiaowu Zhang, E. H. Wong, Charles Lee, Tai Chong Chai, Yiyi Ma, Poi-Siong Teo, D. Pinjala, Srinivasamurthy Sampath: Thermo-mechanical finite element analysis in a multichip build up substrate based package design. 611-619
• 
  Kyoungsoon Cho, Insu Jeon: Numerical analysis of the warpage problem in TSOP. 621-626
• 
  Chia-Tai Kuo, Ming-Chuen Yip, Kuo-Ning Chiang: Time and temperature-dependent mechanical behavior of underfill materials in electronic packaging application. 627-638
• 
  A. Seppälä, Eero Ristolainen: Study of adhesive flip chip bonding process and failure mechanisms of ACA joints. 639-648
• 
  Juan Santana, Magali Estrada, Ofelia Martinez: Editorial. 649
• 
  I. León, R. Amador, K. Kohlhof: Evaluation of MUMPS polysilicon structures for thermal flow sensors. 651-655
• 
  Fernando da Rocha Paixão Cortes, Eric E. Fabris, Sergio Bampi: Analysis and design of amplifiers and comparators in CMOS 0.35 mum technology. 657-664
• 
  Alessandro Girardi, Sergio Bampi: AC analysis of an inverter amplifier using minimum-length trapezoidal association of transistors. 665-671
• 
  José Ernesto Rayas-Sánchez: A frequency-domain approach to interconnect crosstalk simulation and minimization. 673-681
• 
  J. Louzao, S. Paz, D. Tejera, G. Bellora, Guillermo Langwagen: Architectural design of a programmable cell for the implementation of a filter bank on FPGA. 683-695
• 
  Luciano Volcan Agostini, Ivan Saraiva Silva, Sergio Bampi: Parallel color space converters for JPEG image compression. 697-703
• 
  Gang Qu, Miodrag Potkonjak, Mile K. Stojcev: Book review: Intellectual property protection in VLSI designs: Theory and practice, Hardcover, pp 183, plus XIX, Kluwer Academic Publishers, Boston, 2003, ISBN 1-4020-7320-8. 705-706
• 
  Mile K. Stojcev: Power estimation and optimization for VLIW-based embedded systems; Vittorio Zaccaria, Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano. Hardcover, pp 203, plus XXIV, Kluwer Academic Publishers, Boston, 2003. ISBN 1-4020-7377-1. 707-708

Volume 44, Number 5, May 2004

• 
  Bing-Liang Yang, P. T. Lai, Hei Wong: Conduction mechanisms in MOS gate dielectric films. 709-718
• 
  Paul S. Ho, Guotao Wang, Min Ding, Jie-Hua Zhao, Xiang Dai: Reliability issues for flip-chip packages. 719-737
• 
  Domenico Caputo, Fernanda Irrera: On the reliability of ZrO₂ films for VLSI applications. 739-745
• 
  A. V. Vairagar, S. G. Mhaisalkar, Ahila Krishnamoorthy: Electromigration behavior of dual-damascene Cu interconnects--Structure, width, and length dependences. 747-754
• 
  Peter Z. F. Shi, Albert C. W. Lu, Y. M. Tan, Stephen C. K. Wong, Eric Tan, Ronson Tan: Thermal design and experimental validation for optical transmitters. 755-769
• 
  Yoshiteru Yamada, Hirotaka Komoda: An example of fault site localization on a 0.18 mum CMOS device with combination of front and backside techniques. 771-778
• 
  Zhimin Mo, Helge Kristiansen, Morten Eliassen, Shiming Li, Johan Liu: Study on thermomechanical reliability of a tunable light modulator. 779-785
• 
  Mark A. Fritz, Daniel T. Cassidy: Extraction of bonding strain data in diode lasers from polarization-resolved photoluminescence measurements. 787-796
• 
  Dionysios Manessis, Rainer Patzelt, Andreas Ostmann, Rolf Aschenbrenner, Herbert Reichl: Technical challenges of stencil printing technology for ultra fine pitch flip chip bumping. 797-803
• 
  Frank Stepniak: Mechanical loading of flip chip joints before underfill: the impact on yield and reliability. 805-814
• 
  Rashed Adnan Islam, Y. C. Chan: Effect of microwave preheating on the bonding performance of flip chip on flex joint. 815-821
• 
  C. W. Tan, Y. C. Chan, H. P. Chan, N. W. Leung, C. K. So: Investigation on bondability and reliability of UV-curable adhesive joints for stable mechanical properties in photonic device packaging. 823-831
• 
  Jinlin Wang, H. K. Lim, H. S. Lew, Woon Theng Saw, Chew Hong Tan: A testing method for assessing solder joint reliability of FCBGA packages. 833-840
• 
  X. Q. Shi, H. L. J. Pang, X. R. Zhang: Investigation of long-term reliability and failure mechanism of solder interconnections with multifunctional micro-moiré interferometry system. 841-852
• 
  L. Han, Arkady Voloshin: Statistical analysis for test lands positioning and PCB deformation during electrical testing. 853-859
• 
  Pawel Sniatala, André S. Botha: A/D converter based on a new memory cell implemented using the switched current technique. 861-867
• 
  Aránzazu Otín, Santiago Celma, Concepción Aldea: Digitally programmable CMOS transconductor for very high frequency. 869-875
• 
  Oliver Mitea, Manfred Glesner: A power-constrained design strategy for CMOS tuned low noise amplifiers. 877-883
• 
  V. Sánchez, J. Munguía, M. Estrada: Photo-CVD process for ultra thin SiO₂ films. 885-888

Volume 44, Number 6, June 2004

• 
  Vassil Palankovski, Siegfried Selberherr: Rigorous modeling of high-speed semiconductor devices. 889-897
• 
  David Dubuc, M. Saddaoui, S. Mellé, F. Flourens, L. Rabbia, B. Ducarouge, K. Grenier, Patrick Pons, A. Boukabache, L. Bary: Smart MEMS concept for high secure RF and millimeterwave communications. 899-907
• 
  R.-P. Vollertsen, E. Y. Wu: Voltage acceleration and t63.2 of 1.6-10 nm gate oxides. 909-916
• 
  Insu Jeon, Young-Bae Park: Analysis of the reservoir effect on electromigration reliability. 917-928
• 
  Zoubir Khatir, Stéphane Lefebvre: Boundary element analysis of thermal fatigue effects on high power IGBT modules. 929-938
• 
  M. Dammann, A. Leuther, Rüdiger Quay, M. Meng, H. Konstanzer, W. Jantz, Michael Mikulla: Reliability of 70 nm metamorphic HEMTs. 939-943
• 
  Hassène Mnif, Thomas Zimmer, Jean Luc Battaglia, Sébastien Fregonese: Representation of the SiGe HBT's thermal impedance by linear and recursive networks. 945-950
• 
  Yu Ying, Peter Grant: Deformation measurement of RF MEMS switches by optical interference. 951-955
• 
  Yingxue Shi, Jing Li, Guijun Hu, Sumei Zhang, Xuedan Wang, Jiawei Shi: Effects of annealing on the electric noise in semiconductor lasers. 957-961
• 
  Z. Radivojevic, K. Andersson, J. A. Bielen, P. J. van der Wel, J. Rantala: Operating limits for RF power amplifiers at high junction temperatures. 963-972
• 
  C. D. Breach, F. Wulff: New observations on intermetallic compound formation in gold ball bonds: general growth patterns and identification of two forms of Au₄Al. 973-981
• 
  J. M. Kim, Y. E. Shin, K. Fujimoto: Dynamic modeling for resin self-alignment mechanism. 983-992
• 
  Markus P. K. Turunen, Pekka Marjamäki, Matti Paajanen, Jouko Lahtinen, Jorma K. Kivilahti: Pull-off test in the assessment of adhesion at printed wiring board metallisation/epoxy interface. 993-1007
• 
  Frøydis Oldervoll, Frode Strisland: Wire-bond failure mechanisms in plastic encapsulated microcircuits and ceramic hybrids at high temperatures. 1009-1015
• 
  Alireza Ejlali, Seyed Ghassem Miremadi: FPGA-based Monte Carlo simulation for fault tree analysis. 1017-1028
• 
  Mile K. Stojcev: Oversampled delta-sigma modulators: analysis applications and novel topologies; Mücahit Kozak, Izzet Kale. Kluwer Academic Publishers, Boston. 2003. Hardcover, pp 226, plus XII, ISBN 1-4020-7420-4. 1029

Volume 44, Number 7, July 2004

• 
  Peter Ersland, Roberto Menozzi: Editorial. 1031
• 
  Y. C. Chou, D. Leung, I. Smorchkova, M. Wojtowicz, R. Grundbacher, L. Callejo, Q. Kan, R. Lai, P. H. Liu, D. Eng: Degradation of AlGaN/GaN HEMTs under elevated temperature lifetesting. 1033-1038
• 
  Peter Ersland, Hei-Ruey Jen, Xinxing Yang: Lifetime acceleration model for HAST tests of a pHEMT process. 1039-1045
• 
  William J. Roesch, Suwanna Jittinorasett: Cycling copper flip chip interconnects. 1047-1054
• 
  Bruce M. Paine, Timothy J. Perham, Stephen Thomas III: High-resolution transmission electron microscopy on aged InP HBTs. 1055-1060
• 
  Satbir S. Madra: Role of carrier depletion effects and material properties in advanced microscale thermal modeling of N-GaInP-Si/p-GaAs-C heterojunction bipolar transistor (HBT) devices. 1061-1068
• 
  Chun-Hsing Shih, Yi-Min Chen, Chenhsin Lien: Design strategy of localized halo profile for achieving sub-50 nm bulk MOSFET. 1069-1075
• 
  M. Marin, Y. Akue Allogo, M. de Murcia, P. Llinares, J. C. Vildeuil: Low frequency noise characterization in 0.13 mum p-MOSFETs. Impact of scaled-down 0.25, 0.18 and 0.13 mum technologies on 1/f noise. 1077-1085
• 
  Qungang Ma, Yuejin Li, Yintang Yang: Study of swing potential on deep submicron on-chip interconnect. 1087-1091
• 
  T. K. Chiang: A two-dimensional analytical subthreshold behavior model for short-channel AlGaAs/GaAs HFETs. 1093-1099
• 
  L. Yang, Asen Asenov, J. R. Watling, M. Boriçi, J. R. Barker, Scott Roy, K. Elgaid, I. Thayne, T. Hackbarth: Impact of device geometry and doping strategy on linearity and RF performance in Si/SiGe MODFETs. 1101-1107
• 
  A. Sozza, Christian Dua, A. Kerlain, C. Brylinski, Enrico Zanoni: Long-term reliability of Ti-Pt-Au metallization system for Schottky contact and first-level metallization on SiC MESFET. 1109-1113
• 
  Adam Golda, Andrzej Kos: Temperature influence on energy losses in MOSFET capacitors. 1115-1121
• 
  Milan Jevtic: Low frequency noise as a tool to study optocouplers with phototransistors. 1123-1129
• 
  Tong Yan Tee, Hun Shen Ng, Chwee Teck Lim, Eric Pek, Zhaowei Zhong: Impact life prediction modeling of TFBGA packages under board level drop test. 1131-1142
• 
  Hongfang Wang, Mei Zhao, Qiang Guo: Vibration fatigue experiments of SMT solder joint. 1143-1156
• 
  Ashish Batra, Pradeep Ramachandran, Poornima Sathyanarayanan, Susan Lu, Hari Srihari: Reliability enhancement of electronic packages by design of optimal parameters. 1157-1163
• 
  Hyong Tae Kim, Chang Seop Song, Hae Jeong Yang: 2-Step algorithm for automatic alignment in wafer dicing process. 1165-1179
• 
  Octavio A. Leon, Gilbert De Mey, Erik Dick, Jan A. Vierendeels: Staggered heat sinks with aerodynamic cooling fins. 1181-1187
• 
  Belén Calvo, Santiago Celma, Maria Teresa Sanz, Pedro A. Martínez: A high-linear wide-tunable CMOS transconductor for video frequency applications. 1189-1198
• 
  Y. L. Goh, D. S. Ong: Analytical investigation of dead space effect under near-breakdown conditions in GaInP/GaAs composite double heterojunction bipolar transistors. 1199-1202
• 
  Mile K. Stojcev: Networks on Chip; Axel Jantsch, Hannu Tenhunen (Eds.). Kluwer Academic Publishers, Boston; 2003. Hardcover, pp 303, plus VIII, ISBN 1-4020-7392-5. 1203-1204
• 
  Mile K. Stojcev: Memory architecture exploration for programmable embedded systems; Peter Grun, Nikil Dutt, Alexandru Nicolau. Kluwer Academic Publishers, Boston. 2003. Hardcover, pp 128, plus XVII, ISBN 1-4020-7324-0. 1205-1206

Volume 44, Number 8, August 2004

• 
  Rolf-Peter Vollertsen: Fast wafer level reliability: methods and experiences. 1207-1208
• 
  Andreas Martin, Rolf-Peter Vollertsen: An introduction to fast wafer level reliability monitoring for integrated circuit mass production. 1209-1231
• 
  Summer F. C. Tseng, Wei-Ting Kary Chien, Excimer Gong, Willings Wang, Bing-Chu Cai: Some practical considerations for effective and efficient wafer-level reliability control. 1233-1243
• 
  David Smeets, Josef Fazekas: Quantifying charging damage in gate oxides of antenna structures for WLR monitoring. 1245-1250
• 
  Werner Muth, Wolfgang Walter: Bias temperature instability assessment of n- and p-channel MOS transistors using a polysilicon resistive heated scribe lane test structure. 1251-1262
• 
  Barry O'Connell, Prasad Chaparala, Bhola Mehrotra: Evaluation of performance-reliability trade-offs in a Si-Ge BiCMOS process using fast wafer level techniques. 1263-1268
• 
  Guoqiao Tao, Andrea Scarpa, Leo van Marwijk, Kitty van Dijk, Fred G. Kuper: Applying the fWLR concept to Stress induced leakage current in non-volatile memory processes. 1269-1273
• 
  Mile K. Stojcev: Reliability of Computer Systems and Networks: Fault Tolerance, Analysis and Design; Martin L. Shooman. John Wiley and Sons Inc., New York; 2002. Hardcover, pp 528, plus XXII. 1275-1276
• 
  Mile K. Stojcev: Power Distribution Networks in High Speed Integrated Circuits; Andrey Mezhiba, Eby Friedman. Kluwer Academic Publishers, Boston; 2004. Hardcover, 280pp, plus XXIII, ISBN 1-4020-7534-0. 1277-1278
• 
  Mile K. Stojcev: Digital design and computer architecture; Hassan A. Farhat. CRC Press, Boca Raton: 2004. Hardcover, 487pp, plus XXII. ISBN 0-8493-1191-8. 1279-1280

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