Volume 33, Number 1, February 2009

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  Christophe Bobda: Special issue on ReCoSoC 2007. 1
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  Heiko Hinkelmann, Peter Zipf, Jia Li, Guifang Liu, Manfred Glesner: On the design of reconfigurable multipliers for integer and Galois field multiplication. 2-12
• 
  Samar Yazdani, Joel Cambonie, Bernard Pottier: Coordinated concurrent memory accesses on a reconfigurable multimedia accelerator. 13-23
• 
  Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs. 24-36
• 
  Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Eduardo Wanderley Netto, Russell Tessier, Wayne P. Burleson: A security approach for off-chip memory in embedded microprocessor systems. 37-45
• 
  Katarina Paulsson, Michael Hübner, Jürgen Becker: Dynamic power optimization by exploiting self-reconfiguration in Xilinx Spartan 3-based systems. 46-52
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  Hritam Dutta, Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jürgen Teich, Bernard Pottier: A holistic approach for tightly coupled reconfigurable parallel processors. 53-62
• 
  Harold Ishebabi, Christophe Bobda: Automated architecture synthesis for parallel programs on FPGA multiprocessor systems. 63-71
• 
  Antoine Scherrer, Antoine Fraboulet, Tanguy Risset: Long-range dependence and on-chip processor traffic. 72-80
• 
  Marcelo Götz, Florian Dittmann, Tao Xie: Dynamic relocation of hybrid tasks: Strategies and methodologies. 81-90

Volume 33, Number 2, March 2009

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  Grigoris Dimitroulakos, Stavros Georgiopoulos, Michalis D. Galanis, Costas E. Goutis: Resource aware mapping on coarse grained reconfigurable arrays. 91-105
• 
  Kimmo U. Järvinen, Jorma Skyttä: Fast point multiplication on Koblitz curves: Parallelization method and implementations. 106-116
• 
  Christopher N. Vutsinas, Tarek M. Taha, Kenneth L. Rice: A context switching streaming memory architecture to accelerate a neocortex model. 117-128
• 
  Arquimedes Canedo, Ben A. Abderazek, Masahiro Sowa: Design and implementation of a queue compiler. 129-138
• 
  Jari Heikkinen, Jarmo Takala, Henk Corporaal: Dictionary-based program compression on customizable processor architectures. 139-153
• 
  Faheem Sheikh, Shahid Masud, Rehan Ahmed: Superscalar architecture design for high performance DSP operations. 154-160

Volume 33, Number 3, May 2009

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  Zain-ul-Abdin, Bertil Svensson: Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing. 161-178
• 
  Andrea Molino, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Terreno, Giorgio Pasquettaz, Giuseppe D'Angelo: FPGA implementation of time-frequency analysis algorithms for laser welding monitoring. 179-190
• 
  Sergio Saponara, Nicola E. L'Insalata, Luca Fanucci: Low-complexity FFT/IFFT IP hardware macrocells for OFDM and MIMO-OFDM CMOS transceivers. 191-200
• 
  Jung-Hi Min, Hojung Cha, Rhan Ha: System-level integrated power management for handheld systems. 201-210
• 
  Muhammad Z. Hasan, Sotirios G. Ziavras: Customized kernel execution on reconfigurable hardware for embedded applications. 211-220
• 
  Sheikh Muhammad Farhan, Shoab Ahmed Khan, Habibullah Jamal: An 8-bit systolic AES architecture for moderate data rate applications. 221-231

Volume 33, Number 4, June 2009

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  Mladen Berekovic, Vipin Chaudhary, Alex Dean, Jason Fritts: Editorial. 233-234
• 
  Jaewook Shin, Mary W. Hall, Jacqueline Chame: Evaluating compiler technology for control-flow optimizations for multimedia extension architectures. 235-243
• 
  Hillery C. Hunter, Erik M. Nystrom, Daniel A. Connors, Wen-mei W. Hwu: Hardware-compiler co-design for adjustable data power savings. 244-253
• 
  Fumio Arakawa, Takashi Okada, Tomoichi Hayashi, Osamu Nishii, Toshihiro Hattori: An embedded processor core for consumer appliances with 5.6 GFLOPS and 73M polygons/s FPU. 254-259
• 
  Suman Mamidi, Emily R. Blem, Michael J. Schulte, John Glossner, Daniel Iancu, Andrei Iancu, Mayan Moudgill, Sanjay Jinturkar: Instruction set extensions for software defined radio. 260-272
• 
  Hau T. Ngo, Ming Z. Zhang, Li Tao, Vijayan K. Asari: Design of a high performance architecture for real-time enhancement of video stream captured in extremely low lighting environment. 273-280
• 
  Joseph M. Lancaster, Jeremy Buhler, Roger D. Chamberlain: Acceleration of ungapped extension in Mercury BLAST. 281-289
• 
  Mladen Berekovic, Andreas Kanstein, Bingfeng Mei, Bjorn De Sutter: Mapping of nomadic multimedia applications on the ADRES reconfigurable array processor. 290-294
• 
  Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest: EMPIRE: Empirical power/area/timing models for register files. 295-300
• 
  Jason E. Fritts, Frederick W. Steiling, Joseph A. Tucek, Wayne Wolf: MediaBench II video: Expediting the next generation of video systems research. 301-318
• 
  Stephen Warrington, Wai-Yip Chan, Subramania Sudharsanan: Scalable high-throughput variable block size motion estimation architecture. 319-325
• 
  Amirali Baniasadi, Babak Salamat, Kaveh Jokar Deris: Power-aware scoreboard alternatives for multimedia processors. 326-332

Volume 33, Numbers 5-6, August 2009

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  Hankook Jang, Sang-Hwa Chung, Dae-Hyun Yoo: Design and implementation of a protocol offload engine for TCP/IP and remote direct memory access based on hardware/software coprocessing. 333-342
• 
  Haytham Elmiligi, Ahmed A. Morgan, M. Watheq El-Kharashi, Fayez Gebali: Power optimization for application-specific networks-on-chips: A topology-based approach. 343-355
• 
  M. R. Fowler, Elias Stipidis, Falah H. Ali: A network-centric approach to space-restricted distributed processing. 356-364
• 
  Nallamothu Satyanarayana, A. Vinaya Babu, Madhu Mutyam: Delay-efficient bus encoding techniques. 365-373
• 
  Zonghua Gu, Weichen Liu, Jiang Xu, Jin Cui, Xiuqiang He, Qingxu Deng: Efficient algorithms for 2D area management and online task placement on runtime reconfigurable FPGAs. 374-387
• 
  Abu Asaduzzaman, Fadi N. Sibai, Manira Rani: Impact of level-2 cache sharing on the performance and power requirements of homogeneous multicore embedded systems. 388-397
• 
  Austin Rogers, Aleksandar Milenkovic: Security extensions for integrity and confidentiality in embedded processors. 398-414

Volume 33, Numbers 7-8, October-November 2009

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  Isidoros Sideris, Kiamal Z. Pekmestzi, George Economakos: Extending an embedded RISC microprocessor for efficient translation based Java execution. 415-429
• 
  Farshad Khunjush, Nikitas J. Dimopoulos: Hiding message delivery latency using Direct-to-Cache-Transfer techniques in message passing environments. 430-440
• 
  Nikolaos Kavvadias, Spiridon Nikolaidis: Scalable register bypassing for FPGA-based processors. 441-452
• 
  John N. Lygouras, Vassilis S. Kodogiannis, Theodore P. Pachidis, Georgios Ch. Sirakoulis: A new method for digital encoder adaptive velocity/acceleration evaluation using a TDC with picosecond accuracy. 453-460
• 
  Gyungho Lee, Yixin Shi, Hui Lin: Indirect Branch Validation Unit. 461-468
• 
  Lucas Vespa, Ning Weng, Benfano Soewito: Optimized memory based accelerator for scalable pattern matching. 469-482
• 
  José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo: Characterizing asynchronous variable latencies through probability distribution functions. 483-497

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