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ORCIDIEEE Journal of Solid-State Circuits, Volume 53
Volume 53, Number 1, January 2018
- Keith A. Bowman
, Muhammad M. Khellah, Takashi Kono, Joseph Shor, Pui-In Mak:
Introduction to the January Special Issue on the 2017 IEEE International Solid-State Circuits Conference. 3-7 - Harish Kumar Krishnamurthy, Vaibhav A. Vaidya, Pavan Kumar, Rinkle Jain, Sheldon Weng, Stephen T. Kim, George E. Matthew, Nachiket V. Desai, Xiaosen Liu, Krishnan Ravichandran, James W. Tschanz, Vivek De:
A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS. 8-19 - Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins:
An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator. 20-34 - Loai G. Salem, Julian Warchall, Patrick P. Mercier:
A Successive Approximation Recursive Digital Low-Dropout Voltage Regulator With PD Compensation and Sub-LSB Duty Control. 35-49 - Tae-Kwang Jang, Seokhyeon Jeong, Dongsuk Jeon, Kyojin David Choo, Dennis Sylvester, David T. Blaauw:
A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector. 50-65 - Michael Price, James R. Glass, Anantha P. Chandrakasan:
A Low-Power Speech Recognizer and Voice Activity Detector Using Deep Neural Networks. 66-75 - Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Luyao Gong, Zhengya Zhang, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim:
A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles. 76-90 - Christopher J. Gonzalez, Michael S. Floyd, Eric Fluhr, Phillip J. Restle, Daniel Dreps, Michael A. Sperling, Rahul M. Rao, David Hogenmiller, Christos Vezyrtzis, Pierce Chuang, Daniel Lewis, Ricardo Escobar, Vinod Ramadurai, Ryan Kruse, Juergen Pille, Ryan Nett, Pawel Owczarczyk, Joshua Friedrich, Jose Paredes, Timothy Diemoz, Md. Saiful Islam, Donald W. Plass, Paul Muench:
The 24-Core POWER9 Processor With Adaptive Clocking, 25-Gb/s Accelerator Links, and 16-Gb/s PCIe Gen4. 91-101 - Teja Singh, Alex Schaefer, Sundar Rangarajan, Deepesh John, Carson Henrion, Russell Schreiber, Miguel Rodriguez, Stephen Kosonocky, Samuel Naffziger, Amy Novak:
Zen: An Energy-Efficient High-Performance × 86 Core. 102-114 - Kyeongryeol Bong, Sungpill Choi, Changhyeon Kim, Donghyeon Han, Hoi-Jun Yoo:
A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector. 115-123 - Chulbum Kim, Doo-Hyun Kim, Woopyo Jeong, Hyun-Jin Kim, Il-Han Park, Hyun Wook Park, Jong-Hoon Lee, Jiyoon Park, Yang-Lo Ahn, Ji Young Lee, Seungbum Kim, Hyun-Jun Yoon, Jaedoeg Yu, Nayoung Choi, Nahyun Kim, Hwajun Jang, Jonghoon Park, Seunghwan Song, Yongha Park, Jinbae Bang, Sanggi Hong, Youngdon Choi, Moosung Kim, Hyunggon Kim, Pansuk Kwak, Jeong-Don Ihm, Dae-Seok Byeon, Jin-Yub Lee, Ki-Tae Park, Kyehyun Kyung:
A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory. 124-133 - Martin Brox, Mani Balakrishnan, Martin Broschwitz, Cristian Chetreanu, Stefan Dietrich, Fabien Funfrock, Marcos Alvarez Gonzalez, Thomas Hein, Eugen Huber, Daniel Lauber, Milena Ivanov, Maksim Kuzmenka, Chris Mohr, Juan Ocon Garrido, Swetha Padaraju, Sven Piatkowski, Jan Pottgiesser, Peter Pfefferl, Manfred Plan, Jens Polney, Stephan Rau, Michael Richter, Ronny Schneider, Ralf Oliver Seitter, Wolfgang Spirkl, Marc Walter, Jörg Weller, Filippo Vitale:
An 8-Gb 12-Gb/s/pin GDDR5X DRAM for Cost-Effective High-Performance Applications. 134-143 - Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park:
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface. 144-154 - Igor Arsovski, Akhilesh Patil, Robert M. Houle, Michael Fragano, Ramon Rodriguez, Raymond Kim, Van Butler:
1.4Gsearch/s 2-Mb/mm2 TCAM Using Two-Phase-Pre-Charge ML Sensing and Power-Grid Pre-Conditioning to Reduce Ldi/dt Power-Supply Noise by 50%. 155-163 - Sining Pan, Yanquan Luo, Saleh Heidary Shalmany, Kofi A. A. Makinwa:
A Resistor-Based Temperature Sensor With a 0.13 pJ $\cdot$ K2 Resolution FoM. 164-173 - Maximilian Marx, Daniel DeDorigo, Sebastian Nessler, Stefan Rombach, Yiannos Manoli:
A 27 $\mu \text{W}$ 0.06 mm2 Background Resonance Frequency Tuning Circuit Based on Noise Observation for a 1.71 mW CT- $\Delta \Sigma $ MEMS Gyroscope Readout System With 0.9 °/h Bias Instability. 174-186 - Jae-Sung An, Sang-Hyun Han, Ju Eon Kim, Dong-Hyun Yoon, Young-Hwan Kim, Han-Hee Hong, Jae-Hun Ye, Sung-Jin Jung, Seung-Hwan Lee, Ji-Yong Jeong, Kwang-Hyun Baek, Seong-Kwan Hong, Oh-Kyong Kwon:
A 3.9-kHz Frame Rate and 61.0-dB SNR Analog Front-End IC With 6-bit Pressure and Tilt Angle Expressions of Active Stylus Using Multiple-Frequency Driving Method for Capacitive Touch Screen Panels. 187-203 - Hyunseok Hwang, Hyeyeon Lee, Myungjin Han, Hongchae Kim, Youngcheol Chae:
A 1.8-V 6.9-mW 120-fps 50-Channel Capacitive Touch Readout With Current Conveyor AFE and Current-Driven $\Delta \Sigma $ ADC. 204-218 - Masahiro Kobayashi, Yusuke Onuki, Kazunari Kawabata, Hiroshi Sekine, Toshiki Tsuboi, Takashi Muto, Takeshi Akiyama, Yasushi Matsuno, Hidekazu Takahashi, Toru Koizumi, Katsuhito Sakurai, Hiroshi Yuzurihara, Shunsuke Inoue, Takeshi Ichikawa:
A 1.8e-rms Temporal Noise Over 110-dB-Dynamic Range 3.4µm Pixel Pitch Global-Shutter CMOS Image Sensor With Dual-Gain Amplifiers SS-ADC, Light Guide Structure, and Multiple-Accumulation Shutter. 219-228 - Shin'ichi Machida, Sanshiro Shishido, Takeyoshi Tokuhara, Masaaki Yanagida, Takayoshi Yamada, Masumi Izuchi, Yoshiaki Sato, Yasuo Miyake, Manabu Nakata, Masashi Murakami, Mitsuru Harada, Yasunori Inoue:
A 2.1-Mpixel Organic Film-Stacked RGB-IR Image Sensor With Electrically Controllable IR Sensitivity. 229-235 - Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan:
An Actively Detuned Wireless Power Receiver With Public Key Cryptographic Authentication and Dynamic Power Allocation. 236-246 - Xugang Ke, Joseph Sankman, Yingping Chen, Lenian He, Dongsheng Brian Ma:
A Tri-Slope Gate Driving GaN DC-DC Converter With Spurious Noise Compression and Ringing Suppression for Automotive Applications. 247-260 - Seokhyeon Jeong, Yu Chen, Tae-Kwang Jang, Julius Ming-Lin Tsai, David T. Blaauw, Hun-Seok Kim, Dennis Sylvester:
Always-On 12-nW Acoustic Sensing and Object Recognition Microsystem for Unattended Ground Sensor Nodes. 261-274 - SungWon Chung, Hooman Abediasl, Hossein Hashemi:
A Monolithically Integrated Large-Scale Optical Phased Array in Silicon-on-Insulator CMOS. 275-296 - Yasmin Afsar, Tiffany Moy, Nicholas Brady, Sigurd Wagner, James C. Sturm, Naveen Verma:
An Architecture for Large-Area Sensor Acquisition Using Frequency-Hopping ZnO TFT DCOs. 297-308 - Bishnu Patra, Rosario M. Incandela, Jeroen P. G. van Dijk, Harald A. R. Homulle, Lin Song, Mina Shahmohammadi, Robert Bogdan Staszewski, Andrei Vladimirescu, Masoud Babaie, Fabio Sebastiano, Edoardo Charbon:
Cryo-CMOS Circuits and Systems for Quantum Computing Applications. 309-321
Volume 53, Number 2, February 2018
- Yang Xu, Jianxun Zhu, Peter R. Kinget:
A Blocker-Tolerant RF Front End With Harmonic-Rejecting N-Path Filter. 327-339 - Jong Seok Park, Yanjie Wang, Stefano Pellerano, Christopher D. Hull, Hua Wang:
A CMOS Wideband Current-Mode Digital Polar Power Amplifier With Built-In AM-PM Distortion Self-Compensation. 340-356 - Ahmed I. Hussein, Sriharsha Vasadi, Jeyanandh Paramesh:
A 450 fs 65-nm CMOS Millimeter-Wave Time-to-Digital Converter Using Statistical Element Selection for All-Digital PLLs. 357-374 - Seyeon Yoo, Seojin Choi, Juyeop Kim, Heein Yoon, Yongsun Lee, Jaehyouk Choi:
A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers. 375-388 - Amir Nikpaik, Amir Hossein Masnadi Shirazi, Abdolreza Nabavi, Shahriar Mirabbasi, Sudip Shekhar:
A 219-to-231 GHz Frequency-Multiplier-Based VCO With ~3% Peak DC-to-RF Efficiency in 65-nm CMOS. 389-403 - Seungnam Choi, Hwan-Seok Ku, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim:
An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications. 404-417 - Yu Chen, Xiaoyang Zhang, Yong Lian, Rajit Manohar, Yannis P. Tsividis:
A Continuous-Time Digital IIR Filter With Signal-Derived Timing and Fully Agile Power Consumption. 418-430 - Yunju Choi, Yoontaek Lee, Seung-Heon Baek, Sung-Joon Lee, Jaeha Kim:
CHIMERA: A Field-Programmable Mixed-Signal IC With Time-Domain Configurable Analog Blocks. 431-444 - Mostafa Gamal Ahmed, Mrunmay Talegaonkar, Ahmed Elkholy, Guanghua Shu, Ahmed Elmallah, Alexander V. Rylyakov, Pavan Kumar Hanumolu:
A 12-Gb/s -16.8-dBm OMA Sensitivity 23-mW Optical Receiver in 65-nm CMOS. 445-457 - Iria Garcia Lopez, Ahmed Awny, Pedro Rito, Minsu Ko, Ahmet Cagri Ulusoy, Dietmar Kissinger:
100 Gb/s Differential Linear TIAs With Less Than 10 pA/√Hz in 130-nm SiGe: C BiCMOS. 458-469 - Marijn Verbeke, Pieter Rombouts, Hannes Ramon, Bart Moeneclaey, Xin Yin, Johan Bauwelinck, Guy Torfs:
A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit. 470-483 - Hyun-Sik Kim, Dong-Kyu Kim:
An Active-Matrix OLED Driver CMOS IC With Compensation of Non-Uniform Routing-Line Resistances in Ultra-Thin Panel Bezel. 484-500 - Sung-Yun Park, Jihyun Cho, Kyounghwan Na, Euisik Yoon:
Modular 128-Channel Δ-ΔΣ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems. 501-514 - Ha Le-Thai, Genis Chapinal, Tomas Geurts, Georges G. E. Gielen:
A 0.18-µm CMOS Image Sensor With Phase-Delay-Counting and Oversampling Dual-Slope Integrating Column ADCs Achieving 1e-rms Noise at 3.8-µs Conversion Time. 515-526 - Shang-Fu Yeh, Kuo-Yu Chou, Honyih Tu, Calvin Yi-Ping Chao, Fu-Lung Hsueh:
A 0.66erms- Temporal-Readout-Noise 3-D-Stacked CMOS Image Sensor With Conditional Correlated Multiple Sampling Technique. 527-537 - Cheng Huang, Toru Kawajiri, Hiroki Ishikuro:
A 13.56-MHz Wireless Power Transfer System With Enhanced Load-Transient Response and Efficiency by Fully Integrated Wireless Constant-Idle-Time Control for Biomedical Implants. 538-551 - Yi-Wei Huang, Tai-Haur Kuo, Szu-Yu Huang, Kuan-Yu Fang:
A Four-Phase Buck Converter With Capacitor-Current-Sensor Calibration for Load-Transient-Response Optimization That Reduces Undershoot/Overshoot and Shortens Settling Time to Near Their Theoretical Limits. 552-568 - Saad Bin Nasir, Shreyas Sen, Arijit Raychowdhury:
Switched-Mode-Control Based Hybrid LDO for Fine-Grain Power Management of Digital Load Circuits. 569-581 - Xun Liu, Cheng Huang, Philip K. T. Mok:
A High-Frequency Three-Level Buck Converter With Real-Time Calibration and Wide Output Range for Fast-DVS. 582-595 - Chi-Hsiang Huang, Hung-Hsien Wu, Chia-Ling Wei:
Compensator-Free Mixed-Ripple Adaptive On-Time Controlled Boost Converter. 596-604 - Jihyuck Jo, Soyoung Cha, Dayoung Rho, In-Cheol Park:
DSIP: A Scalable Inference Accelerator for Convolutional Neural Networks. 605-618 - Yiqun Zhang, Mahmood Khayatzadeh, Kaiyuan Yang, Mehdi Saligane, Nathaniel Ross Pinckney, Massimo Alioto, David T. Blaauw, Dennis Sylvester:
iRazor: Current-Based Error Detection and Correction Scheme for PVT Variation in 40-nm ARM Cortex-R4 Processor. 619-631 - Saurabh Jain, Longyang Lin, Massimo Alioto:
Dynamically Adaptable Pipeline for Energy-Efficient Microarchitectures Under Wide Voltage Scaling. 632-641 - Mingu Kang, Sujan K. Gonugondla, Ameya Patil, Naresh R. Shanbhag:
A Multi-Functional In-Memory Inference Processor Using a Standard 6T SRAM Array. 642-655 - Morteza Nabavi, Manoj Sachdev:
A 290-mV, 3.34-MHz, 6T SRAM With pMOS Access Transistors and Boosted Wordline in 65-nm CMOS Technology. 656-667
Volume 53, Number 3, March 2018
- Rikky Muller, Samuel Palermo:
Guest Editorial 2017 IEEE Custom Integrated Circuits Conference. 679-680 - Qiwei Wang, Hajime Shibata, Antonio Liscidini, Anthony Chan Carusone:
A Digital Filtering ADC With Programmable Blocker Cancellation for Wireless Receivers. 681-691 - Hani Esmaeelzadeh, Sudhakar Pamarti:
A Quick Startup Technique for High-Q Oscillators Using Precisely Timed Energy Injection. 692-702 - Shravan S. Nagam, Peter R. Kinget:
A Low-Jitter Ring-Oscillator Phase-Locked Loop Using Feedforward Noise Cancellation With a Sub-Sampling Phase Detector. 703-714 - Dongyi Liao, Fa Foster Dai, Bram Nauta, Eric A. M. Klumperink:
A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching. 715-727 - Jiangyi Li, Teng Yang, Minhao Yang, Peter R. Kinget, Mingoo Seok:
An Area-Efficient Microprocessor-Based SoC With an Instruction-Cache Transformable to an Ambient Temperature Sensor and a Physically Unclonable Function. 728-737 - Hechen Wang, Fa Foster Dai, Hua Wang:
A Reconfigurable Vernier Time-to-Digital Converter With 2-D Spiral Comparator Array and Second-Order ΔΣ Linearization. 738-749 - Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Hisakatsu Yamaguchi:
On-Chip Jitter Measurement Using Jitter Injection in a 28 Gb/s PI-Based CDR. 750-761 - Jeffrey Lee, Ray Gomez, Sudhakar Pamarti:
A Broadband Class-AB Power Amplifier With Instantaneous Supply-Switching Efficiency Enhancement for Cable TV Application. 762-771 - Aurangozeb, A. K. M. Delwar Hossain, Maruf Mohammad, Masum Hossain:
Channel-Adaptive ADC and TDC for 28 Gb/s PAM-4 Digital Receiver. 772-788 - Yeonam Yoon, Nan Sun:
A 6-bit 0.81-mW 700-MS/s SAR ADC With Sparkle-Code Correction, Resolution Enhancement, and Background Window Width Calibration. 789-798 - Siladitya Dey, Karthikeyan Reddy, Kartikeya Mayaram, Terri S. Fiez:
A 50 MHz BW 76.1 dB DR Two-Stage Continuous-Time Delta-Sigma Modulator With VCO Quantizer Nonlinearity Cancellation. 799-813 - Seong Joong Kim, Woo-Seok Choi, Robert C. N. Pilawa-Podgurski, Pavan Kumar Hanumolu:
A 10-MHz 2-800-mA 0.5-1.5-V 90% Peak Efficiency Time-Based Buck Converter With Seamless Transition Between PWM/PFM Modes. 814-824 - Dongseok Shin, Kwang-Jin Koh:
An Injection Frequency-Locked Loop - Autonomous Injection Frequency Tracking Loop With Phase Noise Self-Calibration for Power-Efficient mm-Wave Signal Sources. 825-838 - Bo Wu, Shuang Zhu, Yuan Zhou, Yun Chiu:
A 9-bit 215 MS/s Folding-Flash Time-to-Digital Converter Based on Redundant Remainder Number System in 45-nm CMOS. 839-849 - Chi-Hang Chan, Yan Zhu, Wai-Hong Zhang, Seng-Pan U, Rui Paulo Martins:
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration. 850-860 - Cosimo Aprile, Alessandro Cevrero, Pier Andrea Francese, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Lukas Kull, Ilter Oezkaya, Yusuf Leblebici, Volkan Cevher, Thomas Toifl:
An Eight-Lane 7-Gb/s/pin Source Synchronous Single-Ended RX With Equalization and Far-End Crosstalk Cancellation for Backplane Channels. 861-872 - Da Wei, Tejasvi Anand, Guanghua Shu, José E. Schutt-Ainé, Pavan Kumar Hanumolu:
A 10-Gb/s/ch, 0.6-pJ/bit/mm Power Scalable Rapid-ON/OFF Transceiver for On-Chip Energy Proportional Interconnects. 873-883 - Woo-Seok Choi, Guanghua Shu, Mrunmay Talegaonkar, Yubo Liu, Da Wei, Luca Benini, Pavan Kumar Hanumolu:
A 0.45-0.7 V 1-6 Gb/s 0.29-0.58 pJ/b Source-Synchronous Transceiver Using Near-Threshold Operation. 884-895 - Linxiao Shen, Nanshu Lu, Nan Sun:
A 1-V 0.25-µW Inverter Stacking Amplifier With 1.07 Noise Efficiency Factor. 896-905 - Hyunmin Park, Jintae Kim:
A 0.8-V Resistor-Based Temperature Sensor in 65-nm CMOS With Supply Sensitivity of 0.28 °C/V. 906-912 - Lisong Li, Yuan Gao, Huaxing Jiang, Philip K. T. Mok, Kei May Lau:
An Auto-Zero-Voltage-Switching Quasi-Resonant LED Driver With GaN FETs and Fully Integrated LED Shunt Protectors. 913-923 - Fahim U. Rahman, Visvesh Sathe:
Quasi-Resonant Clocking: Continuous Voltage-Frequency Scalable Resonant Clocking System for Dynamic Voltage-Frequency Scaling Systems. 924-935 - Yu Pu, Chunlei Shi, Giby Samson, Dongkyu Park, Ken Easton, Rudy Beraha, Adam Newham, Mark Lin, Venkat Rangan, Karam Chatha, Danny Butterfield, Rashid Attar:
A 9-mm2 Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things. 936-948 - Balaji Jayaraman, Derek Leu, Janakiraman Viraraghavan, Alberto Cestero, Ming Yin, John Golz, Rajesh Reddy Tummuru, Ramesh Raghavan, Dan Moy, Thejas Kempanna, Faraz Khan, Toshiaki Kirihata, Subramanian S. Iyer:
80-kb Logic Embedded High-K Charge Trap Transistor-Based Multi-Time-Programmable Memory With No Added Process Complexity. 949-960
Volume 53, Number 4, April 2018
- Jan Craninckx:
New Associate Editors. 963-964 - Makoto Ikeda, Ken Chang:
Introduction to the Special Issue on the 2017 Symposium on VLSI Circuits. 965-967 - Shouyi Yin, Peng Ouyang, Shibin Tang, Fengbin Tu, Xiudong Li, Shixuan Zheng, Tianyi Lu, Jiangyuan Gu, Leibo Liu, Shaojun Wei:
A High Energy Efficient Reconfigurable Hybrid Neural Network Processor for Deep Learning Applications. 968-982 - Kota Ando, Kodai Ueyoshi, Kentaro Orimo, Haruyoshi Yonekawa, Shimpei Sato, Hiroki Nakahara, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Tetsuya Asai, Tadahiro Kuroda, Masato Motomura:
BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W. 983-994 - Yiqun Zhang, Li Xu, Qing Dong, Jingcheng Wang, David T. Blaauw, Dennis Sylvester:
Recryptor: A Reconfigurable Cryptographic Cortex-M0 Processor With In-Memory and Near-Memory Computing for IoT Security. 995-1005 - Qing Dong, Supreet Jeloka, Mehdi Saligane, Yejoong Kim, Masaru Kawaminami, Akihiko Harada, Satoru Miyoshi, Makoto Yasuda, David T. Blaauw, Dennis Sylvester:
A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V VDDmin. 1006-1015 - Hongyang Jia, Naveen Verma:
Exploiting Approximate Feature Extraction via Genetic Programming for Hardware Acceleration in a Heterogeneous Microprocessor. 1016-1027 - Tetsutaro Hashimoto, Yukihito Kawabe, Michiharu Hara, Yasushi Kakimura, Kunihiko Tajiri, Shinichiro Shirota, Ryuichi Nishiyama, Hitoshi Sakurai, Hiroshi Okano, Yasumoto Tomita, Sugio Satoh, Hideo Yamashita:
An Adaptive-Clocking-Control Circuit With 7.5% Frequency Gain for SPARC Processors. 1028-1037 - Harish Kumar Krishnamurthy, Sheldon Weng, George E. Matthew, Nachiket V. Desai, Ruchir Saraswat, Krishnan Ravichandran, James W. Tschanz, Vivek De:
A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS. 1038-1048 - Kye-Seok Yoon, Sung-Wan Hong, Gyu-Hyeong Cho:
Double Pile-Up Resonance Energy Harvesting Circuit for Piezoelectric and Thermoelectric Materials. 1049-1060 - Tomohiro Takahashi, Yuichi Kaji, Yasunori Tsukuda, Shinichiro Futami, Katsuhiko Hanzawa, Takahito Yamauchi, Ping Wah Wong, Frederick T. Brady, Phil Holden, Thomas Ayers, Kyohei Mizuta, Susumu Ohki, Keiji Tatani, Hayato Wakabayashi, Yoshikazu Nitta:
A Stacked CMOS Image Sensor With Array-Parallel ADC Architecture. 1061-1070 - Yuichi Kato, Takuya Sano, Yusuke Moriyama, Shunji Maeda, Takeshi Yamazaki, Atsushi Nose, Kimiyasu Shiina, Yohtaro Yasu, Ward van der Tempel, Alper Ercan, Yoshiki Ebiko, Daniel Van Nieuwenhove, Shunichi Sukegawa:
320 × 240 Back-Illuminated 10-µm CAPD Pixels for High-Speed Modulation Time-of-Flight CMOS Image Sensor. 1071-1078 - Yeunhee Huh, Sung-Wan Hong, Sang-Hui Park, Changsik Shin, Jun-Suk Bang, Changbyung Park, Sungsoo Park, Gyu-Hyeong Cho:
A 10.1" 183-µW/electrode, 0.73-mm2/sensor High-SNR 3-D Hover Sensor Based on Enhanced Signal Refining and Fine Error Calibrating Techniques. 1079-1088 - Marcus J. Weber, Yoshiaki Yoshihara, Ahmed Sawaby, Jayant Charthad, Ting Chia Chang, Amin Arbabian:
A Miniaturized Single-Transducer Implantable Pressure Sensor With Time-Multiplexed Ultrasonic Data and Power Links. 1089-1101 - Sung-Yun Park, Jihyun Cho, Kyuseok Lee, Euisik Yoon:
Dynamic Power Reduction in Scalable Neural Recording Interface Using Spatiotemporal Correlation and Temporal Sparsity of Neural Signals. 1102-1114 - Md Shakil Akter, Kofi A. A. Makinwa, Klaas Bult:
A Capacitively Degenerated 100-dB Linear 20-150 MS/s Dynamic Amplifier. 1115-1126 - Bonjern Yang, Eric Chang, Ali M. Niknejad, Borivoje Nikolic, Elad Alon:
A 65-nm CMOS I/Q RF Power DAC With 24- to 42-dB Third-Harmonic Cancellation and Up to 18-dB Mixed-Signal Filtering. 1127-1138 - Il-Hoon Jang, Min-Jae Seo, Sang-Hyun Cho, Jae-Keun Lee, Seung-Yeob Baek, Sunwoo Kwon, Michael Choi, Hyung-Jong Ko, Seung-Tak Ryu:
A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling. 1139-1148 - Junhua Shen, Akira Shikata, Lalinda Fernando, Ned Guthrie, Baozhen Chen, Mark Maddox, Nikhil Mascarenhas, Ron Kapusta, Michael C. W. Coln:
A 16-bit 16-MS/s SAR ADC With On-Chip Calibration in 55-nm CMOS. 1149-1160 - Ewout Martens, Benjamin P. Hershberg, Jan Craninckx:
A 69-dB SNDR 300-MS/s Two-Time Interleaved Pipelined SAR ADC in 16-nm CMOS FinFET With Capacitive Reference Stabilization. 1161-1171 - Shuang Zhu, Bo Wu, Yongda Cai, Yun Chiu:
A 2-GS/s 8-bit Non-Interleaved Time-Domain Flash ADC Based on Remainder Number System in 65-nm CMOS. 1172-1183 - Guoqiang Zhang, Kosuke Yayama, Akio Katsushima, Takahiro Miki:
A 3.2 ppm/°C Second-Order Temperature Compensated CMOS On-Chip Oscillator Using Voltage Ratio Adjusting Technique. 1184-1191 - Yongsun Lee, Taeho Seong, Seyeon Yoo, Jaehyouk Choi:
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique. 1192-1202 - Po-Wei Chiu, Somnath Kundu, Qianying Tang, Chris H. Kim:
A 65-nm 10-Gb/s 10-mm On-Chip Serial Link Featuring a Digital-Intensive Time-Based Decision Feedback Equalizer. 1203-1213 - Jonathan E. Proesel, Zeynep Toprak Deniz, Alessandro Cevrero, Ilter Özkaya, Seongwon Kim, Daniel M. Kuchta, Sungjae Lee, Sergey V. Rylov, Herschel A. Ainspan, Timothy O. Dickson, John F. Bulzacchelli, Mounir Meghelli:
A 32 Gb/s, 4.7 pJ/bit Optical Link With -11.7 dBm Sensitivity in 14-nm FinFET CMOS. 1214-1226 - Ilter Özkaya, Alessandro Cevrero, Pier Andrea Francese, Christian Menolfi, Thomas Morf, Matthias Braendli, Daniel M. Kuchta, Lukas Kull, Christian W. Baks, Jonathan E. Proesel, Marcel A. Kossel, Danny Luu, Benjamin G. Lee, Fuad E. Doany, Mounir Meghelli, Yusuf Leblebici, Thomas Toifl:
A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver With Low-Latency Digital CDR in 14-nm CMOS FinFET. 1227-1237
Volume 53, Number 5, May 2018
- Jan Craninckx:
New Associate Editor. 1243 - Osama Shana'a:
Introduction to the Special Section on the 2017 RFIC Symposium. 1244 - Hong-Teuk Kim, Byoung-Sun Park, Seong-Sik Song, Tak-Su Moon, Sohyeong Kim, Jongmoon Kim, Ji-Young Chang, Yo-Chul Ho:
A 28-GHz CMOS Direct Conversion Transceiver With Packaged 2 × 4 Antenna Array for 5G Cellular System. 1245-1259 - Kerim Kibaroglu, Mustafa Sayginer, Gabriel M. Rebeiz:
A Low-Cost Scalable 32-Element 28-GHz Phased Array Transceiver for 5G Communication Links Based on a 2×2 Beamformer Flip-Chip Unit Cell. 1260-1274 - Susnata Mondal, Rahul Singh, Ahmed I. Hussein, Jeyanandh Paramesh:
A 25-30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication. 1275-1287 - Marco Vigilante, Patrick Reynaert:
A Wideband Class-AB Power Amplifier With 29-57-GHz AM-PM Compensation in 0.9-V 28-nm Bulk CMOS. 1288-1301 - Sunmin Jang, Jaehun Jeong, Rundao Lu, Michael P. Flynn:
A 16-Element 4-Beam 1 GHz IF 100 MHz Bandwidth Interleaved Bit Stream Digital Beamformer in 40 nm CMOS. 1302-1312 - Zhi Hu, Mehmet Kaynak, Ruonan Han:
High-Power Radiation at 1 THz in Silicon: A Fully Scalable Array Using a Multi-Functional Radiating Mesh Structure. 1313-1327 - Jakob Vovnoboy, Run Levinger, Nadav Mazor, Danny Elad:
A Dual-Loop Synthesizer With Fast Frequency Modulation Ability for 77/79 GHz FMCW Automotive Radar Applications. 1328-1337 - Alireza Imani, Hossein Hashemi:
Frequency and Power Scaling in mm-Wave Colpitts Oscillators. 1338-1347 - Yuanching Lien, Eric A. M. Klumperink, Bernard Tenbroek, Jon Strange, Bram Nauta:
Enhanced-Selectivity High-Linearity Low-Noise Mixer-First Receiver With Complex Pole Pair Due to Capacitive Positive Feedback. 1348-1360 - Mohammadreza Mehrpoo, Mohsen Hashemi, Yiyu Shen, Leo C. N. de Vreede, Morteza S. Alavi:
A Wideband Linear I/Q-Interleaving DDRM. 1361-1373 - Ali Ghahremani, Anne-Johan Annema, Bram Nauta:
Outphasing Class-E Power Amplifiers: From Theory to Back-Off Efficiency Improvement. 1374-1386 - Abhishek Agrawal, Arun Natarajan:
An Interferer-Tolerant CMOS Code-Domain Receiver Based on N-Path Filters. 1387-1397 - Heechai Kang, Wei-Gi Ho, Vineet Kumar Singh, Ranjit Gharpurey:
A Wideband Receiver Employing PWM-Based Harmonic Rejection Downconversion. 1398-1410 - Erkan Alpman, Ahmad Khairi, Richard Dorrance, Minyoung Park, V. Srinivasa Somayazulu, Jeffrey R. Foerster, Ashoke Ravi, Jeyanandh Paramesh, Stefano Pellerano:
802.11g/n Compliant Fully Integrated Wake-Up Receiver With -72-dBm Sensitivity in 14-nm FinFET CMOS. 1411-1422 - Mustafijur Rahman, Ramesh Harjani:
A 2.4-GHz, Sub-1-V, 2.8-dB NF, 475-µW Dual-Path Noise and Nonlinearity Cancelling LNA for Ultra-Low-Power Radios. 1423-1430 - Gengzhen Qi, Barend van Liempd, Pui-In Mak, Rui Paulo Martins, Jan Craninckx:
A SAW-Less Tunable RF Front End for FDD and IBFD Combining an Electrical-Balance Duplexer and a Switched-LC N-Path LNA. 1431-1442 - Vahid Dabbagh Rezaei, Kamran Entesari:
A Fully On-Chip 80-pJ/b OOK Super-Regenerative Receiver With Sensitivity-Data Rate Tradeoff Capability. 1443-1456 - Paolo Valerio Testa, Corrado Carta, Udo Jörges, Frank Ellinger:
Analysis and Design of a 30- to 220-GHz Balanced Cascaded Single-Stage Distributed Amplifier in 130-nm SiGe BiCMOS. 1457-1467 - Giacomo Pini, Danilo Manstretta, Rinaldo Castello:
Analysis and Design of a 20-MHz Bandwidth, 50.5-dBm OOB-IIP3, and 5.4-mW TIA for SAW-Less Receivers. 1468-1480 - Baozhen Chen, Mark Maddox, Michael C. W. Coln, Ye Lu, Junhua Shen, Lalinda Fernando:
Precision Passive-Charge-Sharing SAR ADC: Analysis, Design, and Measurement Results. 1481-1492 - Ahmad AlMarashli, Jens Anders, Joachim Becker, Maurits Ortmanns:
A Nyquist Rate SAR ADC Employing Incremental Sigma Delta DAC Achieving Peak SFDR = 107 dB at 80 kS/s. 1493-1507 - Chin-Yu Lin, Yen-Hsin Wei, Tai-Cheng Lee:
A 10-bit 2.6-GS/s Time-Interleaved SAR ADC With a Digital-Mixing Timing-Skew Calibration Technique. 1508-1517 - Takashi Takemoto, Yasunobu Matsuoka, Hiroki Yamashita, Yong Lee, Hideo Arimoto, Masaru Kokubo, Tatemi Ido:
A 50-Gb/s High-Sensitivity (-9.2 dBm) Low-Power (7.9 pJ/bit) Optical Receiver Based on 0.18-µm SiGe BiCMOS Technology. 1518-1538 - Liang Zhou, Kenji Aono, Shantanu Chakrabartty:
A CMOS Timer-Injector Integrated Circuit for Self-Powered Sensing of Time-of-Occurrence. 1539-1549 - Piotr Otfinowski, Grzegorz Deptuch, Piotr Maj:
Asynchronous Approximation of a Center of Gravity for Pixel Detectors' Readout Circuits. 1550-1558
Volume 53, Number 6, June 2018
- Tong Zhang, Chenxin Su, Ali Najafi, Jacques Christophe Rudell:
Wideband Dual-Injection Path Self-Interference Cancellation Architecture for Full-Duplex Transceivers. 1563-1576 - Tanbir Haque, Matthew Bajor, Yudong Zhang, Jianxun Zhu, Zarion A. Jacobs, Blayne Kettlewell, John Wright, Peter R. Kinget:
A Reconfigurable Architecture Using a Flexible LO Modulator to Unify High-Sensitivity Signal Reception and Compressed-Sampling Wideband Signal Detection. 1577-1591 - Sameed Hameed, Sudhakar Pamarti:
Design and Analysis of a Programmable Receiver Front End Based on Baseband Analog-FIR Filtering Using an LPTV Resistor. 1592-1606 - Yang Xu, Peter R. Kinget:
A Chopping Switched-Capacitor RF Receiver With Integrated Blocker Detection. 1607-1617 - Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, Rui Paulo Martins:
A 0.18-V 382-µW Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS. 1618-1627 - Keping Wang, Lei Qiu, Jabeom Koo, Richard C. Ruby, Brian Otis:
Design of 1.8-mW PLL-Free 2.4-GHz Receiver Utilizing Temperature-Compensated FBAR Resonator. 1628-1639 - Po-Han Peter Wang, Haowei Jiang, Li Gao, Pinar Sen, Young-Han Kim, Gabriel M. Rebeiz, Patrick P. Mercier, Drew A. Hall:
A Near-Zero-Power Wake-Up Receiver Achieving -69-dBm Sensitivity. 1640-1652 - Chul Kim, Chang-Seok Chae, Young-Sub Yuk, Chris M. Thomas, Yi-Gyeong Kim, Jong-Kee Kwon, Sohmyung Ha, Gert Cauwenberghs, Gyu-Hyeong Cho:
A 500-MHz Bandwidth 7.5-mVpp Ripple Power-Amplifier Supply Modulator for RF Polar Transmitters. 1653-1665 - Zhidong Bai, Ali Azam, Dallas Johnson, Wen Yuan, Jeffrey S. Walling:
Split-Array, C-2C Switched-Capacitor Power Amplifiers. 1666-1677 - Sadia Afroz, Hyunchul Kim, Kwang-Jin Koh:
Power-Efficient W-Band (92-98 GHz) Phased-Array Transmit and Receive Elements With Quadrature-Hybrid-Based Passive Phase Interpolator. 1678-1693 - Henry Kennedy, Rares Bodnar, Teerasak Lee, William Redman-White:
A Self-Tuning Resonant-Inductive-Link Transmit Driver Using Quadrature Symmetric Delay Trimmable Phase-Switched Fractional Capacitance. 1694-1706 - Long Kong, Behzad Razavi:
A 2.4-GHz RF Fractional-N Synthesizer With BW = 0.25fREF. 1707-1718 - Mehmet Batuhan Dayanik, Michael P. Flynn:
Digital Fractional-N PLLs Based on a Continuous-Time Third-Order Noise-Shaping Time-to-Digital Converter for a 240-GHz FMCW Radar System. 1719-1730 - Fernando Cardes, Eric Gutierrez, Andrés Quintero, Cesare Buffa, Andreas Wiesbauer, Luis Hernández:
0.04-mm2 103-dB-A Dynamic Range Second-Order VCO-Based Audio ΣΔ ADC in 0.13-µm CMOS. 1731-1742 - Tzu-Yun Wang, Hao-Yu Li, Zong-Yu Ma, Yang-Jing Huang, Sheng-Yu Peng:
A Bypass-Switching SAR ADC With a Dynamic Proximity Comparator for Biomedical Applications. 1743-1754 - Kwuang-Han Chang, Chih-Cheng Hsieh:
A 12-bit 150-MS/s Sub-Radix-3 SAR ADC With Switching Miller Capacitance Reduction. 1755-1764 - Jae-Won Nam, Mohsen Hassanpourghadi, Aoyang Zhang, Mike Shuo-Wei Chen:
A 12-Bit 1.6, 3.2, and 6.4 GS/s 4-b/Cycle Time-Interleaved SAR ADC With Dual Reference Shifting and Interpolation. 1765-1779 - Minsoo Choi, Sooeun Lee, Myungguk Lee, Ji-Hoon Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching. 1780-1792 - Monireh Moayedi Pour Fard, Odile Liboiron-Ladouceur, Glenn E. R. Cowan:
1.23-pJ/bit 25-Gb/s Inductor-Less Optical Receiver With Low-Voltage Silicon Photodetector. 1793-1805 - Ahmed Elkholy, Saurabh Saxena, Guanghua Shu, Amr Elshazly, Pavan Kumar Hanumolu:
Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers. 1806-1817 - Ahmed Elkholy, Ahmed Elmallah, Mostafa Gamal Ahmed, Pavan Kumar Hanumolu:
A 6.75-8.25-GHz -250-dB FoM Rapid ON/OFF Fractional-N Injection-Locked Clock Multiplier. 1818-1829 - Unsoo Ha, Jaehyuk Lee, Minseo Kim, Taehwan Roh, Sangsik Choi, Hoi-Jun Yoo:
An EEG-NIRS Multimodal SoC for Accurate Anesthesia Depth Monitoring. 1830-1843 - Dong-Hoon Jung, Ki-Ryong Kim, Sunghwan Jo, Seong-Ook Jung:
0.293-mm2 Fast Transient Response Hysteretic Quasi-V2 DC-DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35-µm CMOS. 1844-1855 - Francesco Santoro, Rüdiger Kuhn, Neil Gibson, Nicola Rasera, Thomas Tost, Helmut Graeb, Bernhard Wicht, Ralf Brederlow:
A Hysteretic Buck Converter With 92.1% Maximum Efficiency Designed for Ultra-Low Power and Fast Wake-Up SoC Applications. 1856-1868 - Baozhen Chen, Mark Maddox, Michael C. W. Coln, Ye Lu, Junhua Shen, Lalinda D. Fernando:
Corrections to "Precision Passive-Charge-Sharing SAR ADC: Analysis, Design, and Measurement Results". 1869 - Ning Guo, Yipeng Huang, Tao Mai, Sharvil Patil, Chi Cao, Mingoo Seok, Simha Sethumadhavan, Yannis P. Tsividis:
Corrections to "Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time". 1870
Volume 53, Number 7, July 2018
- Jan Craninckx:
New Associate Editor. 1875 - Andrea Bevilacqua, Shidhartha Das, Pieter Harpe:
Guest Editorial Special Issue on the 47th European Solid-State Circuits Conference (ESSCIRC). 1876-1877 - Rohan Sehgal, Frank M. L. van der Goes, Klaas Bult:
A 13-mW 64-dB SNDR 280-MS/s Pipelined ADC Using Linearized Integrating Amplifiers. 1878-1888 - Athanasios Ramkaj, Maarten Strackx, Michiel S. J. Steyaert, Filip Tavernier:
A 1.25-GS/s 7-b SAR ADC With 36.4-dB SNDR at 5 GHz Using Switch-Bootstrapping, USPC DAC and Triple-Tail Comparator in 28-nm CMOS. 1889-1901 - Harijot Singh Bindra, Chris E. Lokin, Daniël Schinkel, Anne-Johan Annema, Bram Nauta:
A 1.2-V Dynamic Bias Latch-Type Comparator in 65-nm CMOS With 0.4-mV Input Noise. 1902-1912 - Denis Djekic, Georg E. Fantner, Klaus Lips, Maurits Ortmanns, Jens Anders:
A 0.1% THD, 1-MΩ to 1-GΩ Tunable, Temperature-Compensated Transimpedance Amplifier Using a Multi-Element Pseudo-Resistor. 1913-1923 - Juan C. Castellanos, Mert Turhan, Eugenio Cantatore:
A 93.3% Peak-Efficiency Self-Resonant Hybrid-Switched-Capacitor LED Driver in 0.18-µm CMOS Technology. 1924-1935 - Juergen Wittmann, Tobias Funk, Thoralf Rosahl, Bernhard Wicht:
A 48-V Wide-Vin 9-25-MHz Resonant DC-DC Converter. 1936-1944 - Daniele Montanari, Gerardo Castellano, Ehsan Kargaran, Giacomo Pini, Saheed Tijani, Davide De Caro, Antonio Giuseppe Maria Strollo, Danilo Manstretta, Rinaldo Castello:
An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands. 1945-1959 - Kyoohyun Lim, Sanghoon Lee, Yongha Lee, Byeongmoo Moon, Hwahyeong Shin, Kisub Kang, Seungbeom Kim, Jinhyeok Lee, Hyungsuk Lee, Hyunchul Shim, Chulhoon Sung, Kumyoung Park, Garam Lee, Minjung Kim, Seokyeong Park, Hyosun Jung, Younghyun Lim, Changhun Song, Jaehyeon Seong, Heechang Cho, Jaehyouk Choi, Jong-Ryul Lee, Sangwoo Han:
A 65-nm CMOS 2×2 MIMO Multi-Band LTE RF Transceiver for Small Cell Base Stations. 1960-1976 - Yizhe Hu, Teerachot Siriburanon, Robert Bogdan Staszewski:
A Low-Flicker-Noise 30-GHz Class-F23 Oscillator in 28-nm CMOS Using Implicit Resonance and Explicit Common-Mode Return Path. 1977-1987 - Staffan Ek, Tony Påhlsson, Christian Elgaard, Anders Carlsson, Andreas Axholt, Anna-Karin Stenman, Lars Sundström, Henrik Sjöland:
A 28-nm FD-SOI 115-fs Jitter PLL-Based LO System for 24-30-GHz Sliding-IF 5G Transceivers. 1988-2000 - Khaled Khalaf, Kristof Vaesen, Steven Brebels, Giovanni Mangraviti, Michael Libois, Charlotte Soens, Wim Van Thillo, Piet Wambacq:
A 60-GHz 8-Way Phased-Array Front-End With T/R Switching and Calibration-Free Beamsteering in 28-nm CMOS. 2001-2011 - Stefan Shopov, Ozan D. Gurbuz, Gabriel M. Rebeiz, Sorin P. Voinigescu:
AD-Band Digital Transmitter with 64-QAM and OFDM Free-Space Constellation Formation. 2012-2022 - Niels Van Thienen, Yang Zhang, Patrick Reynaert:
Bidirectional Communication Circuits for a 120-GHz PMF Data Link in 40-nm CMOS. 2023-2031 - Christopher Sutardja, Jan M. Rabaey:
Isolator-Less Near-Field RFID Reader for Sub-Cranial Powering/Data Link of Millimeter-Sized Implants. 2032-2042 - Hui Wang, Xiaoyang Wang, Abbas Barfidokht, Jiwoong Park, Joseph Wang, Patrick P. Mercier:
A Battery-Powered Wireless Ion Sensing System Consuming 5.5 nW of Average Power. 2043-2053 - Alexander Sun, Enrique Alvarez-Fontecilla, A. G. Venkatesh, Eliah Aronoff Spencer, Drew A. Hall:
High-Density Redox Amplified Coulostatic Discharge-Based Biosensor Array. 2054-2064 - Eunchul Kang, Qing Ding, Maysam Shabanimotlagh, Pieter Kruizinga, Zu-yao Chang, Emile Noothout, Hendrik J. Vos, Johan G. Bosch, Martin D. Verweij, Nico de Jong, Michiel A. P. Pertijs:
A Reconfigurable Ultrasound Transceiver ASIC With 24×40 Elements for 3-D Carotid Artery Imaging. 2065-2075 - Philipp Schönle, Florian Glaser, Thomas Burger, Giovanni Rovere, Luca Benini, Qiuting Huang:
A Multi-Sensor and Parallel Processing SoC for Miniaturized Medical Instrumentation. 2076-2087 - Guenole Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran:
A 2.7 pJ/cycle 16 MHz, 0.7 µW Deep Sleep Power ARM Cortex-M0+ Core SoC in 28 nm FD-SOI. 2088-2100 - Hans Reyserhove, Wim Dehaene:
Margin Elimination Through Timing Error Detection in a Near-Threshold Enabled 32-bit Microcontroller in 40-nm CMOS. 2101-2113 - Marco Pasotti, Riccardo Zurla, Marcella Carissimi, Chantal Auricchio, Donatella Brambilla, Emanuela Calvetti, Laura Capecchi, Luigi Croce, Daniele Gallinari, Cristina Mazzaglia, Vikas Rana, Alessandro Cabrini, Guido Torelli:
A 32-KB ePCM for Real-Time Data Processing in Automotive and Smart Power Applications. 2114-2125 - Mingu Kang, Sujan K. Gonugondla, Sungmin Lim, Naresh R. Shanbhag:
A 19.4-nJ/Decision, 364-K Decisions/s, In-Memory Random Forest Multi-Class Inference Accelerator. 2126-2135 - Robert Giterman, Alexander Fish, Narkis Geuli, Elad Mentovich, Andreas Burg, Adam Teman:
An 800-MHz Mixed- VT 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications. 2136-2148
Volume 53, Number 8, August 2018
- Hao Wang, Jingjun Chen, James T. S. Do, Hooman Rashtian, Xiaoguang Liu:
High-Efficiency Millimeter-Wave Single-Ended and Differential Fundamental Oscillators in CMOS. 2151-2163 - Najme Ebrahimi, James F. Buckwalter:
A High-Fractional-Bandwidth, Millimeter-Wave Bidirectional Image-Selection Architecture With Narrowband LO Tuning Requirements. 2164-2176 - Jingzhi Zhang, Yixuan Cheng, Chenxi Zhao, Yunqiu Wu, Kai Kang:
Analysis and Design of Ultra-Wideband mm-Wave Injection-Locked Frequency Dividers Using Transformer-Based High-Order Resonators. 2177-2189 - Negar Reiskarimian, Mahmood Baraani Dastjerdi, Jin Zhou, Harish Krishnaswamy:
Analysis and Design of Commutation-Based Circulator-Receivers for Integrated Full-Duplex Wireless. 2190-2201 - Ickhyun Song, Moon-Kyu Cho, John D. Cressler:
Design and Analysis of a Low Loss, Wideband Digital Step Attenuator With Minimized Amplitude and Phase Variations. 2202-2213 - Yikun Chang, Abishek Manian, Long Kong, Behzad Razavi:
An 80-Gb/s 44-mW Wireline PAM4 Transmitter. 2214-2226 - Dongxuan Bao, Zhuo Zou, Majid Baghaei Nejad, Yajie Qin, Li-Rong Zheng:
A Wirelessly Powered UWB RFID Sensor Tag With Time-Domain Analog-to-Information Interface. 2227-2239 - Longjie Zhong, Xinquan Lai, Donglai Xu:
Oversampling Successive Approximation Technique for MEMS Differential Capacitive Sensor. 2240-2251 - JinSeok Lee, Geon-Hwi Lee, Hyojun Kim, SeongHwan Cho:
An Ultra-High Input Impedance Analog Front End Using Self-Calibrated Positive Feedback. 2252-2262 - Nikolas P. Papadopoulos, Florian De Roose, Jan-Laurens P. J. van der Steen, Edsger C. P. Smits, Marc Ameys, Wim Dehaene, Jan Genoe, Kris Myny:
Toward Temperature Tracking With Unipolar Metal-Oxide Thin-Film SAR C-2C ADC on Plastic. 2263-2272 - Vikram Chaturvedi, Johan Vogel, Kofi A. A. Makinwa, Stoyan N. Nihtianov:
A 19.8-mW Eddy-Current Displacement Sensor Interface With Sub-Nanometer Resolution. 2273-2283 - Mingliang Tan, Chao Chen, Zhao Chen, Jovana Janjic, Verya Daeichin, Zu-yao Chang, Emile Noothout, Gijs van Soest, Martin D. Verweij, Nico de Jong, Michiel A. P. Pertijs:
A Front-End ASIC With High-Voltage Transmit Switching and Receive Digitization for 3-D Forward-Looking Intravascular Ultrasound Imaging. 2284-2297 - Natalie Butz, Armin Taschwer, Sebastian Nessler, Yiannos Manoli, Matthias Kuhl:
A 22 V Compliant 56 ${\mu}$ W Twin-Track Active Charge Balancing Enabling 100% Charge Compensation Even in Monophasic and 36% Amplitude Correction in Biphasic Neural Stimulators. 2298-2310 - Jaehong Jung, Ik-Hwan Kim, Seong-Jin Kim, Yoonmyung Lee, Jung-Hoon Chun:
A 1.08-nW/kHz 13.2-ppm/°C Self-Biased Timer Using Temperature-Insensitive Resistive Current. 2311-2318 - Min-Woong Seo, Yuya Shirakawa, Yoshimasa Kawata, Keiichiro Kagawa, Keita Yasutomi, Shoji Kawahito:
A Time-Resolved Four-Tap Lock-In Pixel CMOS Image Sensor for Real-Time Fluorescence Lifetime Imaging Microscopy. 2319-2330 - Jize Jiang, Wei Shu, Joseph S. Chang:
A 65-nm CMOS Low Dropout Regulator Featuring >60-dB PSRR Over 10-MHz Frequency Range and 100-mA Load Current Range. 2331-2342 - Yuan Gao, Lisong Li, Philip K. T. Mok:
An AC Input Inductor-Less LED Driver for Efficient Lighting and Visible Light Communication. 2343-2355 - Raveesh Magod, Bertan Bakkaloglu, Sanjeev Manandhar:
A 1.24 $\mu$ A Quiescent Current NMOS Low Dropout Regulator With Integrated Low-Power Oscillator-Driven Charge-Pump and Switched-Capacitor Pole Tracking Compensation. 2356-2367 - Mehul Tikekar, Vivienne Sze, Anantha P. Chandrakasan:
A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices. 2368-2377 - Yuta Toriyama, Dejan Markovic:
A 2.267-Gb/s, 93.7-pJ/bit Non-Binary LDPC Decoder With Logarithmic Quantization and Dual-Decoding Algorithm Scheme for Storage Applications. 2378-2388 - Yan Li, Yufeng Li, I-Chyn Wey, Jianhao Hu, Fan Yang, Xuan Zeng, Xiaoxue Jiang, Jie Chen:
Low-Power Noise-Immune Nanoscale Circuit Design Using Coding-Based Partial MRF Method. 2389-2398 - Monodeep Kar, Arvind Singh, Sanu K. Mathew, Anand Rajan, Vivek De, Saibal Mukhopadhyay:
Reducing Power Side-Channel Information Leakage of AES Engines Using Fully Integrated Inductive Voltage Regulator. 2399-2414 - Jun Yang, Hao Ji, Yichen Guo, Jizhe Zhu, Yuan Zhuang, Zhi Li, Xinning Liu, Longxing Shi:
A Double Sensing Scheme With Selective Bitline Voltage Regulation for Ultralow-Voltage Timing Speculative SRAM. 2415-2426 - Ki-Chan Woo, Byung-Do Yang:
Low-Area TCAM Using A Don't Care Reduction Scheme. 2427-2433
Volume 53, Number 9, September 2018
- Hua Wang, Shahriar Shahramian:
Introduction to the Special Section on the 2017 IEEE BCTM and IEEE CSICS Conferences. 2439-2440 - Christian Bredendiek, Dominic A. Funke, Jan Schopfel, Victoria Kloubert, Benedikt Welp, Klaus Aufinger, Nils Pohl:
A 61-GHz SiGe Transceiver Frontend for Energy and Data Transmission of Passive RFID Single-Chip Tags With Integrated Antennas. 2441-2453 - Rong Jiang, Hossein Noori, Fa Foster Dai:
A Multi-Phase Coupled Oscillator Using Inductive Resonant Coupling and Modified Dual-Tank Techniques. 2454-2464 - Maciej Kucharski, Mohamed Hussein Eissa, Andrea Malignaggi, Defu Wang, Herman Jalli Ng, Dietmar Kissinger:
D-Band Frequency Quadruplers in BiCMOS Technology. 2465-2478 - Christopher Uhl, Horst Hettrich, Michael Möller:
Design Considerations for a 100 Gbit/s SiGe-BiCMOS Power Multiplexer With 2 Vpp Differential Voltage Swing. 2479-2487 - Bodhisatwa Sadhu, Tejasvi Anand, Scott K. Reynolds:
A Fully Decoupled LC Tank VCO Topology for Amplitude Boosted Low Phase Noise Operation. 2488-2499 - Brandon Mathieu, Jamin J. McCue, Lucas Duncan, Brian Dupaix, Hossein Miri Lavasani, Waleed Khalil:
A Capacitively Coupled, Pseudo Return-to-Zero Input, Latched-Bias Data Receiver. 2500-2511 - Wooram Lee, Jean-Olivier Plouchart, Caglar Ozdag, Yigit Aydogan, Mark Yeck, Alper Cabuk, Asim Kepkep, Scott K. Reynolds, Emre Apaydin, Alberto Valdes-Garcia:
Fully Integrated 94-GHz Dual-Polarized TX and RX Phased Array Chipset in SiGe BiCMOS Operating up to 105 °C. 2512-2531 - Mohamed Hussein Eissa, Andrea Malignaggi, Ruoyu Wang, Mohamed Elkhouly, Klaus Schmalz, Ahmet Cagri Ulusoy, Dietmar Kissinger:
Wideband 240-GHz Transmitter and Receiver in BiCMOS Technology With 25-Gbit/s Data Rate. 2532-2542 - ChandraKanth Reddy Chappidi, Xue Wu, Kaushik Sengupta:
Simultaneously Broadband and Back-Off Efficient mm-Wave PAs: A Multi-Port Network Synthesis Approach. 2543-2559 - Liang Wu, Quan Xue:
E-Band Multi-Phase LC Oscillators With Rotated-Phase-Tuning Using Implicit Phase Shifters. 2560-2571 - Naser Pourmousavian, Feng-Wei Kuo, Teerachot Siriburanon, Masoud Babaie, Robert Bogdan Staszewski:
A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS. 2572-2583 - Hyun-Wook Kang, Hyeok-Ki Hong, Wan Kim, Seung-Tak Ryu:
A Time-Interleaved 12-b 270-MS/s SAR ADC With Virtual-Timing-Reference Timing-Skew Calibration Scheme. 2584-2594 - Sung-En Hsieh, Chih-Cheng Hsieh:
A 0.44-fJ/Conversion-Step 11-Bit 600-kS/s SAR ADC With Semi-Resting DAC. 2595-2603 - Lieuwe B. Leene, Timothy G. Constandinou:
A 0.006 mm2 1.2 µW Analog-to-Time Converter for Asynchronous Bio-Sensors. 2604-2613 - M. Pilar Garde, Antonio J. López-Martín, Ramón González Carvajal, Jaime Ramírez-Angulo:
Super Class-AB Recycling Folded Cascode OTA. 2614-2623 - Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins:
A Regulation-Free Sub-0.5-V 16-/24-MHz Crystal Oscillator With 14.2-nJ Startup Energy and 31.8-µW Steady-State Power. 2624-2635 - Yang Zhao, Jian Zhao, Xi Wang, Guo Ming Xia, Qin Shi, An Ping Qiu, Yong Ping Xu:
A Sub-0.1°/h Bias-Instability Split-Mode MEMS Gyroscope With CMOS Readout Circuit. 2636-2650 - Rafal Kleczek, Pawel Grybos, Robert Szczygiel, Piotr Maj:
Single Photon-Counting Pixel Readout Chip Operating Up to 1.2 Gcps/mm2 for Digital X-Ray Imaging Systems. 2651-2662 - Tianyu Jia, Jie Gu:
A Fully Integrated Buck Regulator With 2-GHz Resonant Switching for Low-Power Applications. 2663-2674 - Younghyun Lim, Jeonghyun Lee, Suneui Park, Yongwoo Jo, Jaehyouk Choi:
An External Capacitorless Low-Dropout Regulator With High PSR at All Frequencies From 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique. 2675-2685 - Mohammad Mahdi Khafaji, Guido Belfiore, Jan Plíva, Ronny Henker, Frank Ellinger:
A 4×45 Gb/s Two-Tap FFE VCSEL Driver in 14-nm FinFET CMOS Suitable for Burst Mode Operation. 2686-2695 - Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Yuuki Ogata, Hisakatsu Yamaguchi:
Loop Gain Adaptation for Optimum Jitter Tolerance in Digital CDRs. 2696-2708 - Xuyang Lu, Lingyu Hong, Kaushik Sengupta:
CMOS Optical PUFs Using Noise-Immune Process-Sensitive Photonic Crystals Incorporating Passive Variations for Robustness. 2709-2721 - Paul N. Whatmough, Sae Kyu Lee, David M. Brooks, Gu-Yeon Wei:
DNN Engine: A 28-nm Timing-Error Tolerant Sparse Deep Neural Network Processor for IoT Applications. 2722-2731 - Zhidong Bai, Ali Azam, Dallas Johnson, Wen Yuan, Jeffrey S. Walling:
Corrections to "Split-Array, C-2C Switched-Capacitor Power Amplifiers". 2732 - Sameed Hameed, Sudhakar Pamarti:
Errata for "Design and Analysis of a Programmable Receiver Front End Based on Baseband Analog-FIR Filtering Using an LPTV Resistor". 2733
Volume 53, Number 10, October 2018
- Tsung-Hsien Lin, Chia-Hsiang Yang, Seung-Tak Ryu:
Introduction to the Special Section on the 2017 Asian Solid-State Circuits Conference (A-SSCC). 2739-2740 - Chi-Wei Liu, Hui-Hsuan Lee, Pei-Chun Liao, Yi-Lun Chen, Ming-Jie Chung, Po-Hung Chen:
Dual-Source Energy-Harvesting Interface With Cycle-by-Cycle Source Tracking and Adaptive Peak-Inductor-Current Control. 2741-2750 - Karim Rawy, Taegeun Yoo, Tony Tae-Hyoung Kim:
An 88% Efficiency 0.1-300-µW Energy Harvesting System With 3-D MPPT Using Switch Width Modulation for IoT Smart Nodes. 2751-2762 - Sung-En Hsieh, Chen-Che Kao, Chih-Cheng Hsieh:
A 0.5-V 12-bit SAR ADC Using Adaptive Time-Domain Comparator With Noise Optimization. 2763-2771 - Yong-Sik Kwak, Kang-Il Cho, Ho-Jin Kim, Seung-Hoon Lee, Gil-Cho Ahn:
A 72.9-dB SNDR 20-MHz BW 2-2 Discrete-Time Resolution-Enhanced Sturdy MASH Delta-Sigma Modulator Using Source-Follower-Based Integrators. 2772-2782 - Wei Wang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins:
A 5.35-mW 10-MHz Single-Opamp Third-Order CT ΔΣ Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS. 2783-2794 - Michele D'Urbino, Chao Chen, Zhao Chen, Zu-yao Chang, Jacco Ponte, Boris Lippe, Michiel A. P. Pertijs:
An Element-Matched Electromechanical ΔΣ ADC for Ultrasound Imaging. 2795-2805 - Van Loi Le, Juhui Li, Alan Chang, Tony Tae-Hyoung Kim:
A 0.4-V, 0.138-fJ/Cycle Single-Phase-Clocking Redundant-Transition-Free 24T Flip-Flop With Change-Sensing Scheme in 40-nm CMOS. 2806-2817 - Chester Liu, Sung-Gun Cho, Zhengya Zhang:
A 2.56-mm2 718GOPS Configurable Spiking Convolutional Sparse Coding Accelerator in 40-nm CMOS. 2818-2827 - Sachin Taneja, Anastacia B. Alvarez, Massimo Alioto:
Fully Synthesizable PUF Featuring Hysteresis and Temperature Compensation for 3.2% Native BER and 1.02 fJ/b in 40 nm. 2828-2839 - Abdel Martinez Alonso, Masaya Miyahara, Akira Matsuzawa:
A 12.8-ns-Latency DDFS MMIC With Frequency, Phase, and Amplitude Modulations in 65-nm CMOS. 2840-2849 - Jianfu Lin, Zheng Song, Nan Qi, Woogeun Rhee, Zhihua Wang, Baoyong Chi:
A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector. 2850-2863 - Aurangozeb, Maruf Mohammad, Masum Hossain:
Analog to Sequence Converter-Based PAM-4 Receiver With Built-In Error Correction. 2864-2877 - Jihwan Park, Joo-Hyung Chae, Yong-Un Jeong, Jae-Whan Lee, Suhwan Kim:
A 2.1-Gb/s 12-Channel Transmitter With Phase Emphasis Embedded Serializer for 55-in UHD Intra-Panel Interface. 2878-2888 - Noriyuki Miura, Masanori Takahashi, Kazuki Nagatomo, Makoto Nagata:
Chip-Package-Board Interactive PUF Utilizing Coupled Chaos Oscillators With Inductor. 2889-2897 - Tzu-Hsiang Hsu, Ting Liao, Nien-An Lee, Chih-Cheng Hsieh:
A CMOS Time-of-Flight Depth Image Sensor With In-Pixel Background Light Cancellation and Phase Shifting Readout Technique. 2898-2905 - Chang-Kyo Lee, Junha Lee, Kiho Kim, Jin-Seok Heo, Jin-Hyeok Baek, Gil-Hoon Cha, Daesik Moon, Dong-Hun Lee, Jong-Wook Park, Seunseob Lee, Si-Hyeong Cho, Young-Ryeol Choi, Kyung-Soo Ha, Eunsung Seo, Youn-Sik Park, Seung-Jun Bae, Indal Song, Seok-Hun Hyun, Hyuck-Joon Kwon, Young-Soo Sohn, Jung-Hwan Choi, Kwang-Il Park, Seong-Jin Jang:
Dual-Loop Two-Step ZQ Calibration for Dynamic Voltage-Frequency Scaling in LPDDR4 SDRAM. 2906-2916 - Yoshiaki Deguchi, Shun Suzuki, Ken Takeuchi:
Write and Read Frequency-Based Word-Line Batch VTH Modulation for 2-D and 3-D-TLC NAND Flash Memories. 2917-2926 - Marco Vigilante, Patrick Reynaert:
A Coupled-RTWO-Based Subharmonic Receiver Front End for 5G E-Band Backhaul Links in 28-nm Bulk CMOS. 2927-2938 - Md Shakil Akter, Rohan Sehgal, Frank M. L. van der Goes, Kofi A. A. Makinwa, Klaas Bult:
A 66-dB SNDR Pipelined Split-ADC in 40-nm CMOS Using a Class-AB Residue Amplifier. 2939-2950 - Veeresh Babu Vulligaddala, Ravikumar Adusumalli, Sudhakar Singamala, M. B. Srinivas:
A Digitally Calibrated Bandgap Reference With 0.06% Error for Low-Side Current Sensing Application. 2951-2957 - Anatoli Mordakhay, Joseph Shor:
Miniaturized, 0.01 mm2, Resistor-Based Thermal Sensor With an Energy Consumption of 0.9 nJ and a Conversion Time of 80 µs for Processor Applications. 2958-2969 - Fei Wang, Liqiang Han, Albert J. P. Theuwissen:
Development and Evaluation of a Highly Linear CMOS Image Sensor With a Digitally Assisted Linearity Calibration. 2970-2981 - Kwanseo Park, Woo-Rham Bae, Jinhyung Lee, Jeongho Hwang, Deog-Kyoon Jeong:
A 6.7-11.2 Gb/s, 2.25 pJ/bit, Single-Loop Referenceless CDR With Multi-Phase, Oversampling PFD in 65-nm CMOS. 2982-2993 - Ja-Hoon Jin, Xuefan Jin, Jaehong Jung, Kiwon Kwon, Jintae Kim, Jung-Hoon Chun:
A 0.75-3.0-Gb/s Dual-Mode Temperature-Tolerant Referenceless CDR With a Deadzone-Compensated Frequency Detector. 2994-3003 - Haowei Jiang, Po-Han Peter Wang, Patrick P. Mercier, Drew A. Hall:
A 0.4-V 0.93-nW/kHz Relaxation Oscillator Exploiting Comparator Temperature-Dependent Delay to Achieve 94-ppm/°C Stability. 3004-3011
Volume 53, Number 11, November 2018
- Chung-Yu Wu, Patrick P. Mercier:
Introduction to the Special Issue on the 2018 IEEE International Solid-State Circuits Conference (ISSCC). 3015-3016 - Masaki Sakakibara, Koji Ogawa, Shin Sakai, Yasuhisa Tochigi, Katsumi Honda, Hidekazu Kikuchi, Takuya Wada, Yasunobu Kamikubo, Tsukasa Miura, Masahiko Nakamizo, Naoki Jyo, Ryo Hayashibara, Shinya Miyata, Satoshi Yamamoto, Yoshiyuki Ota, Hirotsugu Takahashi, Tadayuki Taura, Yusuke Oike, Keiji Tatani, Takayuki Ezaki, Teruo Hirayama:
A 6.9-µm Pixel-Pitch Back-Illuminated Global Shutter CMOS Image Sensor With Pixel-Parallel 14-Bit Subthreshold ADC. 3017-3025 - Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Masatoshi Hirono, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiko Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto:
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC. 3026-3038 - Qingbo Guo, William Deng, Ozkan Bebek, Murat Cenk Cavusoglu, Carlos H. Mastrangelo, Darrin J. Young:
Personal Inertial Navigation System Assisted by MEMS Ground Reaction Sensor Array and Interface ASIC for GPS-Denied Environment. 3039-3049 - Chao Chen, Zhao Chen, Deep Bera, Emile Noothout, Zu-Yao Chang, Mingliang Tan, Hendrik J. Vos, Johan G. Bosch, Martin D. Verweij, Nico de Jong, Michiel A. P. Pertijs:
A Pitch-Matched Front-End ASIC With Integrated Subarray Beamforming ADC for Miniature 3-D Ultrasound Probes. 3050-3064 - Constantine Sideris, Parham Porsandeh Khial, Ali Hajimiri:
Design and Implementation of Reference-Free Drift-Cancelling CMOS Magnetic Sensors for Biosensing Applications. 3065-3075 - Carolina Mora Lopez, Ho Sung Chun, Shiwei Wang, Laurent Berti, Jan Putzeys, Carl Van Den Bulcke, Jan-Willem Weijers, Andrea Firrincieli, Veerle Reumers, Dries Braeken, Nick Van Helleputte:
A Multimodal CMOS MEA for High-Throughput Intracellular Action Potential Measurements and Impedance Spectroscopy in Drug-Screening Applications. 3076-3086 - Gabriel Gagnon-Turcotte, Mehdi Noormohammadi Khiarak, Christian Ethier, Yves De Koninck, Benoit Gosselin:
A 0.13-µm CMOS SoC for Simultaneous Multichannel Optogenetics and Neural Recording. 3087-3100 - Chul Kim, Siddharth Joshi, Hristos Courellis, Jun Wang, Cory T. Miller, Gert Cauwenberghs:
Sub-µVrms-Noise Sub-µW/Channel ADC-Direct Neural Recording With 200-mV/ms Transient Recovery Through Predictive Digital Autoranging. 3101-3110 - Daniel DeDorigo, Christian Moranz, Hagen Graf, Maximilian Marx, Daniel Wendler, Boyu Shui, Abdalrahman Sayed Herbawi, Matthias Kuhl, Patrick Ruther, Oliver Paul, Yiannos Manoli:
Fully Immersible Subcortical Neural Probes With Modular Architecture and a Delta-Sigma ADC Integrated Under Each Electrode for Parallel Readout of 144 Recording Sites. 3111-3125 - Ali Fazli Yeknami, Xiaoyang Wang, Itthipon Jeerapan, Somayeh Imani, Ali Nikoofard, Joseph Wang, Patrick P. Mercier:
A 0.3-V CMOS Biofuel-Cell-Powered Wireless Glucose/Lactate Biosensing System. 3126-3139 - Juan Carlos Pena Ramos, Komail M. H. Badami, Steven Lauwereins, Marian Verhelst:
A Fully Configurable Non-Linear Mixed-Signal Interface for Multi-Sensor Analytics. 3140-3149 - Gerard O'Leary, David M. Groppe, Taufik A. Valiante, Naveen Verma, Roman Genov:
NURIP: Neural Interface Processor for Brain-State Classification and Programmable-Waveform Neurostimulation. 3150-3162 - Sujan K. Gonugondla, Mingu Kang, Naresh R. Shanbhag:
A Variation-Tolerant In-Memory Machine Learning Classifier via On-Chip Training. 3163-3173 - Kohei Matsuda, Tatsuya Fujii, Natsu Shoji, Takeshi Sugawara, Kazuo Sakiyama, Yu-ichi Hayashi, Makoto Nagata, Noriyuki Miura:
A 286 F2/Cell Distributed Bulk-Current Sensor and Secure Flush Code Eraser Against Laser Fault Injection Attack on Cryptographic Processor. 3174-3182 - Tony F. Wu, Haitong Li, Ping-Chen Huang, Abbas Rahimi, Gage Hills, Bryce Hodson, William Hwang, Jan M. Rabaey, H.-S. Philip Wong, Max M. Shulaker, Subhasish Mitra:
Hyperdimensional Computing Exploiting Carbon Nanotube FETs, Resistive RAM, and Their Monolithic 3D Integration. 3183-3196 - Sameed Hameed, Sudhakar Pamarti:
Design and Analysis of a Programmable Receiver Front End With Time-Interleaved Baseband Analog-FIR Filtering. 3197-3207 - David Murphy, Hooman Darabi:
A 27-GHz Quad-Core CMOS Oscillator With No Mode Ambiguity. 3208-3216 - Rouzbeh Kananizadeh, Omeed Momeni:
Second-Harmonic Power Generation Limits in Harmonic Oscillators. 3217-3231 - Yatao Peng, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor. 3232-3242 - Mario Mercandelli, Luigi Grimaldi, Luca Bertulessi, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino:
A Background Calibration Technique to Control the Bandwidth of Digital PLLs. 3243-3255 - Lishan Lv, Ankesh Jain, Xiong Zhou, Joachim Becker, Qiang Li, Maurits Ortmanns:
A 0.4-V Gm-C Proportional-Integrator-Based Continuous-Time ΔΣ Modulator With 50-kHz BW and 74.4-dB SNDR. 3256-3267 - Danny Luu, Lukas Kull, Thomas Toifl, Christian Menolfi, Matthias Braendli, Pier Andrea Francese, Thomas Morf, Marcel A. Kossel, Hazar Yueksel, Alessandro Cevrero, Ilter Özkaya, Qiuting Huang:
A 12-bit 300-MS/s SAR ADC With Inverter-Based Preamplifier and Common-Mode-Regulation DAC in 14-nm CMOS FinFET. 3268-3279 - Carlos Briseno-Vidrios, Dadian Zhou, Suraj Prakash, Qiyuan Liu, Alexander Edward, Eric G. Soenen, Martin Kinyua, José Silva-Martínez:
A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs. 3280-3292 - Baek-Min Lim, Jeong-Il Seo, Sang-Gug Lee:
A Colpitts Oscillator-Based Self-Starting Boost Converter for Thermoelectric Energy Harvesting With 40-mV Startup Voltage and 75% Maximum Efficiency. 3293-3302 - Zeyu Cai, Robert H. M. van Veldhoven, Hilco Suy, Ger de Graaf, Kofi A. A. Makinwa, Michiel A. P. Pertijs:
A Phase-Domain Readout Circuit for a CMOS-Compatible Hot-Wire CO2 Sensor. 3303-3313 - Cheng-Hsiang Cheng, Ping-Yuan Tsai, Tzu-Yi Yang, Wan-Hsueh Cheng, Ting-Yang Yen, Zhicong Luo, Xin-Hong Qian, Zhi-Xin Chen, Tzu-Han Lin, Wei-Hong Chen, Wei-Ming Chen, Sheng-Fu Liang, Fu-Zen Shaw, Cheng-Siu Chang, Yue-Loong Hsin, Chen-Yi Lee, Ming-Dou Ker, Chung-Yu Wu:
A Fully Integrated 16-Channel Closed-Loop Neural-Prosthetic CMOS SoC With Wireless Power and Bidirectional Data Telemetry for Real-Time Efficient Human Epileptic Seizure Control. 3314-3326 - Byeong Yong Kong, In-Cheol Park:
A Memory-Efficient IDMA Architecture Based on On-the-Fly Despreading. 3327-3337
Volume 53, Number 12, December 2018
- Yong Ping Xu, Tai-Haur Kuo, Matt Straayer, Harish Krishnaswamy, Arun Natarajan:
Introduction to the Special Issue on the 2018 IEEE International Solid-State Circuits Conference (ISSCC). 3343-3346 - Sining Pan, Kofi A. A. Makinwa:
A 0.25 mm2-Resistor-Based Temperature Sensor With an Inaccuracy of 0.12 °C (3σ) From -55 °C to 125 °C. 3347-3355 - Woojun Choi, Yong-Tae Lee, Seonhong Kim, Sanghoon Lee, Jieun Jang, Junhyun Chun, Kofi A. A. Makinwa, Youngcheol Chae:
A Compact Resistor-Based CMOS Temperature Sensor With an Inaccuracy of 0.12 °C (3σ) and a Resolution FoM of 0.43 pJ⋅K2 in 65-nm CMOS. 3356-3367 - Long Xu, Johan H. Huijsing, Kofi A. A. Makinwa:
A ±4-A High-Side Current Sensor With 0.9% Gain Error From -40 °C to 85 °C Using an Analog Temperature Compensation Technique. 3368-3376 - Shih-Hsiung Chien, Yi-Wen Chen, Tai-Haur Kuo:
A Low Quiescent Current, Low THD+N Class-D Audio Amplifier With Area-Efficient PWM-Residual-Aliasing Reduction. 3377-3385 - Cagri Gurleyuk, Lorenzo Pedala, Sining Pan, Fabio Sebastiano, Kofi A. A. Makinwa:
A CMOS Dual-RC Frequency Reference With ±200-ppm Inaccuracy From -45 °C to 85 °C. 3386-3395 - Kamala Raghavan Sadagopan, Jian Kang, Yogesh Ramadass, Arun Natarajan:
A cm-Scale 2.4-GHz Wireless Energy Harvester With NanoWatt Boost Converter and Antenna-Rectifier Resonance for WiFi Powering of Sensor Nodes. 3396-3406 - Sally Safwat Amin, Patrick P. Mercier:
MISIMO: A Multi-Input Single-Inductor Multi-Output Energy Harvesting Platform in 28-nm FDSOI for Powering Net-Zero-Energy Systems. 3407-3419 - Adrien Morel, Anthony Quelen, Pierre Gasnier, Romain Grezaud, Stéphane Monfray, Adrien Badel, Gaël Pillonnet:
A Shock-Optimized SECE Integrated Circuit. 3420-3433 - Lin Cong, Hoi Lee:
A 1-2-MHz 150-400-V GaN-Based Isolated DC-DC Bus Converter With Monolithic Slope-Sensing ZVS Detection. 3434-3445 - Achim Seidel, Bernhard Wicht:
Integrated Gate Drivers Based on High-Voltage Energy Storing for GaN Transistors. 3446-3454 - Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins:
Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters. 3455-3469 - Hariprasad Chandrakumar, Dejan Markovic:
A 15.2-ENOB 5-kHz BW 4.5-µW Chopped CT ΔΣ-ADC for Artifact-Tolerant Neural Recording Front Ends. 3470-3483 - Shaolan Li, Bo Qiao, Miguel Gandara, David Z. Pan, Nan Sun:
A 13-ENOB Second-Order Noise-Shaping SAR ADC Realizing Optimized NTF Zeros Using the Error-Feedback Structure. 3484-3496 - Shoubhik Karmakar, Burak Gonen, Fabio Sebastiano, Robert H. M. van Veldhoven, Kofi A. A. Makinwa:
A 280 µW Dynamic Zoom ADC With 120 dB DR and 118 dB SNDR in 1 kHz BW. 3497-3507 - Lukas Kull, Danny Luu, Christian Menolfi, Matthias Brändli, Pier Andrea Francese, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Thomas Toifl:
A 24-72-GS/s 8-b Time-Interleaved SAR ADC With 2.0-3.3-pJ/Conversion and >30 dB SNDR at Nyquist in 14-nm CMOS FinFET. 3508-3516 - Shiyu Su, Mike Shuo-Wei Chen:
A 16-bit 12-GS/s Single-/Dual-Rate DAC With a Successive Bandpass Delta-Sigma Modulator Achieving <-67-dBc IM3 Within DC to 6-GHz Tunable Passbands. 3517-3527 - Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins:
An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances. 3528-3539 - Hanli Liu, Dexian Tang, Zheng Sun, Wei Deng, Huy Cu Ngo, Kenichi Okada:
A Sub-mW Fractional-N ADPLL With FOM of -246 dB for IoT Applications. 3540-3552 - Ahmad Sharkia, Shahriar Mirabbasi, Sudip Shekhar:
A Type-I Sub-Sampling PLL With a 100×100 µm2 Footprint and -255-dB FOM. 3553-3564 - Dmytro Cherniak, Luigi Grimaldi, Luca Bertulessi, Roberto Nonis, Carlo Samori, Salvatore Levantino:
A 23-GHz Low-Phase-Noise Digital Bang-Bang PLL for Fast Triangular and Sawtooth Chirp Modulation. 3565-3575 - Farshad Piri, Matteo Bassi, Niccolo Lacaita, Andrea Mazzanti, Francesco Svelto:
A PVT-Tolerant >40-dB IRR, 44% Fractional-Bandwidth Ultra-Wideband mm-Wave Quadrature LO Generator for 5G Networks in 55-nm CMOS. 3576-3586 - Huy Thong Nguyen, Taiyun Chi, Sensen Li, Hua Wang:
A Linear High-Efficiency Millimeter-Wave CMOS Doherty Radiator Leveraging Multi-Feed On-Antenna Active Load Modulation. 3587-3598 - Philipp Hillger, Ritesh Jain, Janusz Grzyb, Wolfgang Forster, Bernd Heinemann, Gaetan MacGrogan, Patrick Mounaix, Thomas Zimmer, Ullrich R. Pfeiffer:
A 128-Pixel System-on-a-Chip for Real-Time Super-Resolution Terahertz Near-Field Imaging. 3599-3612 - Kaushik Dasgupta, Saeid Daneshgar, Chintan Thakkar, Shinwon Kang, Anandaroop Chakrabarti, Shuhei Yamada, Nathan Narevsky, Debabani Choudhury, James E. Jaussi, Bryan Casper:
A 60-GHz Transceiver and Baseband With Polarization MIMO in 28-nm CMOS. 3613-3627 - Taiyun Chi, Jong Seok Park, Sensen Li, Hua Wang:
A Millimeter-Wave Polarization-Division-Duplex Transceiver Front-End With an On-Chip Multifeed Self-Interference-Canceling Antenna and an All-Passive Reconfigurable Canceller. 3628-3639 - Tirdad Sowlati, Saikat Sarkar, Bevin George Perumana, Wei Liat Chan, Anna Papio Toda, Bagher Afshar, Michael Boers, Donghyup Shin, Timothy Mercer, Wei-Hong Chen, Alfred Grau Besoli, Seunghwan Yoon, Sissy Kyriazidou, Phil Yang, Vipin Aggarwal, Nooshin Vakilian, Dmitriy Rozenblit, Masoud Kahrizi, Joy Zhang, Alan Wang, Padmanava Sen, David Murphy, Ali Sajjadi, Alireza Tarighat Mehrabani, Evangelos Kornaros, Khim Low, Koji Kimura, Vincent Roussel, Hongyu Xie, Venkat Kodavati:
A 60-GHz 144-Element Phased-Array Transceiver for Backhaul Application. 3640-3659 - Chao-Chieh Li, Min-Shueh Yuan, Chia-Chun Liao, Yu-Tso Lin, Chih-Hsien Chang, Robert Bogdan Staszewski:
All-Digital PLL for Bluetooth Low Energy Using 32.768-kHz Reference Clock and ≤0.45-V Supply. 3660-3671 - Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang, Tohru Kaneko, Zhijie Chen, Wei Deng, Rui Wu, Kenichi Okada:
A DPLL-Centric Bluetooth Low-Energy Transceiver With a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65-nm CMOS. 3672-3687 - Shusuke Kawai, Rui Ito, Kengo Nakata, Yutaka Shimizu, Motoki Nagata, Tomohiko Takeuchi, Hiroyuki Kobayashi, Katsuyuki Ikeuchi, Takayuki Kato, Yosuke Hagiwara, Yuki Fujimura, Kentaro Yoshioka, Shigehito Saigusa, Hiroshi Yoshida, Makoto Arai, Toshiyuki Yamagishi, Hirotsugu Kajihara, Kazuhisa Horiuchi, Hideki Yamada, Tomoya Suzuki, Yuki Ando, Kensuke Nakanishi, Koichiro Ban, Masahiro Sekiya, Yoshimasa Egashira, Tsuguhide Aoki, Kohei Onizuka, Toshiya Mitomo:
An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer. 3688-3699
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