Volume 16, Number 1, February 2007

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  Taskin Koçak, George R. Harris, Ronald F. DeMara: Self-Timed Architecture for Masked Successive Approximation Analog-to-Digital Conversion. 1-14
• 
  Bojan Andjelkovic, Vanco B. Litovski, Volker Zerbe: Mission Level Modeling and Simulation Language for Mixed-Signal System-on-Chip Design. 15-28
• 
  Erkan Yüce, Shahram Minaei: A New Active Network Suitable for Realizing Ladder Filters and Transformer Simulator. 29-41
• 
  Tian Xia, Kaidi Feng, Wai Yung: Low Reflection High-Speed Simultaneous Bi-Directional Data Bus. 43-50
• 
  Chi-Chou Kao: A High Flexibility Design for Clock Distribution Network in System on Chip. 51-63
• 
  Takahiro Murooka, Akira Nagoya, Toshiaki Miyazaki, Hiroyuki Ochi, Yukihiro Nakamura: Network Processor for High-Speed Network and Quick Programming. 65-79
• 
  Nadeem Qaiser, Naeem Iqbal, Amir Hussain, Naeem Qaiser: Exponential Stabilization of the Inertia Wheel Pendulum Using Dynamic Surface Control. 81-92
• 
  Hua-Pin Chen, Kuo-Hsiung Wu: Voltage-Mode DDCC-Based Multifunction Filters. 93-104
• 
  Chun-Li Hou, Chen-Chuan Huang, Jiun-Wei Horng: A Criterion of a Multi-Loop oscillator Circuit. 105-111
• 
  Farzad Tahami, Behrooz Molaei: Piecewise Affine System Modeling and Control of PWM converters. 113-128
• 
  Sudhanshu Maheshwari: Current Controlled Precision Rectifier Circuits. 129-138
• 
  Dongkyu Park, Seoksoo Yoon, Inhwa Jung, Chulwoo Kim: Noise-Aware Split-Path Domino Logic and its Clock Delaying Scheme. 139-154

Volume 16, Number 2, April 2007

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  Cheng Fu, Bogdan J. Falkowski: Ternary Recursive Fast Transforms Properties, Mutual Relations, and Circuit Realization. 155-168
• 
  Inhwa Jung, Moo-young Kim, Chulwoo Kim: Sptpl: a New Pulsed Latch Type Flip-Flop in High-Performance System-on-a-Chip (SOC). 169-179
• 
  Sudhanshu Maheshwari: A New Current-Mode Current-Controlled All-Pass Section. 181-189
• 
  Takaaki Mizuki, Taro Otagiri, Hideaki Sone: An Application of ESOP Expressions to Secure Computations. 191-198
• 
  Fei Qiao, Huazhong Yang, Dingli Wei, Hui Wang: Modified Conditional-Precharge Sense-amplifier-Based Flip-Flop with Improved Speed. 199-210
• 
  Jianliang Zhang, Sheng Zhang, Shuo Wang, Runde Zhou: A Novel Scheme of Implementing High-Speed High-Probability-Resolution Digital AWGN Generators. 211-219
• 
  Yuh-Shyan Hwang, Jiann-Jong Chen, Jen-Hung Lai: A Fully Differential Third-Order VHF G_M-c Filter Based on Linear Transformation Techniques. 221-231
• 
  Sarang Kazeminia, Abdollah Khoei, Khayrollah Hadidi: High Speed High Precision voltage-Mode Max and Min Circuits. 233-244
• 
  Gabriel Caffarena, Carlos E. Pedreira, Carlos Carreras, Slobodan Bojanic, Octavio Nieto-Taladriz: Fpga Acceleration for DNA Sequence Alignment. 245-266
• 
  Alexander Skavantzos, Mohammad Abdallah, Thanos Stouraitis: Large Dynamic Range RNS Systems and their Residue to Binary converters. 267-286
• 
  Sang-Churl Nam, Masahide Abe, Masayuki Kawamata: Ga-Based Design of 2D State-Space Digital Filters with Linear Phase Characteristics. 287-303
• 
  Payman Moallem, Alireza Memarmoghaddam, Mohsen Ashourian: Robust and Fast Tracking Algorithm in Video Sequences by Adaptive Window sizing Using a Novel Analysis on Spatiotemporal Gradient Powers. 305-317

Volume 16, Number 3, June 2007

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  Qinghai Yang, Kyung Sup Kwak: Pilot-Aided Multiuser Channel Estimation and Tracking in MIMO-OFDM Systems. 319-335
• 
  Amir Moosavie Nia, Karim Mohammadi: A Generalized ABFT Technique Using a Fault Tolerant Neural Network. 337-356
• 
  Pedro Trancoso: Watt Matters Most? Design Space Exploration of High-Performance Microprocessors for Power-Performance Efficiency. 357-378
• 
  Amos R. Omondi: Fast Residue-to-Binary Conversion Using Base Extension and the Chinese Remainder Theorem. 379-388
• 
  Robert Chen-Hao Chang, Hsin-Lei Lin, I-Hao Wang: Low-Power Eight-Bit Scsdl CLA with a Novel Split-Level charge-Sharing Differential Logic (Scsdl). 389-402
• 
  Huamin Zhu, Qinghai Yang, Kyung Sup Kwak: Location-Aided Resource Reservation for Handoff Based on Mobility Prediction. 403-420
• 
  Lianwen Jin, Duanduan Yang, Li-Xin Zhen, Jian-Cheng Huang: A Novel Vision-Based Finger-Writing Character Recognition System. 421-436
• 
  Mansoor Al-A'Ali: Four New Efficient Logical Display Techniques of Electricity Distribution Networks. 437-454
• 
  Mosin Mondal, Yehia Massoud: A Methodology for the Estimation of Capacitive Crosstalk-Induced Short-Circuit Energy. 455-465
• 
  José M. Solana: Compases: an Optimized Design for Testability Scheme to Reduce the Cost of Test Application Using Parallel-Serial Scan Design. 467-488

Volume 16, Number 4, August 2007

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  Giuseppe Ferri, Giulio Antonini: Ladder-Network-Based Model for Interconnects and Transmission Lines Time Delay and cutoff Frequency Determination. 489-505
• 
  Shahram Minaei, Erkan Yüce: Current-Mode Active-C Filter Employing Reduced Number of Cccii+S. 507-516
• 
  Phillip Ngai Cheong, Rui Paulo Martins: Interactive IIR SC Multirate Compiler Applied to Multistage decimator Design. 517-525
• 
  Heitor S. Lopes, Carlos R. Erig Lima, Norton J. Murata: A Configware Approach for High-Speed Parallel Analysis of genomic Data. 527-540
• 
  Robert Simon Sherratt, Kai Zhang, Owen J. Wilkes: A Block Coprocessor for User Data Rate Improvements to GPRS Coding Scheme 4. 541-551
• 
  Ahmed M. Soliman: Generation of Grounded capacitor ICCII-Based Band-Pass Filters. 553-566
• 
  Sudhanshu Maheshwari: Grounded capacitor CM-APS with High Output Impedance. 567-576
• 
  Fotis Plessas, Sofia Vatti, Grigorios Kalivas: Theoretical and Experimental Evaluation of the Phase Noise Behavior of a Dual-Loop Frequency synthesizer for 5-GHZ WLANS. 577-588
• 
  Baishan Zhao, Wai-Kai Chen: Design of Cross-Coupled Resonator Filters with Parallel Resonance Circuits. 589-602
• 
  Arshad Aziz, Nassar Ikram: Memory Efficient Implementation of AES S-Boxes on FPGA. 603-611
• 
  Hsin-Chuan Chen, Jen-Shiun Chiang: A High-Performance Sequential MRU Cache Using Valid-Bit Assistant Search Algorithm. 613-626
• 
  Varakorn Kasemsuwan, Weerachai Nakhlo: A Simple 1.5 V rail-to-rail CMOS Current Conveyor. 627-639

Volume 16, Number 5, October 2007

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  Anas N. Al-Rabadi: Quantum Logic Circuit Design of Many-Valued Galois Reversible Expansions and Fast Transforms. 641-671
• 
  Qinghai Yang, Kyung Sup Kwak: Optimal Training Design for Mimo-ofdm Systems under Spatially Correlated Doubly Selective Fading Channels. 673-697
• 
  Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud: Efficient Multi-Shifted Arnoldi Projection Using Wavelet Transform. 699-709
• 
  Azam Beg, Yul Chu: Modeling of Trace- and Block-Based Caches. 711-729
• 
  Haiwen Liu, Lingling Sun, Zhengfan Li, Xiaowei Sun: Propagation Characteristics of Microstrip Lines (MTLS) with Defected Ground Structure Slots: Theory and Application. 731-743
• 
  Sumitkumar N. Pamnani, Deepak N. Agarwal, Gang Qu, Donald Yeung: Low Power System Design by Combining Software Prefetching and Dynamic voltage Scaling. 745-767
• 
  Qiudong Wang, Ali Oksasoglu: Rank One Chaos in Switch-Controlled Piecewise Linear Chua's Circuit. 769-789
• 
  Shizhong Mei, Yehea I. Ismail: An Accurate Low-Iteration Algorithm for Effective Capacitance Computation. 791-800
• 
  Abdelohauab Djemouai, Mohamad Sawan: Circuit Techniques for Effective Wireless Transfer of Power and Data to Electronic implants. 801-818
• 
  Vincenzo Catania, Maurizio Palesi, Davide Patti: Analysis and Tools for the Design of VLIW Embedded Systems in a Multi-Objective Scenario. 819-846

Volume 16, Number 6, December 2007

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  Ibrahim Elshafiey, Ashraf Mohra: Gmr- and Gmi-Based Systems for Nondestructive Evaluation of Printed Circuit Board. 847-857
• 
  Amjad Gawanmeh, Sofiène Tahar, Haja Moinudeen, Ali Habibi: A Design for Verification Approach Using an Embedding of PSL in aSML. 859-881
• 
  Olivier Faurax, Traian Muntean: Security Analysis of AES Using Functionality Fault Model. 883-894
• 
  Syed Manzoor Qasim, Shuja Ahmad Abbasi: A Novel FPGA-Based Approach for Digital Waveform Generation Using Orthogonal Functions. 895-909
• 
  Sohaib Majzoub, Hassan B. Diab: Instruction-Set Extension for Cryptographic Applications on Reconfigurable Platform. 911-927
• 
  J. V. R. Ravindra, M. B. Srinivas: Delay and Energy Efficient Coding Techniques for Capacitive Interconnects. 929-942
• 
  Katell Morin-Allory, Eric Gascard, Dominique Borrione: Synthesis of Property Monitors for Online Fault Detection. 943-960
• 
  M. H. El-Malaki, M. Watheq El-Kharashi, Sherif Hammad, Ashraf Salem, Abdel-Moneim Wahdan: A Platform Approach for Hardware/Software Co-Design with Support for RTOS-Based Systems. 961-979
• 
  Haytham Elmiligi, M. Watheq El-Kharashi, Fayez Gebali: Queue Modeling and Implementation for Networks-on-Chip Routers. 981-996
• 
  Ahmed Abou ElFarag, Hatem M. El-Boghdadi, Samir I. Shaheen: Miss Ratio Improvement for Real-Time Applications Using Fragmentation-Aware Placement. 997-1010
• 
  Ihab Amer, Wael M. Badawy, Graham A. Jullien, Marco Mattavelli, Robert D. Turney: A Simplified 8 × 8 Transformation and Quantization Real-Time IP-Block for MPEG-4 H.264/AVC Applications: a New Design Flow Approach. 1011-1026
• 
  Abdallah Kassem, Mohamad Sawan, Mustapha Hamad, Ali Haidar: Toward a Miniaturized Generation of Ultrasonic-Based Devices. 1027-1044

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