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ORCIDIPSJ Transactions on System LSI Design Methodology, Volume 6
Volume 6, February 2013
- Hiroyuki Tomiyama:
Message from the Editor-in-Chief. 1
- Sangyoung Park
, Younghyun Kim, Jaehyun Park, Naehyuck Chang:
Power Converter-aware Design of Electronics Systems. 2-16 - Yoonmyung Lee, Dongmin Yoon, Yejoong Kim, David T. Blaauw, Dennis Sylvester:
Circuit and System Design Guidelines for Ultra-low Power Sensor Nodes. 17-26
- Katsuya Fujiwara, Hideo Fujiwara, Hideo Tamamoto:
Secure and Testable Scan Design Utilizing Shift Register Quasi-equivalents. 27-33 - Xin Jiang, Ran Zhang, Takahiro Watanabe:
An Efficient Algorithm for 3D NoC Architecture Optimization. 34-41 - Kosuke Mizuno, Yosuke Terachi, Kenta Takagi, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto:
An FPGA Implementation of a HOG-based Object Detection Processor. 42-51 - Shogo Nakaya, Makoto Miyamura, Noboru Sakimura, Yuichi Nakamura, Tadahiko Sugibayashi:
A Non-volatile Reconfigurable Offloader for Wireless Sensor Nodes. 52-59 - Kazuhito Ito, Kazuhiko Kameda:
A Method to Reduce Energy Consumption of Conditional Operations with Execution Probabilities. 60-70
- Yuta Kato, Kenshu Seto:
Loop Fusion with Outer Loop Shifting for High-level Synthesis. 71-75
- Huang-Chih Kuo, Youn-Long Lin:
VLSI Architecture Design for H.264/AVC Intra-frame Video Encoding. 76-93
- Yiqiang Sheng, Atsushi Takahashi:
A New Variation of Adaptive Simulated Annealing for 2D/3D Packing Optimization. 94-100 - Hiroyuki Akasaka, Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa:
Energy-efficient High-level Synthesis for HDR Architectures with Clock Gating Based on Concurrency-oriented Scheduling. 101-111
- Amila Akagic, Hideharu Amano:
Design and Implementation of IP-based iSCSI Offload Engine on an FPGA. 112-121
- Yuko Hara-Azumi, Toshinobu Matsuba, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
Quantitative Evaluation of Resource Sharing in High-level Synthesis Using Realistic Benchmarks. 122-126 - Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga:
Efficient Fault Simulation Algorithms for Analyzing Soft Error Propagation in Sequential Circuits. 127-134 - Bernard Schmidt, Carlos Villarraga, Thomas Fehmel, Jörg Bormann, Markus Wedler, Minh D. Nguyen, Dominik Stoffel, Wolfgang Kunz:
A New Formal Verification Approach for Hardware-dependent Embedded System Software. 135-145
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