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ORCIDInternational Journal of High Performance Systems Architecture, Volume 11
Volume 11, Number 1, 2022
- Chawki Benchehida, Mohammed Kamel Benhaoua, Houssam-Eddine Zahaf, Giuseppe Lipari:
Memory-processor co-scheduling for real-time tasks on network-on-chip manycore architectures. 1-11 - Souad Elhannani, Sidi Mohamed Benslimane, Mohammed Fethi Khalfi
, Mostafa Fechfouch:
QASIS: a QoC aware stress identification system using machine learning approach. 12-25 - Dallel Nasri, Diab Mokeddem:
Optimisation of multi-objective problems using an efficient Levy flight grasshopper algorithm. 26-35 - Mahmoud Bersali, Abderrezak Rachedi, Hafida Bouarfa, Mohamed El Amine Badjara:
A novel cooperative clustering approach based on multi-criteria decision-making for IoV. 36-46 - Shiraz Husain, Namit Gupta:
Design of optimum fault tolerant decoder using five input majority voter based on quantum dot cellular automata. 47-58
Volume 11, Number 2, 2022
- Guntapudi Vamsi Krishna, Dheeraj Kumar Sharma:
FPGA implementations of Fruit-v2, Fruit-80, and Grain-128AEAD stream ciphers. 59-72 - Nan Hu, Xuehai Zhou, Xi Li:
Heterogeneous computing on mobile GPU-FPGA cooperation platform. 73-84 - R. Ragamathana, A. Prathiba, Shaik Chand Basha:
Design and verification of an ARM Watchdog Timer using UVM. 85-95 - Shubham Mishra, Zeesha Mishra, Saroj Kumar Panigrahy, Bibhudendra Acharya:
Multistage pipelined architectures of Piccolo cipher for high-speed IoT applications. 96-104 - George K. Adam:
Real-time performance analysis of distributed multithreaded applications in a cluster of ARM-based embedded devices. 105-116
Volume 11, Number 3, 2023
- K. Janani, S. Ramamoorthy:
Countermeasure SDN-based IoT threats using blockchain multicontroller. 117-128 - Shweta Kumari, Zeesha Mishra, Bibhudendra Acharya:
Efficient hardware implementation of SIMECK lightweight block cipher. 129-136 - Fadi N. Sibai, Abu Asaduzzaman, Ali El-Moursy:
3D layout of the Spidergon-Donut on-chip interconnection network. 137-147 - S. K. Binu Siva Singh, K. V. Karthikeyan:
High resolution digital pulse width modulator architecture using reversible synchronous sequential counter and synchronous phase-shifted circuit. 148-155 - Prashant S. Titare, D. G. Khairnar:
MPSoC design and implementation using microblaze soft core processor architecture for faster execution of arithmetic application. 156-168 - Apeksha Kamble, Zeesha Mishra, Bibhudendra Acharya:
Hardware implementations of LBlock and XXTEA lightweight block ciphers for resource-constrained IoT application. 169-178
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