Volume 26, Number 1, February 2010

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  Vishwani D. Agrawal: Editorial. 1-2
• 
  Karim Arabi: Guest Editorial. 5
• 
  Qi Fan: General Design for Test Guidelines for RF IC. 7-12
• 
  Abhilash Goyal, Madhavan Swaminathan, Abhijit Chatterjee: Low-Cost Specification Based Testing of RF Amplifier Circuits using Oscillation Principles. 13-24
• 
  Pedro Fonseca da Mota, José Machado da Silva, Ricardo A. Veiga: Estimation of RF PA Nonlinearities after Cross-correlating Current and Output Voltage. 25-35
• 
  R. M. Ayadi, M. Masmoudi: Fault Coverage Analysis of Peak-Detector Based BIST for RF LNAs. 37-45
• 
  Maria Angeles Jalón, Eduardo J. Peralías: ADC Non-Linearity Low-Cost Test Through a Simplified Double-Histogram Method. 47-58
• 
  Hsiu-Ming Chang, Kuan-Yu Lin, Kwang-Ting (Tim) Cheng: Calibration and Test Time Reduction Techniques for Digitally-Calibrated Designs: an ADC Case Study. 59-71
• 
  Hongjoong Shin, Joonsung Park, Jacob A. Abraham: Spectral Prediction for Specification-Based Loopback Test of Embedded Mixed-Signal Circuits. 73-86
• 
  David C. Keezer, Carl Gray, Dany Minier, Patrice Ducharme: Low-Cost 20 Gbps Digital Test Signal Synthesis Using SiGe and InP Logic. 87-96
• 
  Rajeev Narayanan, Mohamed H. Zaki, Sofiène Tahar: Using Stochastic Differential Equation for Verification of Noise in Analog/RF Circuits. 97-109
• 
  Norbert Dumas, Florence Azaïs, Frédérick Mailly, Pascal Nouet: Study of an Electrical Setup for Capacitive MEMS Accelerometers Test and Calibration. 111-125
• 
  Yindar Chuo, Bozena Kaminska: Testing Multilayer Flexible Wireless Multisensor Platforms. 127-138
• 
  Matthew Giassa, Ajit Khosla, Bonnie Gray, Ash Parameswaran, Kirpal Kohli, Ramani Ramaseshan: Applications for Low Frequency Impedance Analysis Systems. 139-144

Volume 26, Number 2, April 2010

• 
  V. D. Agrawal: Editorial. 145
• 
  Prabhat Mishra: Guest Editorial. 149-150
• 
  Hongxia Fang, Krishnendu Chakrabarty, Hideo Fujiwara: RTL DFT Techniques to Enhance Defect Coverage for Functional Test Sequences. 151-164
• 
  Maheshwar Chandrasekar, Nikhil P. Rahagude, Michael S. Hsiao: Search State Compatibility Based Incremental Learning Framework and Output Deviation Based X-filling for Diagnostic Test Generation. 165-176
• 
  Yongquan Fan, Zeljko Zilic: Qualifying Serial Interface Jitter Rapidly and Cost-effectively. 177-193
• 
  Kanupriya Gulati, Sunil P. Khatri: Fault Table Computation on GPUs. 195-209
• 
  Jason G. Tong, Marc Boule, Zeljko Zilic: Defining and Providing Coverage for Assertion-Based Dynamic Verification. 211-225
• 
  Bin Xue, Sandeep K. Shukla: Analysis of Scheduled Latency Insensitive Systems with Periodic Clock Calculus. 227-242
• 
  In-Ho Moon, Kevin Harer: Learning from Constraints for Formal Property Checking. 243-259
• 
  Gianpiero Cabodi, Leandro Dipietro, Marco Murciano, Sergio Nocco: Finding Multiple Equivalence-Preserving Transformations in Combinational Circuits through Incremental-SAT. 261-278
• 
  Sven Verdoolaege, Martin Palkovic, Maurice Bruynooghe, Gerda Janssens, Francky Catthoor: Experience with Widening Based Equivalence Checking in Realistic Multimedia Systems. 279-292

Volume 26, Number 3, June 2010

• 
  Vishwani D. Agrawal: Editorial. 293
• 
  Maynard Falconer, Garrison Greenwood, Kristina Morgan, KiranKumar Kamisetty, Adam Norman, Konika Ganguly: Using Evolutionary Algorithms for Signal Integrity Assessment of High-Speed Data Buses. 297-305
• 
  Stephan Eggersglüß, Görschwin Fey, Andreas Glowatz, Friedrich Hapke, Jürgen Schlöffel, Rolf Drechsler: MONSOON: SAT-Based ATPG for Path Delay Faults Using Multiple-Valued Logics. 307-322
• 
  M. Kiran Kumar Reddy, Bharadwaj S. Amrutur, Rubin A. Parekhji: False Error Vulnerability Study of On-line Soft Error Detection Mechanisms. 323-335
• 
  Osnat Keren: One-to-Many: Context-Oriented Code for Concurrent Error Detection. 337-353
• 
  Luca Testa, Hervé Lapuyade, Yann Deval, Jean-Louis Carbonéro, Jean-Baptiste Begueret: Fault Coverage on RF VCOs and BIST for Wafer Sort Using Peak-to-Peak Voltage Detectors. 355-365
• 
  Hyoung-Kook Kim, Wen-Ben Jone, Laung-Terng Wang: Fault Modeling and Analysis for Resistive Bridging Defects in a Synchronizer. 367-392
• 
  Wang-Dauh Tseng, Lung-Jen Lee: Test Data Compression Using Multi-dimensional Pattern Run-length Codes. 393-400

Volume 26, Number 4, August 2010

• 
  Vishwani D. Agrawal: Editorial. 401
• 
  Ganesh Srinivasan, Abhijit Chatterjee, Sasikumar Cherubal, Pramodchandran N. Variyam: Production Realization of MTPR Test on Low-Cost ATE for OFDM Based Communication Devices. 405-417
• 
  Ting Long, Houjun Wang, Shulin Tian, Jianguo Huang, Bing Long: Test Generation Algorithm for Linear Systems Based on Genetic Algorithm. 419-428
• 
  Manuel J. Barragan Asian, Diego Vázquez, Adoración Rueda: A BIST Solution for Frequency Domain Characterization of Analog Circuits. 429-441
• 
  Cleonilson Protásio de Souza, Francisco Marcos de Assis, Raimundo Carlos Silvério Freire: A New Built-in TPG Based on Berlekamp-Massey Algorithm. 443-451
• 
  Ardy van den Berg, Pengwei Ren, Erik Jan Marinissen, Georgi Gaydadjiev, Kees Goossens: Bandwidth Analysis of Functional Interconnects Used as Test Access Mechanism. 453-464
• 
  Sobeeh Almukhaizim, Shouq Alsubaihi, Ozgur Sinanoglu: On the Application of Dynamic Scan Chain Partitioning for Reducing Peak Shift Power. 465-481
• 
  Berndt M. Gammel, Stefan Mangard: On the Duality of Probing and Fault Attacks. 483-493

Volume 26, Number 5, October 2010

• 
  Vishwani D. Agrawal: Editorial. 495
• 
  Jacob D. Biamonte, Jeff S. Allen, Marek A. Perkowski: Fault Models for Quantum Mechanical Switching Networks. 499-511
• 
  Ahmad A. Al-Yamani, Edward J. McCluskey: Test Set Compression Through Alternation Between Deterministic and Pseudorandom Test Patterns. 513-521
• 
  Chenglin Yang, Shulin Tian, Bing Long, Fang Chen: A Novel Test Point Selection Method for Analog Fault Dictionary Techniques. 523-534
• 
  Yasser Sedaghat, Seyed Ghassem Miremadi: Classification of Activated Faults in the FlexRay-Based Networks. 535-547
• 
  Keunyoung Park, Sang Guun Yoo, Taejun Kim, Juho Kim: JTAG Security System Based on Credentials. 549-557
• 
  Zhen Wang, Mark G. Karpovsky, Konrad J. Kulikowski: Design of Memories with Concurrent Error Detection and Correction by Nonlinear SEC-DED Codes. 559-580
• 
  Michael A. Kochte, Christian G. Zoellin, Hans-Joachim Wunderlich: Efficient Concurrent Self-Test with Partially Specified Patterns. 581-594

Volume 26, Number 6, December 2010

• 
  Vishwani D. Agrawal: Editorial. 595-596
• 
  Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham: On-Chip Delay Measurement Based Response Analysis for Timing Characterization. 599-619
• 
  Aymen Ladhar, Mohamed Masmoudi: An Effective and Accurate Methodology for the Cell Internal Defect Diagnosis. 621-639
• 
  Jari Hannu, Teuvo Saikkonen, Juha Häkkinen, Juha Karttunen, Markku Moilanen: Enabling Remote Testing: Embedded Test Controller and Mixed-signal Test Architecture. 641-658
• 
  Prashant Dubey, Akhil Garg, Shashank Mahajan: Study of Read Recovery Dynamic Faults in 6T SRAMS and Method to Improve Test Time. 659-666
• 
  Kazuteru Namba, Hideo Ito: Chiba Scan Delay Fault Testing with Short Test Application Time. 667-677
• 
  Usha Sandeep Mehta, Kankar S. Dasgupta, Nirnjan M. Devashrayee: Modified Selective Huffman Coding for Optimization of Test Data Compression, Test Application Time and Area Overhead. 679-688
• 
  Stefano Gandini, Walter Ruzzarin, Ernesto Sánchez, Giovanni Squillero, Alberto Paolo Tonda: A Framework for Automated Detection of Power-related Software Errors in Industrial Verification Processes. 689-697

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